IPS5451/IPS5451S FULLY PROTECTED HIGH SIDE POWER MOSFET SWITCH. Load
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1 Data Sheet No.PD6159-K FUY PROTECTED IG SIDE POWER MOSFET SWITC Features Over temperature protection (with auto-restart) Over current shutdown Active clamp E.S.D protection Status feedback Open load detection ogic ground isolated from power ground Description The are fully protected five terminal high side switch with built in short circuit, over-temperature, ESD protection, inductive load capability and diagnostic feedback. The over-current protection latches off the device if the output current exceeds Ishutdown. It can be reset by turning the input pin low. The overtemperature protection turns off the high side switches if the junction temperature exceeds Tshutdown. It will automatically restart after the junction has cooled 7 o C below Tshutdown. A diagnostic pin is provided for status feedback of over-current, over-temperature and open load detection. The double level shifter circuitry allows large offsets between the logic ground and the load ground. Typical Connection Product Summary R ds(on) 25mΩ (max) V clamp 5V I shutdown 35A I open load 1A Truth Table Op. Conditions Normal Normal Open load Open load Over current Over current Over-temperature Over-temperature In Out X (latched) (cycling) Packages Dg (cycling) + 5v + VCC 15K Status feedback Rdg Dg ogic control Vcc Out 5 ead SMD2 - IPS5451S Rin ogic signal In Gnd ogic Gnd oad oad Gnd 5 ead TO2 - IPS
2 Absolute Maximum Ratings Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are referenced to GROUND lead. (TAmbient = 25 o C unless otherwise specified). Symbol Parameter Min. Max. Units Test Conditions V out Maximum output voltage Vcc-45 Vcc+.3 V offset Maximum logic ground to load ground offset Vcc-45 Vcc+.3 V in Maximum Input voltage Iin, max Maximum IN current -5 ma Vdg Maximum diagnostic output voltage V Idg, max Maximum diagnostic output current -1 ma Isd cont. Diode max. continuous current (1) (rth=62 o C/W) IPS (rth=8 o C/W) IPS5451S 2.2 Isd pulsed Diode max. pulsed current (1) 45 ESD1 Electrostatic discharge voltage (uman Body) 4 C=pF, R=15Ω, kv ESD2 Electrostatic discharge voltage (Machine Model).5 C=pF, R=Ω, =µ Pd Maximum power dissipation (1) (rth=62 o C/W) IPS (rth=8 o C/W) IPS5451S 1.56 Tj max. Max. storage & operating junction temp o C Tlead ead temperature (soldering seconds) 3 Vcc max. Maximum Vcc voltage 45 V V A W Thermal Characteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Rth 1 Rth 1 Thermal resistance junction to case Thermal resistance with standard footprint 2 6 C/W Rth 2 Rth 2 Thermal resistance junction to ambient Thermal resistance with 1" square footprint TO-2 D 2 PAK (SMD2) Rth 3 Thermal resistance junction to case 5 (1) imited by junction temperature (pulsed current limited also by internal wiring) 2
3 Recommended Operating Conditions These values are given for a quick design. For operation outside these conditions, please consult the application notes. Symbol Parameter Min. Max. Units Vcc Continuous Vcc voltage VI igh level input voltage VI 1 ow level input voltage Iout Continuous output current (TAmbient = 85 o C, Tj = 125 o C, Rth = 62 o C/W) IPS (TAmbient = 85 o C, Tj = 125 o C, Rth = 8 o C/W) IPS5451S 3.5 Iout Continuous output current Tc=85 o C (TCase = 85 o C, IN = 5V, Tj = 125 o C, Rth = 5 o C/W) 14 Rin Recommended resistor in series with IN pin 4 6 Rdg Recommended resistor in series with DG pin V A kω Static Electrical Characteristics (Tj = 25 o C, Vcc = 14V unless otherwise specified.) Symbol Parameter Min. Typ. Max. Units Test Conditions Rds(on) ON state resistance Tj = 25 o C Vin = 5V, Iout = o C Rds(on) ON state Vcc = 6V 22 3 (Vcc=6V) mω Vin = 5V, Iout = 7A Rds(on) ON state resistance Tj = 15 o C 32 Vin = 5V, Iout = o C Vcc oper. Functional operating range V clamp 1 Vcc to OUT clamp voltage Id = ma (see Fig.1 & 2) V V clamp 2 Vcc to OUT clamp voltage Id = Ishutdown (see Fig.1 & 2) Vf Body diode forward voltage Id = 14A, Vin = V Iout Output leakage current 5 Vout = V, Tj = 25 o C leakage µa Icc off Supply current when OFF 5 Vin = V, Vout = V Icc on Supply current when ON 3.5 ma Vin = 5V Icc ac Ripple current when ON (AC RMS) µa Vin = 5V Vdgl ow level diagnostic output voltage.1.4 V Idg = 1.6 ma Idg Diagnostic output leakage current 1.5 µa Vdg = 4.5V leakage Vih IN high threshold voltage Vil IN low threshold voltage 1 2. V Iin, on On state IN positive current 3 8 µa Vin = 4V Vccuv+ Vcc UVO positive going threshold Vccuv- Vcc UVO negative going threshold V Inhyst. Input hysteresis
4 Switching Electrical Characteristics Vcc = 14V, Resistive oad = 1Ω, T j = 25 o C, (unless otherwise specified). Symbol Parameter Min. Typ. Max. Units Test Conditions Tdon Turn-on delay time 5 Tr1 Rise time to Vout = Vcc - 5V 4 Tr2 Rise time from the end of Tr1 µs See figure 3 to Vout = 9% of Vcc dv/dt (on) Turn ON dv/dt 3 6 V/µs Eon Turn ON energy 3 mj Tdoff Turn-off delay time µs See figure 4 Tf Fall time to Vout = % of Vcc 8 dv/dt (off) Turn OFF dv/dt 5 V/µs Eoff Turn OFF energy.75 mj Protection Characteristics Symbol Parameter Min. Typ. Max. Units Test Conditions Tsd+ Over-temp. positive going threshold 165 o C See fig. 2 Tsd- Over-temp. negative going threshold 158 o C See fig. 2 I sd Over-current threshold A See fig. 2 I open load Open load detection threshold A Treset Minimum time to reset protections 5 µs Vin = V Tdg Blanking time before considering Dg 7 µs Part turned on with Vin =5V Functional Block Diagram All values are typical VCC 4.5 V 5V 4.2 V 62 V Under voltage lock out Charge pump 2.6 V IN 5.5V KΩ 2. V evel shift driver DG 5.5V 4 Ω S R Q Over current Over temperature C Tj 158 C Open load 35 A mv GND VOUT 4
5 ead Assignments 3 (Vcc) 3 (Vcc) 1 - Ground 2 - In 3 - Vcc 4 - DG 5 - Out ead - TO2 IPS5451 Part Number 5 ead - D 2 PAK (SMD2) IPS5451S T clamp Vin 5 V Vin V Iout OI I shutdown t < T reset I shutdown t > T reset Iout ( + Vcc ) Out V Tsd+ T T shutdown + V clamp T shutdown - ( see Appl. Notes to evaluate power dissipation ) Figure 1 - Active clamp waveforms Figure 2 - Protection timing diagram 5
6 Vin Vin Vcc 9% Vcc - 5V 9% Vout % Td on Iout1 dv/dt on Tr 1 Resistive load Eon1 Tr 2 Iout2 E1(t) E2 (t) Vout % Td off Tf dv/dt off Eon2 Inductive load Figure 3 - Switching times definition (turn-on) Turn on energy with a resistive or an inductive load Figure 4 - Switching times definition (turn-off) 1,E-2 Vin Dg Vcc Out IN Gnd + 14 V - 1,E-3 1,E-4 Vin = 5 V Vout R 1,E-5 Vin = V (sleep mode) 5 v v Rem : V load is negative during demagnetization Iout 1,E Figure 5 - Active clamp test circuit Figure 6 - Icc (ma) Vs Vcc (V) 6
7 VI VI yster es i s Figure 7 - Iin ( µa ) Vs Tj ( C) Figure 8 - VI, VI threshold ( V ) Vs Tj ( C) Figure 9 - Rdson (mω) vs Vcc (V) Figure - Rdson (mω) vs Tj ( C) 7
8 25 Tj=25 o C Free air/ std footprint 15 Current path capacity should be above this curve 5 oad characteristic should be below this curve E-6 E-6 1E-3 E-3 E-3 1E+ E+ E+ Figure 11 - Rdson (mω) vs Iout (A) Figure 12 - Isd (A) vs Time (S) rth = 5 C/W rth = 15 C/W rth = 3 C/W T2 free air 6 C/W Figure 13 - Isd (A) vs Tj ( C) Figure 14 - Max. Cont. Ids ( A ) Vs Amb. Temperature ( C) 8
9 single pulse z rth=6 C/W dt=25 C 1kz rth=6 C/W dt=25 C Rth std footprint/to2 freeair Rth junction to case Figure 15 -Max. I clamp ( A ) Vs Inductive oad ( m ) Figure 16 - Transient Rth ( C/W ) Vs Time (s) 6 4 Eon Eoff I=5 I=Imax vs (see fig.15) I=1A Figure 17 - Eon, Eoff (mj) vs Iout (A) Figure 18 - Vcc=14V (mj) vs Inductance (m) 9
10 Figure 19 - I open load (A) vs Tj ( C) Figure - Icc off (µa) vs Tj ( C) Case Outline - TO2 (5 lead) IRGB
11 Case Outline - D 2 PAK (SMD2) - 5 ead
12 Tape & Reel - D 2 PAK (SMD2) - 5 ead / IR WORD EADQUARTERS: 233 Kansas St., El Segundo, California 9245 Tel: (3) IR EUROPEAN REGIONA CENTRE: 439/445 Godstone Rd., Whyteleafe, Surrey CR3 B, United Kingdom Tel: () IR JAPAN: K& Bldg., 2F, 3-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo, Japan Tel: IR ONG KONG: Unit 38, #F, New East Ocean Centre, No. 9 Science Museum Road, Tsimshatsui East, Kowloon ong Kong Tel: (852) Data and specifications subject to change without notice. 8/7/ 12
13 Note: For the most current drawings please refer to the IR website at:
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l Ultra Low On-Resistance l P-Channel MOSFET l Very Small SOIC Package l Low Profile (
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