Computer Architecture

Transcription

1 Computer Architecture Lecture 01 Arkaprava Basu

2 Acknowledgements Several of the slides in the deck are from Luis Ceze (Washington), Nima Horanmand (Stony Brook), Mark Hill, David Wood, Karu Sankaralingam (Wisconsin), Abhishek Bhattacharjee(Rutgers) and ARM Inc. Development of this course is partially supported by Western Digital Corporation. 8/5/2018 2

3 What is computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons 8/5/2018 3

4 What is computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons 8/5/2018 3

5 What is computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons Architecture: Exposed to the software. Defines H/W-S/W boundary Micro-architecture: S/W does not see H/W techniques to improve performance/power efficiency 8/5/2018 3

6 Why study computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons Wide impact Even a 1% improvement impact lives of millions Sets trends in other fields Example: Deep learning 8/5/2018 4

7 Why study computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons Wide impact Even a 1% improvement impact lives of millions Sets trends in other fields Example: Deep learning 8/5/2018 4

8 Why study computer architecture? If deep learning is a rocket (science) then High performance computing (HPC) is its engine Large volume of data is its fuel --Andrew Ng 8/5/2018 5

9 Why study computer architecture? If deep learning is a rocket (science) then High performance computing (HPC) is its engine Large volume of data is its fuel --Andrew Ng Made possible by computer architecture! 8/5/2018 5

10 Why study computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons Wide impact Even a 1% improvement impact lives of millions Sets trends in other fields Example: Deep learning Critical for understanding aspects of computing Example: Meltdown, specter 8/5/2018 6

11 Why study computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons Wide impact Even a 1% improvement impact lives of millions Sets trends in other fields Example: Deep learning Critical for understanding aspects of computing Example: Meltdown, specter 8/5/2018 6

12 Why study computer architecture? 8/5/2018 7

13 Why study computer architecture? Microarchitectural became visible to adversary during a short time window Caused by speculative execution fundamental technique in computer architecture 8/5/2018 7

14 Why study computer architecture? Hardware is the final level of trust to ensure security and privacy OS s are often compromised (e.g., rootkits) In cloud computing, tenants don t want to trust the hypervisor Traditionally, security has been layer below security has to be hardware up 8/5/2018 8

15 Why study computer architecture? DAX GPU CPU TPU DGX1 Crypto New type of computing: domain-specific accelerators How to design the software stack for accelerators? How to make accelerators both programmable and efficient? 8/5/2018 9

16 Why study computer architecture? HBM DRAM HBM New type of memory technology: Redesign memory hierarchy (both h/w and s/w) for new type of memories 8/5/

17 Why study computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons New generation computing H/W and S/W codesign is key 8/5/

18 Why study computer architecture? Problem Algorithm Program Languages Compiler Runtime Systems (Runtime, OS, VM) Architecture (ISA) Microarchitecture Transistors Electrons New generation computing H/W and S/W codesign is key Need to rethink how we design computers Opportunity for research contribution 8/5/

19 In this course, you will.. Learn about basics of processor design Hands on experience on how architecture impacts software programs One homework using hardware performance counters Learn about latest trends in computing Current technology trends and constraints How a modern CPU works? How a modern S/W stack interacts with CPU? Emerging topics: GPUs, accelerators, security Get a taste of research Course project 8/5/

20 Guest lectures Dr. Kanishka Lahiri (AMD) Dr. Vivek Seshadri (Microsoft Research) Prof. R. Govindarajan (IISc) Prof. Vinod Ganapathy (IISc) --- possibly someone from Intel Labs (not yet confirmed) 8/5/

21 Grading Learning is more important!! Research paper reviews (any 5) Due Date Points Grading TBD 15(3*5) Qualitative One homework Mid/late Semester 15 Qualitative/Quantitative Two exams Project End Sept and early December Proposal mid/end Sept and final report/presentation in early Dec. 40 (2*20) Qualitative/Quantitative 45 Qualitative 8/5/

22 Grading Learning is more important!! Research paper reviews (any 5) Due Date Points Grading TBD 15(3*5) Qualitative One homework Mid/late Semester 15 Qualitative/Quantitative Two exams Project End Sept and early December Proposal mid/end Sept and final report/presentation in early Dec. 40 (2*20) Qualitative/Quantitative 45 Qualitative Adds up to 115!! Opportunity to make up for a bad exam/homework/review 8/5/

23 Format of paper reviews Maximum 250 words and one page Three sections Summary of the paper (Write in your own words) Something new that you learned/things you liked Critique/What could be improved/lacking 8/5/

24 Policy on academic integrity You may... Discuss assignment, design, techniques. You may not Share code outside your group. Use any code not distributed as part of project handouts. What happens if you break academic integrity policies. Unpleasant conversations with me. You get hoisted to the department chair, the deans, etc. An F for the course. Really, think about the cost-benefit analysis. It s simply not worth it. 8/5/

25 Let s get started 8/5/

26 Today s agenda Fundamental technology trends that has shaped computer architecture Basic performance and power/energy metrics A few fundamental laws/equations 8/5/

27 Drivers of growth in computing In last four decades, computing capability has increased ~10 6 times Two primary sources of growth in computing: Computer architecture improvement (~10 3 times) o Example: Branch prediction, superscalar, speculation, out-oforder execution, caches, SIMD. Improvement in transistor technology (~10 3 times) o Smaller transistors faster, less power 8/5/

28 Drivers of growth in computing In last four decades, computing capability has increased ~10 6 times Two primary sources of growth in computing: Computer architecture improvement (~10 3 times) o Example: Branch prediction, superscalar, speculation, out-oforder execution, caches, SIMD. Improvement in transistor technology (~10 3 times) o Smaller transistors faster, less power Focus 8/5/

29 Drivers of growth in computing In last four decades, computing capability has increased ~10 6 times Two primary sources of growth in computing: Computer architecture improvement (~10 3 times) o Example: Branch prediction, superscalar, speculation, out-oforder execution, caches, SIMD. Focus Improvement in transistor technology (~10 3 times) o Smaller transistors faster, less power Next few slides 8/5/

30 Transistor technology source Substrate gate insulator channel drain source gate channel drain Basic technology element: MOSFET Solid-state component acts like electrical switch MOS: metal-oxide-semiconductor Conductor, insulator, semi-conductor FET: field-effect transistor Channel conducts sourcedrain only when voltage applied to gate Channel length: characteristic parameter (short fast) Aka feature size or technology node Currently: 14 nanometers (nm) 7 nm soon 8/5/

31 Moore s law (1965) Transistors per inch square Twice as many after ~1.5-2 years Some technology-based ramifications Annual improvements in density, speed, power, costs SRAM/logic: density: ~30%, speed: ~20% DRAM: density: ~60%, speed: ~4% Disk: density: ~60%, speed: ~10% (non-transistor) Big improvements in flash memory and network bandwidth too Related trends Processor performance twice as fast after ~18 months Memory capacity doubles in <2 years 8/5/

32 Impact of Moore s law More transistors More cool things to do with extra transistors Smaller transistors faster switching higher frequency More transistor Cheaper transistor (amortizes design cost) Virtuous cycle of improvement 8/5/

33 Dennard scaling Doubling the transistors; scale their power down Transistor: 2D Voltage-Controlled Switch Dimensions Voltage Doping Concentrations 0.7 8/5/

34 Dennard scaling Doubling the transistors; scale their power down Area Transistor: 2D Voltage-Controlled Switch Dimensions Voltage Doping Concentrations Capacitance Frequency /5/

35 Dennard scaling Doubling the transistors; scale their power down Area Transistor: 2D Voltage-Controlled Switch Dimensions Voltage Doping Concentrations Capacitance Frequency Power = Capacitance Frequency Voltage 2 8/5/

36 Dennard scaling Doubling the transistors; scale their power down Area Transistor: 2D Voltage-Controlled Switch Dimensions Voltage Doping Concentrations Capacitance 0.7 Frequency Power 1.4 Power = Capacitance Frequency Voltage /5/

37 Dennard scaling Doubling the transistors; scale their power down Area Transistor: 2D Voltage-Controlled Switch Dimensions Voltage Doping Concentrations Capacitance 0.7 Frequency Power 1.4 Power = Capacitance Frequency Voltage /5/

38 Historical impact of Moore s law and Dennard s scaling 8/5/

39 Historical impact of Moore s law and Dennard s scaling 8/5/

40 Benefits of transistor scaling are in peril In last four decades, computing capability has increased ~10 6 times Two primary sources of growth in computing: Computer architecture improvement (~10 3 times) o Example: Branch prediction, superscalar, speculation, out-oforder execution, caches, SIMD. Improvement in transistor technology (~10 3 times) o Smaller transistors faster, less power 8/5/

41 Benefits of transistor scaling are in peril In last four decades, computing capability has increased ~10 6 times Two primary sources of growth in computing: Computer architecture improvement (~10 3 times) o Example: Branch prediction, superscalar, speculation, out-oforder execution, caches, SIMD. Improvement in transistor technology (~10 3 times) o Smaller transistors faster, less power 8/5/

42 Benefits of transistor scaling are in peril In last four decades, computing capability has increased ~10 6 times Two primary sources of growth in computing: Computer architecture improvement (~10 3 times) Need to create new architectures! o Example: Branch prediction, superscalar, speculation, out-oforder execution, caches, SIMD. Improvement in transistor technology (~10 3 times) o Smaller transistors faster, less power 8/5/

43 How good is your processor? 8/5/

44 Performance metric Latency (execution/response time): time to finish one task Throughput (bandwidth): number of tasks finished per unit of time Throughput can exploit parallelism, latency can t Sometimes complimentary, often contradictory 8/5/

45 Performance metric Latency (execution/response time): time to finish one task Throughput (bandwidth): number of tasks finished per unit of time Throughput can exploit parallelism, latency can t Sometimes complimentary, often contradictory Example: move people from A to B, 10 KMs Car: capacity = 5, speed = 60 KM/hour Bus: capacity = 60, speed = 20 KM/hour Latency: car = 10 min, bus = 30 min Throughput: car = 15 PPH (w/ return trip), bus = 60 PPH 8/5/

46 Latency vs. throughput Processor A is X times faster than processor B if Latency(P, A) = Latency(P, B) / X Throughput(P, A) = Throughput(P, B) * X Processor A is X% faster than processor B if Latency(P, A) = Latency(P, B) / (1+X/100) Throughput(P, A) = Throughput(P, B) * (1+X/100) Car/bus example Latency? Car is 3 times (200%) faster than bus Throughput? Bus is 4 times (300%) faster than car 8/5/

47 Evaluating a processor: Latency/throughput of which programs? Very difficult question! Best case: you always run the same set of programs Just measure the execution time of those programs Too idealistic software evolves Use benchmarks Representative programs chosen to measure performance (Hopefully) predict performance of actual workload 8/5/

48 Types of benchmark Real programs Example: CAD, text processing, business apps, scientific apps Need to know program inputs and options (not just code) May not know what programs users will run Require a lot of effort to port Kernels Small key pieces (inner loops) of scientific programs where program spends most of its time Example: Livermore loops, LINPACK Toy Benchmarks e.g. Quicksort, Puzzle Easy to develop, predictable results, may use to check correctness of machine but not as performance benchmark 8/5/

49 Standardized benchmark suites SPEC INT 2006 Program Language Description 400.perlbench C Programming Language 401.bzip2 C Compression 403.gcc C C Compiler 429.mcf C Combinatorial Optimization 445.gobmk C Artificial Intelligence: Go 456.hmmer C Search Gene Sequence 458.sjeng C Artificial Intelligence: chess 462.libquantum C Physics / Quantum Computing 464.h264ref C Video Compression 471.omnetpp C++ Discrete Event Simulation 473.astar C++ Path-finding Algorithms 483.xalancbmk C++ XML Processing 8/5/

50 Iron law of processor performance Time Program Instructions Program Cycles Instruction Time Cycle 8/5/

51 Iron law of processor performance Time Program Instructions Program Cycles Instruction Time Cycle Total Work In Program 8/5/

52 Iron law of processor performance Time Program Instructions Program Cycles Instruction Time Cycle Total Work In Program CPI (Cycles per Inst) or 1/IPC 8/5/

53 Iron law of processor performance Time Program Instructions Program Cycles Instruction Time Cycle Total Work In Program CPI (Cycles per Inst) or 1/IPC 1/f (f: clock frequency) 8/5/

54 Iron law of processor performance Time Program Instructions Program Cycles Instruction Time Cycle Total Work In Program CPI (Cycles per Inst) or 1/IPC 1/f (f: clock frequency) Function of: Algorithms, Compilers, ISA, Program Input 8/5/

55 Iron law of processor performance Time Program Instructions Program Cycles Instruction Time Cycle Total Work In Program CPI (Cycles per Inst) or 1/IPC 1/f (f: clock frequency) Function of: Algorithms, Compilers, ISA, Program Input Function of: Program insts, ISA, Microarchitecture 8/5/

56 Iron law of processor performance Time Program Instructions Program Cycles Instruction Time Cycle Total Work In Program CPI (Cycles per Inst) or 1/IPC 1/f (f: clock frequency) Function of: Algorithms, Compilers, ISA, Program Input Function of: Program insts, ISA, Microarchitecture Function of: Microarchitecture, Fabrication Tech 8/5/

57 Components of Iron law The three components of Iron Law are interdependent Processor architects mostly target CPI but must understand the others well Architects are the interface between software people (compiler, OS, etc.) and those who build the physical hardware 8/5/

58 Understanding performance Which processor would you buy? Processor A: CPI = 2, clock = 2.8 GHz Processor B: CPI = 1, clock = 1.8 GHz Which one is likely to be faster (assuming same ISA/compiler, same set of programs)? 8/5/

59 Understanding performance Which processor would you buy? Processor A: CPI = 2, clock = 2.8 GHz Processor B: CPI = 1, clock = 1.8 GHz Which one is likely to be faster (assuming same ISA/compiler, same set of programs)? Probably A, but B is faster (assuming same ISA/compiler) Classic example 800 MHz Pentium III faster than 1 GHz Pentium 4 Same ISA and compiler Danger of partial performance metrics!! 8/5/

60 Example: Iron law of performance Program takes 33 billion instructions to run CPU processes instructions at 2 cycles on average Clock speed of 3GHz Program running time? 8/5/

61 Calculating cycles-per-instruction Different instr. take different amount of work (cycles) Time Program Instructions Program Cycles Instruction Time Cycle CPI Average CPI n i1 InstFrequency n i1 InstFrequency i CPI i i 8/5/

62 Calculating cycles-per-instruction Instr. frequencies of a given program on a given machine Instruction Type Frequency Avg. CPI Load 25% 2 Store 15% 2 Branch 20% 2 ALU 40% 1 What is the average CPI (cycles per instruction)? 8/5/

63 Calculating cycles-per-instruction Instr. frequencies of a given program on a given machine Depends upon program, compiler, ISA Instruction Type Frequency Avg. CPI Load 25% 2 Store 15% 2 Branch 20% 2 ALU 40% 1 What is the average CPI (cycles per instruction)? Depends upon processor (microarchitecture0 8/5/

64 Calculating cycles-per-instruction Instr. frequencies of a given program on a given machine Depends upon program, compiler, ISA Instruction Type Frequency Avg. CPI Load 25% 2 Store 15% 2 Branch 20% 2 ALU 40% 1 What is the average CPI (cycles per instruction)? Depends upon processor (microarchitecture0 Average CPI n i1 InstFrequency n i1 InstFrequency i CPI i i 8/5/

65 Calculating cycles-per-instruction Instr. frequencies of a given program on a given machine Depends upon program, compiler, ISA Instruction Type Frequency Avg. CPI Load 25% 2 Store 15% 2 Branch 20% 2 ALU 40% 1 What is the average CPI (cycles per instruction)? Average CPI n i1 InstFrequency n i1 InstFrequency CPI /5/ i i i 1.6 Depends upon processor (microarchitecture0

66 Speedup: Comparing performance Runtime (Program A) on processor X Speedup: Runtime Program A on processor Y 8/5/

67 Speedup: Comparing performance Runtime (Program A) on processor X Speedup: Runtime Program A on processor Y Processor X Processor Y Program A 5 sec 4 sec Program B 3 sec 6 sec 8/5/

68 Speedup: Comparing performance Runtime (Program A) on processor X Speedup: Runtime Program A on processor Y Processor X Processor Y Program A 5 sec 4 sec Program B 3 sec 6 sec What is speedup of program A? What is speedup of program B? What is average speedup? 8/5/

69 Summarizing performance numbers Arithmetic: times proportional to time e.g., latency Harmonic: rates inversely proportional to time e.g., throughput Geometric: ratios unit-less quantities e.g., speedups & normalized times 1 n i n 1Time n i 1 n n n 1 Rate i Ratio i i1 i Used by SPEC CPU 8/5/

70 Two common principles of optimizing performance 8/5/

71 Principles of optimizing performance Take advantage of parallelism E.g., multiple processors, disks, memory banks, pipelining, multiple functional units Speculate to create (even more) parallelism Principle of Locality Reuse of data and instructions 8/5/

72 Amdahl's Law Execution Time without Enhancemen t Speedup Execution Time with Enhancemen t Execution Time Execution Time What if enhancement does not enhance everything? old new 8/5/

73 Amdahl's Law Execution Time without Enhancemen t Speedup Execution Time with Enhancemen t Execution Time Execution Time What if enhancement does not enhance everything? old new Speedup Execution Time without using Enhancement at all Execution Time using Enhancement when Possible 8/5/

74 Amdahl's Law Execution Time without Enhancemen t Speedup Execution Time with Enhancemen t Execution Time Execution Time What if enhancement does not enhance everything? old new Speedup Execution Time without using Enhancement at all Execution Time using Enhancement when Possible Execution Time new Execution Time old Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced 8/5/

75 Amdahl's Law Execution Time without Enhancemen t Speedup Execution Time with Enhancemen t Execution Time Execution Time What if enhancement does not enhance everything? old new Speedup Execution Time without using Enhancement at all Execution Time using Enhancement when Possible Execution Time new Execution Time old Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced Overall Speedup 1 Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced 8/5/

76 Amdahl's Law Execution Time without Enhancemen t Speedup Execution Time with Enhancemen t Execution Time Execution Time What if enhancement does not enhance everything? old new Speedup Execution Time without using Enhancement at all Execution Time using Enhancement when Possible Execution Time new Execution Time old Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced Caution: fraction of What? Overall Speedup Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced 8/5/

77 Amdahl s law example 8/5/

78 Amdahl s law example Overall Speedup 1 Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced 8/5/

79 Amdahl s law example Overall Speedup 1 Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced VS Speedup Enhanced 20 Fraction Enhanced 0.1 Speedup Enhanced 1.2 Fraction Enhanced 0.9 8/5/

80 Amdahl s law example Overall Speedup 1 Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced Speedup Enhanced 20 Fraction Enhanced 0.1 VS Speedup Enhanced 1.2 Fraction Enhanced 0.9 Speedup /5/

81 Amdahl s law example Overall Speedup 1 Fraction Enhanced 1 Fraction Enhanced Speedup Enhanced Speedup Enhanced 20 Fraction Enhanced 0.1 VS Speedup Enhanced 1.2 Fraction Enhanced 0.9 Speedup Speedup /5/

82 Rule of thumbs in optimizing performance Make the common case fast Design for actual performance, not peak performance Amdahl s law Locality of reference (90/10 rule) (often) programs spend 90% of their time in 10% of the code main principle behind caches (spatial/temporal locality) Smaller (simpler) is faster Why? Main principle behind memory hierarchies give illusion of fast, large memory 8/5/

83 Power/energy is important 8/5/

84 Energy vs. Power Energy: capacity to do work or amount of work done Expressed in joules Battery life, electric bill, environmental impact Instructions per Joule 8/5/

85 Energy vs. Power Energy: capacity to do work or amount of work done Expressed in joules Battery life, electric bill, environmental impact Instructions per Joule Power: instantaneous rate of energy transfer Expressed in watts energy / time (watts = joules / seconds) Power impacts power supply and cooling requirements (cost) Power-density (Watt/mm 2 ): important related metric Peak power vs average power E.g., camera, power spikes when you actually take a picture In processors, all consumed energy is converted to heat power consumption = rate of heat generation 8/5/

86 Energy vs. power 8/5/

87 Why energy is important? Impacts battery life for mobile devices Impacts operating cost of servers/data centers You have to buy electricity It costs to produce and deliver electricity You have to remove generated heat It costs to buy and operate cooling systems 8/5/

88 Why energy is important? Impacts battery life for mobile devices Impacts operating cost of servers/data centers You have to buy electricity It costs to produce and deliver electricity You have to remove generated heat It costs to buy and operate cooling systems 8/5/

89 Why power is important? Because power delivery has a peak Power is also heat generation rate Must dissipate the heat Need heat sinks and fans and What if fans not fast enough? Chip powers off (if it s smart enough) Otherwise, it burns (or melts) Every processor advertise Thermal Design Point or TDP Can t go beyond this; Processor may burn up 8/5/

90 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate 8/5/

91 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate Applied Voltage Current 8/5/

92 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate Applied Voltage Source Drain Current 8/5/

93 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate Applied Voltage Source Drain Current Threshold Voltage 8/5/

94 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate Applied Voltage Gate Source Drain Current Threshold Voltage Source Drain 8/5/

95 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate Applied Voltage Gate Source Drain Current Threshold Voltage Source Drain 8/5/

96 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate Source Drain Applied Voltage Current Threshold Voltage Source Gate Drain 8/5/

97 Components of power dissipation Dynamic + static power Dynamic Power Related to switching activity of transistors (from 01 and 10) Gate Source Drain Applied Voltage Current Threshold Voltage Source Gate Current Drain 8/5/

98 Dynamic power dissipation Power ½ CV 2 Af 8/5/

99 Dynamic power dissipation Capacitance: Function of wire length, transistor size Power ½ CV 2 Af 8/5/

100 Dynamic power dissipation Capacitance: Function of wire length, transistor size Supply Voltage: Function of technology and operating frequency Power ½ CV 2 Af 8/5/

101 Dynamic power dissipation Capacitance: Function of wire length, transistor size Supply Voltage: Function of technology and operating frequency Power ½ CV 2 Af Clock frequency: Function of desired performance 8/5/

102 Dynamic power dissipation Capacitance: Function of wire length, transistor size Supply Voltage: Function of technology and operating frequency Power ½ CV 2 Af Activity factor: Average fraction of all possible transitions (01 and 10) per cycle? Clock frequency: Function of desired performance 8/5/

103 Static power dissipation Static Power Current leaking from a transistor even if doing nothing (steady, constant energy cost) Static Power V dd and e c 1V th and e c 2T This is a first-order model c 1, c 2 : some positive constants V th : Threshold Voltage T: Temperature About 30-50% of processor power 8/5/

104 Static power dissipation Static Power Current leaking from a transistor even if doing nothing (steady, constant energy cost) Channel Leakage Sub-threshold Conductance Static Power V dd and e c 1V th and e c 2T This is a first-order model c 1, c 2 : some positive constants V th : Threshold Voltage T: Temperature About 30-50% of processor power 8/5/

105 Static power dissipation Static Power Current leaking from a transistor even if doing nothing (steady, constant energy cost) Gate Leakage Channel Leakage Sub-threshold Conductance Static Power V dd and e c 1V th and e c 2T This is a first-order model c 1, c 2 : some positive constants V th : Threshold Voltage T: Temperature About 30-50% of processor power 8/5/

106 Thermal runaway Leakage is an exponential function of temperature Temp leads to Leakage Which burns more power Which leads to Temp, which leads to Can melt your chip! 8/5/

107 Ways to reduce energy/power? Clock gating/power gating Turn off parts of the processor Dynamic voltage frequency scaling Frequency related to voltage (Higher frequency needs higher voltage) Dynamically reduce frequency/voltage when possible CPU sleep states Idle power savings by turning off entire portions of CPU when possible 8/5/

108 Types of processor Serve class Intel Xeon, AMD Epyc Desktop class Mobile class Embeded class IoT 8/5/