University of California at Berkeley College of Engineering Dept. of Electrical Engineering and Computer Sciences. EECS 40 Midterm II
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1 University of California at Berkeley College of Engineering Dept. of Electrical Engineering and Computer Sciences EECS 40 Midterm II Fall 1998 Prof. Roger T. Howe November 19, 1998 Name: Student ID: Guidelines 1. Closed Book and notes; one 8.5" x 11" page (both sides) of your own notes is allowed. 2. You may use a Calculator 3. Do not unstaple the exam. 4. Show all your work and reasoning on the exam in order to receive full or partial credit. Score Problem Possible Points Score Total 50 file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (1 of 8)1/27/2007 5:21:48 PM
2 1. Integrated Circuit Structure [24 points] Process Sequence: 1. Starting Material: boron-doped silicon, concentration 5 x cm Deposit 250 nm of silicon dioxide and pattern using the oxide mask (dark field) 3. Implant phosphorus and anneal (depth 500 nm and concentration 1.25 x cm Deposit 250 nm of slicon dioxide and then etch 250 nm of oxide using the via mask (dark field). 5. Deposit 250 nm of aresenic-doped polysiliconsilicon and pattern using the polymask (clear field). The arsenic concentration is 5 x cm Deposit 250 nm of silicon dioxide and then etch 500 nm of oxide using the contact mask (dark field). 7. Depoist 500 nm of aluminum and pattern using the metal mask (clear field). single cyrstal mu n = 1000 cm Given : 2 / mu p = 400 cm silicon: 2 /(Vs) (Vs) polysilicon: mu n = 100 cm 2 /(Vs) mu p = 50 cm 2 /(Vs) (a) [8 pts.] Sketch the cross section A-A' on the graph below. Identify all layers clearly. file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (2 of 8)1/27/2007 5:21:48 PM
3 (b) [8 pts.] Sketch the cross section B-B' on the graph below. Indentify all layers clearly. (c) [2 pts] What is the sheet resistance R square, poly of the polysilicon layer in ohms/square? Given : the magnitude of the hole or electron charge is 1.6 x 10^-19 C. (d) [2 pts.] What is the sheet resistance R square, implant of the phosphorus-implanted layer [ohm/square]? file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (3 of 8)1/27/2007 5:21:48 PM
4 (e) [4pts] What is the numerical value of the resistance between terminals 1 and 2? You can neglect the "end squares" at connections between the conducting layers. If you have ano answers for parts (c) and (d), you can use R square, poly of = 250 ohms/square for the polysilicon layer and that R square, implant = 150 ohms/square for the phosphorus implanted layare for this part. 2. CMOS inverter pair [18 points] (a) [4pts.] This inverter pair ahs been "at rest" for some time with its input "high." The wave for for v in1 (t) is sketched file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (4 of 8)1/27/2007 5:21:48 PM
5 below. Draw teh switch-model circuit for finding the output voltage v out1 (t) of inverter 1 for t > 0. Provide some numerical values for the circuit elements. You can neglect the drain-bulk capacitances and any wire capacitance. (b) [4 pts.] Determine the wave form v out1 (t)(t) for t>0. (c) [4pts.] Due to contamination of the gate oxide furnace, you discover that the gate oxide is not a perfect insulator, but instead is modeled by a resistance R G = 1 kohm in parallel with the gate-source capacitance (C Gn for the NMOS, C Gp for the PMOS). Repeat part (a) using these "leaky" NMOS and PMOS transistors for both inverters. (d) [3pts] What is the value of v out1 (t)(t<0) for the circuit in part (c), assuming the input wave form v in1 (t) that is given in file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (5 of 8)1/27/2007 5:21:48 PM
6 part (a). Note that the inverter has had a "high" input for a long time before its input transitions at t = 0. (e) [3pts.] What is the value of v out1 (t)( t approaches infiniti) for the circuit in part (c), assuming the input waveform v in1 (t)1 (t) that is given in part (a). Hint: consider superposition. 3. Bond wire inductance [8 points] file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (6 of 8)1/27/2007 5:21:48 PM
7 (a) [5pts] The bond wire can be modeled by a 1 nh inductor. Given the wave form for the supply current i s (t), plot the voltage drop across the bondwire v bw (t) on the graph below. (b) [3pts] A particular circuit can tolerat at most v bw (t) = 250 micro - V for a critical application. How many bondwires are needed to meet this requirement, given the i s (t) waevform? Hint: consider whether series or parallel bond wires will help. file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (7 of 8)1/27/2007 5:21:48 PM
8 Posted by HKN (Electrical Engineering and Computer Science Honor Society University of California at Berkeley If you have any questions about these online exams please contact file:///c /Documents%20and%20Settings/Jason%20Raft...20-%20Fall%201998%20-%20Howe%20-%20Midterm%202.htm (8 of 8)1/27/2007 5:21:48 PM
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