Chapter 3: Basics Semiconductor Devices and Processing 2006/9/27 1. Topics

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1 Chapter 3: Basics Semiconductor Devices and Processing 2006/9/27 1 Topics What is semiconductor Basic semiconductor devices Basics of IC processing CMOS technologies 2006/9/27 2 1

2 What is Semiconductor Conductivity between conductor and insulator Conductivity can be controlled by dopant Silicon (Si) and germanium (Ge) Compound semiconductors SiGe, SiC GaAs, GaN, InP, etc. Conductivity control by impurity doping and electrical field application 2006/9/27 3 Periodic Table of the Elements 2006/9/27 4 2

3 Silicon Substrate and Dopants P-type Dopant Substrate N-type Dopants 2006/9/27 5 Orbital and Energy Band Structure of an Atom Valence shells Conducting band, E c Nuclei Band gap, E g Valence band, E v 2006/9/27 6 3

4 Band Gap and Resistivity Conductors Semiconductor Insulator E g = 1.1 ev E g = 8 ev Aluminum Sodium Silicon Silicon dioxide 2.7 cm 4.7 cm ~ cm > cm 2006/9/27 7 Crystal Structure of Single Crystal Silicon Si Shared electrons Si Si Si Si Si Si Si Si Si Si Si - Si Si 2006/9/27 8 4

5 Why Silicon Abundant, inexpensive Thermal stability Silicon dioxide is a strong dielectric and relatively easy to form Silicon dioxide can be used as diffusion doping mask 2006/9/27 9 N-type (Arsenic) Doped Silicon and Its Donor Energy Band Si Si Si Si As Si Conducting band, E c Extra E Electron d ~ 0.05 ev E g = 1.1 ev Si Si - Si Valence band, E v 2006/9/

6 P-type (Boron) Doped Silicon and Its Donor Energy Band Si Si Si Si B Si Si Si - Si Hole Electron Conducting band, E c E g = 1.1 ev Valence band, E v E a ~ 0.05 ev 2006/9/27 11 Illustration of Hole Movement Conducting band, E c Conducting band, E c Conducting band, E c Electron E g = 1.1 ev E a ~ 0.05 ev Electron E g = 1.1 ev Electron E g = 1.1 ev Hole Valence band, E v Hole Valence band, E v Valence band, E v Hole 2006/9/

7 Fermi-Dirac distribution function 2006/9/ /9/

8 Dopant Concentration and Resistivity Resistivity P-type, Boron N-type, Phosphorus Dopant concentration 2006/9/ /9/

9 Dopant Concentration and Resistivity Higher dopant concentration, more carriers (electrons or holes) Higher conductivity, lower resistivity Electrons move faster than holes N-type silicon has lower resistivity than p- type silicon at the same dopant concentration 2006/9/27 17 Miller Indices 2006/9/

10 Basic Devices Resistor Capacitor Diode Bipolar Transistor MOS Transistor 2006/9/27 19 Resistor l l R wh : Resistivity h w 2006/9/

11 Resistor Resistors are made by doped silicon or polysilicon on an IC chip Resistance is determined by length, line width, height, and dopant concentration 2006/9/27 21 Capacitors l h d hl d C 0 : Dielectric Constant 0 : permitivity in vacuum 2006/9/

12 Capacitors Charge storage device Memory Devices, esp. DRAM Challenge: reduce capacitor size while keeping the capacitance High- dielectric materials Time delay t = RC, low- materials for passivation 2006/9/27 23 Capacitors Poly Si Oxide Si Dielectric Layer Poly 1 Poly 2 Heavily Doped Si Dielectric Layer Poly Si Si Parallel plate Stacked Deep Trench 2006/9/

13 Metal Interconnection and RC Delay Dielectric, Metal, l I d w 2006/9/27 25 Diode P-N Junction Allows electric current go through only when it is positively biased. Work as switch and power rectifier 2006/9/

14 Diode V1 V2 P1 P2 V1 > V2, current P1 > P2, current V1 < V2, no current P1 < P2, no current 2006/9/27 27 Figure 3.14 Transition or depletion region P N Vp V0 Vn 2006/9/

15 Intrinsic potential across depletion region For silicon V 0 ~ 0.7 V kt V 0 ln q I-V Curve N N a 2 n i d I I 0 V b V 0 V 2006/9/27 29 Bipolar Transistor PNP or NPN Switch Amplifier Analog circuit Fast, high power device 2006/9/

16 NPN and PNP Transistors E B E C B N P N C C E B C B P N P E 2006/9/ /9/

17 NPN Bipolar Transistor Emitter Base Collector Al Cu Si SiO 2 n p n p n-epi Electron flow n + buried layer P-substrate p /9/27 33 Sidewall Base Contact NPN Bipolar Transistor Base CVD oxide Emitter Metal CVD oxide Collector CVD oxide Poly Field oxide p n n + n + p Epi Field oxide Buried Layer n + Field oxide P-substrate 2006/9/

18 2006/9/27 35 MOS Transistor Metal-oxide-semiconductor Also called MOSFET (MOS Field Effect Transistor) Simple, symmetric structure Switch, good for digital, logic circuit Most commonly used devices in the semiconductor industry 2006/9/

19 NMOS Device Basic Structure V G V D Metal Gate V G n + Source p-si n + Drain Ground V D 2006/9/27 37 NMOS Device Positive charges V G = 0 V D Electron flow V G > V T > 0 V D > 0 Metal Gate SiO 2 n + Source p-si n + Drain SiO 2 n + Source n p-si Drain No current Negative charges 2006/9/

20 PMOS Device Negative charges V G = 0 V D Hole flow V G < V T < 0 V D > 0 Metal Gate SiO 2 p + Source n-si p + Drain SiO 2 p + Source p n-si Drain + No current Positive charges 2006/9/ /9/

21 MOSFET 2006/9/27 41 MOSFET vs. Drinking Fountain MOSFET Drinking Fountain Source, drain, gate Source/drain biased Voltage on gate to turn-on Current flow between source and drain Source, drain, gate valve Pressurized source Pressure on gate (button) to turn-on Current flow between source and drain 2006/9/

22 Basic Circuits Bipolar PMOS NMOS CMOS BiCMOS 2006/9/27 43 Devices with Different Substrates Silicon Germanium Compound Bipolar MOSFET BiCMOS Dominate IC industry now Bipolar: high speed devices GaAs: up to 20 GHz device Light emission diode (LED) 2006/9/

23 Market of Semiconductor Products 100% Bipolar Compound 8% 4% 50% MOSFET 88% /9/27 45 Bipolar IC Earliest IC chip 1961, four bipolar transistors, $ Market share reducing rapidly Still used for analog systems and power devices TV, VCR, Cellar phone, etc. 2006/9/

24 PMOS First MOS field effect transistor, 1960 Used for digital logic devices in the 1960s Replaced by NMOS after the mid-1970s 2006/9/27 47 NMOS Faster than PMOS Used for digital logic devices in 1970s and 1980s Electronic watches and hand-hold calculators Replaced by CMOS after the 1980s 2006/9/

25 CMOS Most commonly used circuit in IC chip since 1980s Low power consumption High temperature stability High noise immunity Symmetric design 2006/9/27 49 CMOS Inverter V dd PMOS V in V out NMOS V ss 2006/9/

26 CMOS IC n + Source/Drain Gate Oxide p + Source/Drain Polysilicon p-si STI Balk Si n-si USG 2006/9/27 51 BiCMOS Combination of CMOS and bipolar circuits Mainly in 1990s CMOS as logic circuit Bipolar for input/output Faster than CMOS Higher power consumption Likely will have problem when power supply voltage dropping below one volt 2006/9/

27 IC Chips Memory Microprocessor Application specific IC (ASIC) 2006/9/27 53 Memory Chips Devices store data in the form of electric charge Volatile memory Dynamic random access memory (DRAM) S random access memory (SRAM) Non-volatile memory Erasable programmable read only memory (EPROM) FLASH 2006/9/

28 DRAM Major component of computer and other electronic instruments for data storage Main driving force of IC processing development One transistor, one capacitor 2006/9/27 55 Basic DRAM Memory Cell NMOS Word line Capacitor Bit line V dd 2006/9/

29 SRAM Fast memory application such as computer cache memory to store commonly used instructions Unit memory cell consists of six transistors Much faster than DRAM More complicated processing, more expensive 2006/9/27 57 EPROM Non-volatile memory Keeping data ever without power supply Computer bios memory which keeps boot up instructions Floating gate UV light memory erase 2006/9/

30 Passivation Dielectric EPROM V G V D Inter-poly Dielectric Gate Oxide n + Source Poly 2 Poly 1 p-si n + Drain Control Gate Floating Gate 2006/9/27 59 EPROM Programming Passivation Dielectric V G >V T >0 V D > 0 Inter-poly Dielectric Gate Oxide n + Source Poly 2 e - e - e - e - e - e - e - p-si n + Drain Control Gate Floating Gate Electron Tunneling 2006/9/

31 EPROM Programming Passivation Dielectric V G >V T >0 UV light V D > 0 Inter-poly Dielectric Gate Oxide n + Source e - e - Poly 2 p-si n + Drain Control Gate Floating Gate Electron Tunneling 2006/9/27 61 Basic Bipolar Process Steps Buried layer doping Epitaxial silicon growth Isolation and transistor doping Interconnection Passivation 2006/9/

32 Buried Layer Implantation SiO 2 P-silicon n /9/27 63 Epitaxy Grow n + buried layer n-epi P-silicon 2006/9/

33 Isolation Implantation p + n + buried layer n-epi p + P-silicon 2006/9/27 65 Emitter/Collector and Base Implantation p + n + p n + n + buried layer n-epi p + P-silicon 2006/9/

34 SiO 2 Metal Etch Emitter Base Collector Al Cu Si p + n + p n+ p + n-epi n + P-silicon buried layer 2006/9/27 67 SiO 2 Passivation Oxide Deposition Emitter Base Collector Al Cu Si p + n + p n+ p + n-epi n + P-silicon buried layer CVD oxide 2006/9/

35 MOSFET Good for digital electronics Major driving forces: Watches Calculators PC Internet Telecommunication 2006/9/ s: PMOS Process Bipolar dominated First MOSFET made in Bell Labs Silicon substrate Diffusion for doping Boron diffuses faster in silicon PMOS 2006/9/

36 PMOS Process Sequence (1960s) Wafer clean (R) Etch oxide (R) Field oxidation (A) Strip photo resist (R) Mask 1. (Source/Drain) (P) Al deposition (A) Etch oxide (R) Mask 4. (Metal) (P) Strip photo resist/clean (R) Etch Aluminum (R) S/D diffusion (B)/Oxidation (A) Strip photo resist (R) Mask 2. (Gate) (P) Metal Anneal (H) Etch oxide (R) CVD oxide (A) Strip photo resist/clean (R) Mask 5. (Bonding pad) (P) Gate oxidation (A) Etch oxide (R) Mask 3. (Contact) (P) Test and packaging 2006/9/27 71 Wafer clean, field oxidation, and photoresist coating Native Oxide N-Silicon N-Silicon Field Oxide Primer Field Oxide Photoresist N-Silicon N-Silicon 2006/9/

37 Photolithography and etch Source/Drain Mask Field Oxide Source/Drain Mask UV Light Photoresist PR N-Silicon N-Silicon Field Oxide Field Oxide PR PR N-Silicon N-Silicon 2006/9/27 73 Source/drain doping and gate oxidation Field Oxide Field Oxide N-Silicon p + p + N-Silicon Field Oxide Gate Oxide Field Oxide p + p + N-Silicon p + p + N-Silicon 2006/9/

38 Contact, Metallization, and Passivation Gate Oxide Field Oxide Gate Oxide Al Si Field Oxide p + p + N-Silicon p + p + N-Silicon Gate Oxide Field Oxide Gate Oxide CVD Cap Oxide p + N-Silicon p + p + N-Silicon p /9/27 75 Illustration of a PMOS Gate Oxide CVD Cap Oxide p + N-Silicon p /9/

39 NMOS Process after mid-1970s Doping: ion implantation replaced diffusion NMOS replaced PMOS NMOS is faster than PMOS Self-aligned source/drain Main driving force: watches and calculators 2006/9/ /9/

40 Self-aligned S/D Implantation Phosphorus Ions, P + Gate Polysilicon n + n + p-silicon Field oxide Source/Drain Gate oxide 2006/9/27 79 NMOS Process Sequence (1970s) Wafer clean PSG reflow Grow field oxide Mask 3. Contact Mask 1. Active Area Etch PSG/USG Etch oxide Strip photo resist/clean Strip photo resist/clean Al deposition Grow gate oxide Mask 4. Metal Deposit polysilicon Etch Aluminum Mask 2. Gate Strip photo resist Etch polysilicon Metal anneal Strip photo resist/clean CVD oxide S/D and poly dope implant Mask 5. Bonding pad Anneal and poly reoxidation Etch oxide CVD USG/PSG Test and packaging 2006/9/

41 NMOS Process Sequence Clean p-si p-si Field Oxidation Oxide Etch p-si p-si Gate Oxidation Poly Dep. p-si poly p-si poly Poly Etch P + Ion Implant p-si poly poly n + p-si n + Annealing 2006/9/27 81 NMOS Process Sequence PSG Dep. PSG poly p-si PSG poly p-si PSG Reflow PSG Etch PSG poly p-si Al Si PSG poly p-si Metal Dep. Al Si Al Si SiN Metal Etch PSG poly p-si PSG poly n + n + p-si Nitride Dep. 2006/9/

42 CMOS In the 1980s MOSFET IC surpassed bipolar LCD replaced LED Reduce power consumption of circuit CMOS replaced NMOS Still dominates the IC market Backbone of information revolution 2006/9/27 83 Advantages of CMOS Low power consumption High temperature stability High noise immunity 2006/9/

43 2006/9/27 85 Functional types of NMOS and PMOS transistors 2006/9/

44 CMOS Inverter, Its Logic Symbol and Logic Table V dd V in V out PMOS V in V out NMOS In Out V ss /9/ /9/

45 CMOS Chip with 2 Metal Layers PD2 Nitride PD1 Oxide Metal 2, Al Cu Si p + n + IMD PMD Poly Si Gate n + Al Cu Si BPSG LOCOS SiO 2 p + P-type substrate USG dep/etch/dep p + p + N-well 2006/9/27 89 CMOS Chip with 4 Metal Layers Tantalum barrier layer Passivation 2, nitride Passivation 1, USG Metal 4 Lead-tin alloy bump Copper FSG Tungsten plug Metal 3 Metal 2 M 1 Copper Cu Copper Cu FSG FSG FSG FSG FSG Nitride etch stop layer Nitride seal layer Tantalum barrier layer Tungsten local PSG Tungsten Ti/TiN barrier & Interconnection adhesion layer STI n + n + USG p + p + P-well PMD nitride 2006/9/27 N-well 90 P-epi barrier layer P-wafer 45

46 2006/9/27 91 IC Fabrication Processes Adding Ion implantation, Diffusion Grown thin film, SiO 2 Deposited thin film CV PVD Electrical Epi, Poly Dielectri Meta IC Fab. Removing Heating Patterning Wafer Clean Etch CMP Annealing Reflow Alloying Patterned etch Blanket Strip Meta Oxid Implantati Dielectri Meta Exposure (heating) Photolithography PR coating (adding) Baking (heating, 2006/9/27 92 Developing 46

47 Summary Semiconductors are the materials with conductivity between conductor and insulator Its conductivity can be controlled by dopant concentration and applied voltage Silicon, germanium, and gallium arsenate Silicon most popular: abundant and stable oxide 2006/9/27 93 Summary Boron doped semiconductor is p-type, majority carriers are holes P, As, or Sb doped semiconductor is p-type, the majority carriers are electrons Higher dopant concentration, lower resistivity At the same dopant concentration, n-type has lower resistivity than p-type 2006/9/

48 Summary R= l/a C= 0 A/d Capacitors are mainly used in DRAM Bipolar transistors can amplify electric signal, mainly used for analog systems MOSFET electric controlled switch, mainly used for digital systems 2006/9/27 95 Summary MOSFETs dominated IC industry since 1980s Three kinds IC chips microprocessor, memory, and ASIC Advantages of CMOS: low power, high temperature stability, high noise immunity, and clocking simplicity 2006/9/

49 Summary The basic CMOS process steps are transistor making (front-end) and interconnection/passivation (back-end) The most basic semiconductor processes are adding, removing, heating, and patterning processes. 2006/9/

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