PERFORMANCE OPTIMIZATION OF LDMOS FOR APPLICATION IN RF DOMAIN

Transcription

1 PERFORMANCE OPTIMIZATION OF LDMOS FOR APPLICATION IN RF DOMAIN Sarthak Bandyopadhyay 1, Sagar Mukherjee 1, Swarnil Roy 2, Kalyan Biswas 1 1 MCKV Institute of Engineering, Howrah, West Bengal, India 2 Meghnad Saha Institute of Technology, Kolkata, India 1 sarthak.vlsi@gmail.com Abstract- Lateral double-diffused MOSFET (LDMOS) transistor model is presented in this work. The model is done by Verilog A table model to develop the LDMOS structure. These models are developed directly from the physical structure so that they are useful in optimizing a particular device structure or in quantitatively comparing structures for a particular application. In the proposed work comparison of classical MOS based amplifier is presented over LDMOS based amplifier 1. INTRODUCTION Recent advances in processing technology and the introduction of new device structures have allowed dramatic improvements in the current, voltage, and power-handling capabilities of MOSFET devices. Power MOS transistors have recently begun to rival bipolar devices in power-handling capability. This new capability has arisen primarily through the use of double-diffusion techniques to achieve short active channels and the incorporation of a lightly doped drift region between the channel and the drain contact, which largely supports the applied voltage. Two main changes in the basic MOSFET [1] structure have been responsible for these advances. The first of these is the wide- spread use of double-diffusion techniques to achieve very short channels (1-3 pm) [l] The second major change in the basic MOSFET structure has been the incorporation of a lightly doped (usually n-) drift region between the channel and the n+ drain contact [1] - [4]. LATERAL double-diffused MOSFETs (LDMOS) have been frequently used in many kinds of integrated power circuits for automotive, consumer and RF applications [5] [7]. Proper design of these power circuits requires an accurate model of LDMOS devices. RF Power Amplifiers are used in a wide variety of applications including Wireless Communication, TV transmissions, Radar, and RF heating. The basic techniques for RF power amplification can use classes as A, B, C, D, E, and F, for frequencies ranging from VLF (Very Low Frequency) through Microwave Frequencies. RF Output Power can range from a few mw to MW, depend by application. The introduction of solid-state RF power devices brought the use of lower voltages, higher currents, and relatively low load resistances. It is the purpose of this paper to compare its characteristic and gain between normal MOS and LDMOS using one amplifier. The Verilog A table model file use to design LDMOS structure. 2. DEVICE STRUCTURE As said previous two main changes in the basic MOSFET structure have been responsible for these advances. The first of these is the wide- spread use of double-diffusion techniques to achieve very short channels (1-3 pm) [l], [2] although not all of the new power MOSFET s use double diffusion [3]. Sequential diffusion of p- and n-type impurities in a manner analogous to bipolar- transistor fabrication processes yields channel lengths comparable in dimension to bipolar base widths. Historically, this process has been difficult to control because the threshold voltage of the device is determined by diffused impurity pro- files rather than by bulk substrate doping levels

2 3. VERILOG A TABLE MODEL The wide- spread use of ion implantation has, however, largely eliminated this difficulty. The second major change in the basic MOSFET structure has been the incorporation of a lightly doped (usually n-) drift region between the channel and the n+ drain contact [11 - [4]. This region largely supports the applied drain potential be- cause its doping level is chosen to be much smaller than the p-channel region. These new structures, therefore, effectively separate the active portion of the device (channel) which determines device gain, from the region of the device which supports the applied voltage (drift region). This separation is exactly analogous to modern bipolar transistors in which a lightly doped collector region largely supports the applied potential and a narrow, more heavily doped base region largely determines device gain. The LDMOS may be readily fabricated on any silicon crystalline orientation. The LDMOS is constrained to have its channel along an etched (111) surface. The choice of (100) material for the LDMOS which is common, provides a 20-percent improvement in electron inversion-layer mobility [8], [9] and a 15- percent improvement in inversion-layer electron scattering-limited velocity [8]. These effects result in lower channel resistance and higher device transconductance per unit width in the LDMOS structures.ldmos is an asymmetric power MOSFET designed for low on-resistance and high blocking voltage. These features are obtained by creating a diffused p-type channel region in a low-doped n-type drain region. The low doping on the drain side results in a large depletion layer with high blocking voltage. The channel region diffusion can be defined with the same mask as the source region, resulting in a short channel with high current handling capability. The LDMOS also have high T OX thus the C OX is low so it can handle high frequency.[10] Here in this model we use table model function. The interpolation function, $table_model(), allows the module to approximate the behavior of a system by interpolating between user-supplied data points. The user provides a dataset of points (xi1, xi2,.., xin, yi) such that f(xi1, xi2,.., xin) = yi, where f is the model function and N is the number of independent variables of the model. These data points are stored in a text file and are accessed during the analysis by the Verilog-A module. The interpolation algorithm then approximates the true model behavior at any point in the domain of the sampled data. Data points outside of the sampled domain will be approximated via extrapolation of the data within the domain. Extrapolated data can be inaccurate and should be avoided. The Verilog-A algorithm is a piecewise-linear interpolation for the $table_model() function. However, higher-order interpolation algorithms may be provided in a future revision of the language.the $table_model() system function has the same restrictions as analog operators. That is, it cannot be used inside of if (), case(), or for() statements unless these statements are controlled by genvar-constant expressions. Syntax $table_model( table_inputs, table_data_source, table_ control_string ); Where table_inputs is an (optionally multidimensional) expression. For more information on the table_inputs argument, refer to Table Model Inputs. table_data_source is either a string indicating the name of the file holding the table data or the name of an array. For more information on the table_data_sourceargument, refer to Table Data Source. table_control_string is a two part string. The first character is an integer indicating the degrees of the spline interpolation (either 1 2 3). The second part of the control string consists of one or two characters (either C L E) indicating the type of extrapolation mode at the beginning and end of the data. For more information on the table_control_string argument, refer to Table Control String

3 The inputs to the $table_model() function are described in more detail in the following sections. Table Model Inputs The table_inputs are numerical expressions that are used as the independent model variables for the $table_model() function. They may be any valid expressions that can be assigned to an analog signal. Table Data Source The table_data_source argument specifies the source of sample points for the $table_model() function. The sample points may come from two sources: files and arrays. The file source indicates that the sample points be stored in a file, while the array source indicates that the data points are stored in a set of array variables. The user may choose the data source by either providing the file name of a file source or a set of array variables as an argument to the function. The table is created when the $table_model() system function is called for the first time. Any changes to the table_data_source argument(s) of the $table_model() after the first call are quietly ignored (that is, the table model is not recreated). For a file source, each sample point of the table is represented as a sequence of numbers in the order of Xi1 Xi2.. XiN Yi, where Xik is the coordinate of the sample point in k th dimension and Yi is the model value at this sample point. Each sample point must be separated by a new line. The numbers in the sequence must be separated by one or more spaces or tabs. Comments may be inserted before or after any sample point; comments must begin with `#' and end with a new line.the data file must be in text format only. The numbers must be real or integer. The sample points can be stored in the file in any order. Vds= 4.33 vds=8. 66 vds= vds= vd= vds= Vgs Id(A/ Id(A/u Id(A/ Id(A/ Id(A/ Id(A/um) (V) um) m) um) um) um) Table Control String The control string provides information on how the model should interpolate and extrapolate the table data. The control string consists of sub-strings for each dimension. Each sub-string may contain one character indicating the degree of the spine interpolation and an additional one or two character indicating the type of extrapolation method to be used. Table Interpolation Degree The degree character is an integer between 1 and 3 representing the degrees of splines to be used for the interpolation. If not given, a degree of 1 (linear) is assumed. Table 10-1 shows the possible settings. Table Extrapolation Method Characters Table Interpolation Interpolation Character Character Description 1 Linear spline (degree 1) 2 Quadratic spline (degree 2) 3 Cubic spline (degree 3) Extrapolation Control String The extrapolation control string is used to control the algorithm to extrapolate beyond the supplied data domain. The string may contain one or two extrapolation method characters. The extrapolation method determines the behavior of the table model when the point to be evaluated is beyond the domain of the user provided sample points. TheClamp extrapolation method, specified with the character C, uses a constant value from the last data point to extend the model. The Linear extrapolation method, specified with the character L, uses piecewise linear interpolation to estimate the requested point. The user may also disable extrapolation by setting the Error extrapolation method using the character E. In this case, an extrapolation error is reported if the $table_model() function is requested to evaluate a point beyond the interpolation region. Table 10-2summarizes these options

4 Table Extrapolation Method Characters Table Extrapolation Character C L E Extrapolation Character Description Clamp extrapolation Linear extrapolation (default) Error condition For each dimension of the table, users may use up to two extrapolation method characters to specify the extrapolation method used for each end of the data set. When no extrapolation method character is supplied, the Linear extrapolation method will be used for both ends as default behavior. When a single extrapolation method character is supplied, the specified extrapolation method will be used for both ends of the data set. When two extrapolation method characters are supplied, the first character specifies the extrapolation method used for the end with the lower coordinate value and the second character specifies the extrapolation method for the end with the higher coordinate value. Table 10-3 illustrates some control strings and their interpretation. Table Control String Examples Control Interpretation String "1LE,2EC" 1st dimension linear interpolation, linear extrapolation on left, error on extrapolation to right 2nd dimension quadratic interpolation, error on extrapolation to left, clamp on extrapolation to right "" Linear interpolation, Linear extrapolation to left and right,2 1st dimension linear interpolation, 2nd dimension quadratic interpolation, linear extrapolation to left and right 4. AMPLIFIER CIRCUIT AND PERFORMANCE OPTIMIZATION Using VERILOG A table model file, we design an amplifier to check its output characteristic curve. The amplifier contains one P-MOS and one N-MOS. We give the VDD of 25v DC and an input of.05v p-p with the 4.15v DC level and 1GHz frequency. Using the amplifier we get the amplified output with gain of db. "3,1" 1st dimension cubic interpolation, 2nd dimension linear interpolation, linear extrapolation to left and right In this paper LDMOS is used which has higher T OX (Oxide Thickness) and so it s C OX (Oxide Capacitance) is low

5 C OX = Where, T OX = Oxide Thickness C OX = Oxide Capacitance Є = Permittivity T OX As C OX is low total time is also low so the frequency is high. Thus this LDMOS can handle high Frequency and we can use it in the RF domain (RF Amplifier) T = T ON + T OFF COX, T, Fq Fq = 1 T The input and output waveform of the amplifier is shown in fig 4, 5 respectively. 5. CONCLUSION In conclusion the LDMOS is used in high frequency RF device because of its high frequency handling capability. In this paper we proved that using LDMOS we designed one amplifier and we recorded db gains for 1GHz frequency range. 6. ACKNOWLEDGEMENT The author would like to thank Sagar Mukherjee in the Department of Electronics And Communication Engineering, MCKVIE. The author is also grateful of Department of Electronics And Communication Engineering, MCKVIE. The device was designed and implemented using Verilog A which is made available by department. 7. REFERENCES [I] H. J. Sigg, G. D. Vendelin, T. P. Cauge, and J. Kocsis, D-MOS transistor for microwave applications, IEEE Trans. Electron Devices, vol. ED- 19, pp , Jan [2] V. A. K. Temple and R. P. Love, A 600 volt MOSFET with near ideal on resistance, in IEDM Con$ Dig., pp , [3] M. Nagata, Highpower MOSFETs, Inst. Phys. Conf., Ser. no. 32, pp , [4] J. D. Plummer and J. D. Meindl, A monolithic 200-V CMOS analog switch, IEEE J. Solid-State Circuits, vol. SC-11, no. 6, pp , Dec [5] J. van der Pol, A. Ludikhuize, H. Huizing, B. van Velzen, R. J. E. Hueting,J. F. Mom, G. van Lijnschoten, G. J. J. Hessels, E. F. Hooghoudt, R.van Huizen, M. J. Swanenberg, J. H. H. A. Egbers, F. van den Elshout, J. J. Koning, H. Schligtenhorst, and J. Soeteman, A- BCD: An economic 100 V RESURF silicon-oninsulator BCD technology for consumer and automotive applications, inproc. ISPSD, 2000, pp [6] L. Larson, Silicon technology tradeoffs for radiofrequency/mixedsignal systems-on-a-chip, IEEE 788

6 Trans. Electron Devices, vol. 50, no. 3, pp , Mar [7] R. Bianchi, C. Raynaud, F. Blanchet, F. Monsieur, and O. Noblanc, High voltage devices in advanced CMOS technologies, inproc. IEEE CICC, Sep. 2009, pp Kalyan Biswas M.Tech from Calcutta Univercity in 2000 and is currently working as Assistant Professor in MCKV Institute of Engineering, Howrah, West Bengal, India. [ 81 F. F. Fang and A. B. Fowler, Hot electron effects and saturation pp ,Mar. 15, velocities in silicon inversion layers, J. Appl. Phys., vol. 41, [9] S. C. Sun and J. D. Plummer, Electron mobility in inversion and accumulation layers on thermally oxidized silicon surfaces, pre- sented at the IEEE Semiconductor Interface Specialists Conf., [10] A Novel Compact High-Voltage LDMOS Transistor Model for Circuit Simulation Longxing Shi, Kan Jia, and Weifeng Sun,Member, IEEE Authors Profile Sarthak Bandyopadhyay received the DIPLOMA in Electronics and Telecommunication Engineering from Engineering Institute for Junior Executives West Bengal, India, in 2010 and B.TECH degree in Electronics And Communication Engineering from Techno India Saltlake, West Bengal, India, in 2013 and is currently working toward the M.TECH degree in ECE VLSI DESIGN at MCKV Institute of Engineering, Howrah, West Bengal, India. Sagar Mukherjee the B.TECH degree in Electronics And Communication Engineering from MCKV Institute of Engineering, Howrah, West Bengal, India, in 2009 and MTECH in VLSI from Jadavpure University, West Bengal, India, in 2012 and is currently working as Assistant Professor in MCKV Institute of Engineering, Howrah, West Bengal, India. Swarnil Roy the B.TECH degree in Electronics And Communication Engineering from MCKV Institute of Engineering, Howrah, West Bengal, India, in 2009 and MTECH in VLSI from Jadavpure University, West Bengal, India, in 2014 and is currently working as Assistant Professor in Meghnad Saha Institute of Technology, ECE department, Kolkata, India 789