CPE 100L LOGIC DESIGN I
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1 CPE 100L LABORATORY 3: COMBINATIONAL CIRCUIT DESIGN FULL ADDER BY GRZEGORZ CHMAJ DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING UNIVERSITY OF NEVADA, LAS VEGAS GOALS: Develop the ability to write a Boolean Expression for a given logic circuit. Then by applying the rules of Boolean Algebra, be able to reduce the expression to its simplest form. Then by constructing the circuit with the simplified expression, prove that the two circuits result in a similar truth table. In addition, gain understanding of delay and power consumption. IMPLEMENTING OWN ELEMENT IN QUARTUS Quartus II 13.1 offers the possibility to create user defined elements. This simplifies the schematic design, as larger parts of the circuit can be represented as a block with inputs and outputs. Creating your own Full Adder block: 1. Create Full Adder circuit: 2. Compile your project 3. Create your element: go to File Create / Update Create Symbol Files for Current File. In the save dialog, put the name of new element, e.g. TestFA. DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 1
2 After the process is done, the element can be selected from the list in Symbol Tool. Go to Windows Explorer and navigate to the folder that contains your project. You'll see TestFA.bsf file, that was created. This file contains the definition of your new symbol. When you type the name you gave to new element it will appear as any other element: Now it can be used in the schematic design. Double-clicking the element in the schematic, will show the inside design of your element. Using new element in another projects To use your element in another project, copy the file containing symbol definition (here: TestFA.bsf) and bdf file to the project directory. Then it will appear in the Symbol Tool. DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 2
3 LAB DELIVERIES: PRELAB: 1. Logic Minimization Utilizing the method of sub-expressions for the output of each gate, determine the Boolean Expression F of the circuit in Figure 1: Figure 1. Digital Logic Circuit Having the function F derived, do the following: 1. Apply the rules of Boolean Algebra to reduce the expression to its simplest form F1 2. Sketch a schematic diagram for the simplified expression F1. 3. Simulate the circuit using Altera Quartus. Refer to the class website for tutorial on using Atera Quartus. 2. Full adder: 1. Create a full adder schematic as shown of Figure 2 2. Create a macro of Full adder to use for hierarchical design. 3. Perform simulation and verify that it matches FA truth table shown on Table 1. Figure 2. Full adder DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 3
4 A B CIN S COUT Table 1. Truth table for Full Adder 3. Prelab deliveries Include in the report document: 1. Schematics of F created in Quartus 2. F simulation waveform generated by Quartus 3. Schematics of F1 created in Quartus 4. F1 simulation waveform generated by Quartus 5. Comparison of waveforms for F and F1 6. Schematics of full adder created in Quartus 7. Full adder simulation waveform generated by Quartus DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 4
5 LAB EXPERIMENTS: 1. Experiment 1: Full Adder implementation 1. Implement your full adder circuit on breadboard 2. Test your circuit against full adder truth table. 3. Demonstrate your verified circuit to TA (don t disassemble your circuit). 2. Experiment 2: Ripple Carry Adder on the breadboard 1. Build the second Full Adder on the breadboard, and connect to the one from experiment 1 to create Ripple Carry Adder. Test if addition works properly. 2. Demonstrate the circuit to the TA. 3. Experiment 3: Ripple Carry Adder 1. Create Quartus II project, and implement the Full Adder 2. Using instructions from the section above of this document, create a symbol of your full adder. 3. Create new project for Ripple Carry Adder, and copy your new symbol to the project directory. 4. Create the Ripple Carry Adder schematic, containing two full adders using new symbol (Figure 3). 5. Test your ripple carry adder by adding numbers: 11 and 10. Do the test using simulator, set the following inputs to the following values: A0=1, A1=1, B0=1, B1=1, C0=0, C1=0. 6. Demonstrate your schematic and simulation to TA Figure 3. Ripple Carry Adder DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 5
6 POSTLAB REPORT: Include the following elements in the report document: Section Element 1 Theory of operation Include a brief description of every element and phenomenon that appears during the experiments. 2 Prelab report Results of the experiments Experiment Experiment Results 3 a. Truth table of Full Adder 1 b. Picture of Full Adder wired on the breadboard 2 a. Truth table of Ripple Carry Adder b. Picture of Ripple Carry Adder wired on the breadboard a. Contents of your symbol file (open in notepad and copy / paste to your 3 report) b. Screenshot of your Ripple Carry Adder schematic c. Screenshot of the simulation showing addition. Answer the questions Question no. Question 4 1 What is Full Adder and how it is different from Half Adder? 2 What is Boolean Algebra? 3 What is Carry-In and Carry-Out? 5 Conclusions Write down your conclusions, things learned, problems encountered during the lab and how they were solved, etc. 6 Attachments Zip your projects. Send through WebCampus as attachments, or provide link to the zip file on Google Drive / Dropbox, etc. List of attachments to deliver: 1. Function F Quartus Project 2. Function F1 Quartus Project 3. Full Adder Quartus project References: 1. Using breadboard: 2. Datasheets of 7400 series chips: DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING 6
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