CMOS: Fabrication principles and design rules
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1 CMOS: Fabrication principles and design rules João Canas Ferreira University of Porto Faculty of Engineering
2 Topics 1 Overview of the CMOS fabrication process 2 Geometric design rules João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
3 CMOS technology evolution Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
4 Ingots of doped silicone Fonte: [May04] Diameters: 300 mm and 400 mm João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
5 Czochralski method Fonte: [May04] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
6 Ingot production Fonte: [ João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
7 Photolithography Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
8 Masks Fonte: [May04] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
9 Mask projection Fonte: [May04] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
10 Transfer Fonte: [May04] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
11 Optical correction (pre-distortion) Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
12 Inverter: cut view Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
13 Inverter: masks Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
14 Triple-well process Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
15 Well isolation (trenches) Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
16 Gate oxide Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
17 Source and drain formation Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
18 Improvements Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
19 Metal connections Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
20 Example: 11 levels of metal Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
21 If things go wrong... Fonte: R. Rodríguez-Montañés et al., Bridging Defects Resistance in the Metal Layer of a CMOS Process, J. Electronic Testing: Theory and Applications 8, (1996) João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
22 Topics 1 Overview of the CMOS fabrication process 2 Geometric design rules João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
23 Design rules The geometric design rules are a contract between the foundry and the designer. These rules are the designer s interface to the fabrication process. They guarantee that the transfers onto the wafer preserve the topology and geometry of the patterns. Rules specify: minimum separations, minimum and maximum widths, overlap rules Scalable rules: distances are specified as multiples of λ Minimum gate width: 2λ Industrial processes generally state their rules in microns (non-scalable). João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
24 Masks for an inverter (n-well) Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
25 Substrate contacts Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
26 Classes of rules Well Definition of: p-well, n-well, deep-n-well. For twin-tub processes only one well may be specified (n-well). Transistors Four masks: active (diffusion), n-select (n-implant), p-select, poly active + n-select + p-well + poly : NMOS transistor active + p-select + n-well + poly : PMOS transistor active + n-select + n-well + contact : contact to well active + p-select + p-well + contact : contact to well/substrate Some systems create the active masks from the select masks. Contacts One mask metal1/p-active, metal/n-active, metal-poly, metal/substrato fixed size; use more than one contact in parallel Metal Rule values depend on the level (increasingly larger and more separated) Rules for connection between metal levels (vias): modern processes allow stacked vias. João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
27 FreePDK45: POLY rules João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
28 FreePDK45: WELL rules João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
29 FreePDK45: ACTIVE rules (DIFFUSION) João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
30 FreePDK45: regras IMPLANT (SELECT) (Figure is confusing: active, n-well and n-implant layers have the same color!) João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
31 FreePDK45: CONTACT rules João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
32 FreePDK45: METAL1 rules (1/2) João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
33 FreePDK45: METAL1 rules (2/2) João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
34 Once upon a time... Fonte: [Weste11] João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
35 References Sources of the figures: May04 G.S. May, S. M. Sze, Fundamentals of Semiconductor Fabrication, Wiley, Rabaey03 J. M. Rabaey et al, Digital Integrated Circuits, 2nd edition,prentice Hall, Weste11 N. Weste, D. Harris, CMOS VLSI Design, 4th ed., Pearson Education, The FreePDK45 Wiki specifies the FreePDK45 design rules: João Canas Ferreira (FEUP) CMOS: Fabrication principles and design rules / 35
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