21 rue La Noue Bras de Fer Nantes - France Phone : +33 (0) w7-foldite :

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1 21 rue La Noue Bras de Fer Nantes - France Phone : +33 (0) info@systemplus.fr - w7-foldite : February 2013 Version 1 Written by: Sylvain HALLEREAU DISCLAIMER : System Plus Consulting provides cost studies based on its knowledge of the manufacturing and selling prices of electronic components and systems. The given values are realistic estimates which do not bind System Plus Consulting nor the manufacturers quoted in the report. System Plus Consulting is in no case responsible for the consequences related to the use which is made of the contents of this report. The quoted trademarks are property of their owners by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 1

2 Executive Summary This Reverse Costing study has been conducted in order to give insight on technology data, manufacturing cost and selling price of the component TK31E60W from Toshiba. This component is a DTMOS 4 transistor, the new generation of Silicon N-Channel MOS Field Effect Transistor (MOSFET) from Toshiba, using the first super-junction MOSFET deep trench filling process. The super-junction structure has vertical paths to allow electrical current to easily flow through in a silicon substrate. Its R DS(ON) =0.073Ω is lower than the theoretical limit of silicon and enables a reduction in power consumption. The deep trench filling process allows a reduction of 27% of the pitch between the superjunction columns as compared with a old multi-epitaxy process. And compared to the first super-junction generation, the Rds(on) has been reduced by 44% and the current density by mm sq. has increased 40%. The function of the component is to drive high power signals: 600V / 31A (at 25 C) and it is used in Power Switching applications : - PFC - LCD & PDP TV - Hard switching PWM - Telecom and UPS - Adapter 2013 by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 2

3 Table of Contents Executive Summary 2 3. Manufacturing Cost 46 Table of Contents 5 Wafer Fabrication Unit Reverse Costing Methodology 6 Yields Explanation MOSFET Unprobed Wafer Cost 1. Physical Analysis 7 Wafer Cost per process steps Physical Analysis Methodology Equipment Cost per Family Package Material Cost per Family Die Overview Probe Test Gate Dicing and Package Guard Ring Final Test Cost MOSFET Cell SuperJunction Component Manufacturing Cost MOSFET Cell Yields synthesis Polysilicon Gate Contact Guard Ring 4. Price estimation 63 Back Side MOSFET Structure Glossary 67 Deep Trench Superjunction Contacts Manufacturing Process DTMOS Transistor Process Flow Process Flow by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 3

4 Package Markings The package type is a TO-220 Package size : 15mm x 10mm x 4.45mm Drain (Heat sink) Pin pitch : 2.54mm The package markings include the following markings : Drain Heat sink Toshiba K31E60W Drain (D) Gate (G) Source (S) Package top view. Package back view. There is a heat sink on the back side of the package connected to the Drain pin by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 4

5 Package opening The component is composed of a single die. Drain (Heat sink) Heat Sink / Drain contact. Gate contact. Source contact. Polyimide passivation (in yellow) etched with the resin Gate (G) Drain (D) Source (S) Package opening. The die is connected to the package using : the drain is soldered on the leadframe (heatsink 2 bonding of 400µm diameter (Source contact), 1 bonding of 100µm diameter (Gate contact) by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 5

6 Gate - Pad Aluminum Gate pad is covered by an aluminum layer. A thin TiN layer enhances the contact between the aluminum and the polysilicon Thin Tin layer Gate pad overview - Aluminum level Poly Contact between the pad in aluminum and the gate supply line in polysilicon. Gate pad overview TiN level Insulation oxide layer Opening for the contacts with the poly Gate pad overview - polysilicon level Trench filled with polysilicon Gate pad overview oxide level 2013 by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 6

7 Source Area With this cross section, we can see the MOSFET elementary cells that compose the component. The cross-section is not aligned with the gates. The dimensions on the cross-section are not typical. The actual pitch between two elementary cells is xxµm by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 7

8 DTMOS Transistor Process Flow Implantation P SiN deposition Pattern SiN etching Implantation Diffusion P Well Implantation P+ Oxide etching Pattern Implantation Diffusion P+ Contact Implantation N+ Pattern Implantation Diffusion N+ Source Drawing not to Scale 2013 by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 8

9 Unprobed MOSFET Wafer Cost 200mm 2013 by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 9

10 Breakdown per process step - Front side 1/ by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 10

11 Estimation of the Selling Price 2013 by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 11

12 Contact The Reverse costing analysis represents the best cost/price evaluation given the publically available data, completed with industry expert estimates. These results are open for discussion. We can re-evaluate this circuit with your information. Please contact us: 2013 by SYSTEM PLUS CONSULTING, all rights reserved. Toshiba TK31E60W DTMOS 4 Superjunction 12