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1 presents High-Speed High-Accuracy 3D VLSI Extraction ICCAD99 1

2 Motivation Interconnects Now Dominate VLSI " Timing " Signal Integrity Gate Interconnect Delay [%] µm 0.35 µm 0.25 µm 0.18 µm 0.13 µm Process Technology Existing Interconnect Extractors Fail " Poor Accuracy & High Speed " Medium Accuracy & Very Low Speed Need High-Speed High-Accuracy Extractor ICCAD99 2

3 Overview Company Technology " High-speed High-accuracy BEM 3D Field Solver " Efficient Net-by-Net RC Extraction Products " Extraction of Critical Cells, Blocks, Nets " Distributed RC Models " IR drop " Substrate Coupling Differentiation " 2D / 2.5D / 3D Tools Summary ICCAD99 3

4 Coyote Systems History " Privately held, located in San Francisco CA " Founded in July 1996 by 3D Field Solver & MEMS experts " DARPA contract to develop extremely fast & easy-to-use 3D CAD for MEMS Products " First MEMS product AutoMEMS announced July 1998 " First VLSI product AutoIC announced June 1999 " New Tools - AutoIC v2, AutoIC-SMP, AutoNet, AutoSubstrate, AutoIRdrop, AutoMEMS v2 Customers " End-users include Siemens, Monterey, Analog Devices, Motorola, Texas Instruments, Hewlett-Packard, Sandia, MIT, Berkeley, CMU " OEM licenses include Monterey Design ICCAD99 4

5 Company Mission VLSI Provide premium high-speed high-accuracy solutions for extraction, timing, and signal integrity problems for modern VLSI designs. MEMS Provide premium high-speed high-accuracy analysis of large, realistic MEMS devices. ICCAD99 5

6 Coyote Products Technology " AutoBEM Fastest BEM field solver " AutoBEM-SMP Exploit fine-grained parallelism on SMP computers VLSI " AutoIC Capacitance extraction of interconnects " AutoIC-SMP SMP support " AutoNet Distributed RC models from layout " AutoSubstrate Resistive coupling in substrate " AutoIRdrop Potential drop in powergrid MEMS " AutoMEMS Coupled electro/mechanical simulator " AutoMEMS-SMP SMP support ICCAD99 6

7 VLSI Geometries Interconnects dominate performance Deep submicron is 3D " Huge layouts " Intricate topologies " IBM " AMD ICCAD99 7

8 VLSI Extraction RC Interconnect Extraction Tools " High-Speed " High-Throughput " High-Capacity " High-Accuracy Possible Alternatives " 3D Field Solvers " Statistical Methods " Pattern Matchers - Coyote Systems - QuickCap - Simplex - Raphael - Frequency - FastCap - Mentor - Ultima Identify Advantages/Disadvantages ICCAD99 8

9 Pattern Matchers Why they are used " Mature technology, Very Fast " Requires 3D field solver to develop pattern library 2D/2.5D tools do not capture 3D DSM effects " Fast (<100,000 nets/hour) after lengthy precharacterization ( hours) " Increasing difficulties with modern processes - Many Layers, small feature sizes - Arbitrary angles & non-manhattan geometries - PCB-style variable wire width - Increasing number of patterns needed " Optimistic error cancellation - no bounded errors " Large errors (>20%) ICCAD99 9

10 Accuracy Problem! " Some pattern matching vendors claim <<10% errors " Simple counterexample D Field Solver Pattern Matching " 3D simulation reveals 20% errors using superpositioning! " Geometric non-linearities prevent accurate solutions ICCAD99 10

11 Statistical Methods Why are they sometimes used " Alternative to FEM, FDM " Reasonably good for Self-Cap & Small Problems Why will they not solve the problem " No Distributed R s & C s " Very long run times with increasing number of nets " Inaccurate Coupling Capacitance - Cij " Only supports Manhattan Geometries " Expensive support for multiple dielectrics " Solves only part of the problem - Cii ICCAD99 11

12 Alternative Solvers Proposed Technologies " FEM " FDM " Traditional BEM Why will they not solve the problem " Not fast enough " Limited to very small problems " Huge memory and CPU time requirements Computationally not feasible ICCAD99 12

13 VLSI Extraction Coyote combines advantages of all approaches! " Field solver accuracy " Pattern matcher speed & capacity Accuracy Coyote Field solver Pattern matcher 0 Capacity Speed ICCAD99 13

14 VLSI Geometries Interconnects dominate performance Deep submicron is 3D " High aspect ratios " Extreme Density " Round Corners " Cylindrical Vias " Variable width wires " Nonideal Cross- Sections " IBM " AMD " Coyote can verify the effect of all these features! - Simplex, Frequency, Avanti, Mentor, QuickCap cannot 3D problems require 3D solutions! ICCAD99 14

15 3D Field Solvers Arbitrary Geometries " PCB-style, manhattan & non-manhattan Arbitrary Materials " Planar & conformal dielectrics Arbitrary Boundary Conditions " Neumann, Dirichlet, mixed, floating Only Coyote s AutoIC solves everything! " AutoIC is faster, more accurate, and easier to use! ICCAD99 15

16 3D Field Solvers If field solver, then pick best field solver " Simplest, smallest model " Most accurate (states & gradients) " Fastest runtime " Lowest memory requirements BEM FEM Direct Iterative Multipole Direct Iterative Nr. nodes N^2 N^2 N^2 N^3 N^3 Memory N^4 N^4 (NlogN)^2 N^6 N^4.5 CPUtime N^6 N^4 (NlogN)^2 N^9 N^4.5 " Coyote uses Multipole Accelerated BEM " Computational Scaling N^2 NlogN ICCAD99 16

17 AutoIC Field Solver VLSI Interconnect Extraction " Accelerated Boundary Element Method " Automatic meshed 3D model from 2D layout " Adaptive mesh refinement " Robust automation " Scriptable batch-mode or interactive GUI-mode operation " Superset of Sematech extraction API " Cluster & symmetric multiprocessing (SMP) support ICCAD99 17

18 AutoIC Speed AutoIC 3D Field Solver " 2,000,000 BEM elements/hour per cpu " 1,500 nets/hour per cpu (user selected <2% error) AutoIC vs. Field Solvers " 10-50x faster than QuickCap " x faster than Raphael AutoIC vs. Library-based "Pattern Matchers" " Similar speed to Frequency Accuracy +2.93% to -4.93% with no outliers Performance Full accuracy / GDS mode : 500 nets /hour: Full accuracy / LEF- DEF mode : 2500 nets/hour -fast option (+/- 15% accuracy) : 6500 nets/hour 5 5/26/99 Copyright 1999 by Frequency Technology, Inc. All rights reserved. ICCAD99 18

19 AutoIC Best Performance " Faster than FastCap, QuickCap, Raphael, Space, etc. " As fast as pattern matchers! " Solves many more problems " Large savings replacing multiple licenses " Large engineering time savings ICCAD99 19

20 Customer Tests Motorola SRAM Evaluation " Self-cap Extraction " Cross-cap Extraction " Convergence " Time & Memory " Model Generation " Ease-of-Use Motorola Compared " AutoIC " QuickCap " Raphael ICCAD99 20

21 Motorola SRAM Cell Convergence of bit-line self-capacitance " Require better than ±5% accuracy 2.50E E-15 AutoIC " x faster! " Best convergence! " Tight error bounds! Capacitance [F] 1.50E E E-16 AutoIC-constant AutoIC-linear Raphael QC 0.01u QC 0.005u 105% 95% 0.00E cputime [sec] (AutoIC on 500MHz PentiumIII, others on 333MHz UltraII) ICCAD99 21

22 Siemens Block Extract Critical Nets " 500 nets " 1x1mm die " 0.35um process " 3 metal layers " Multiple dielectrics 60 AutoIC results " <2% Errors " Excellent scaling " 8mm/min extraction Extraction Time [sec] " All nets extracted in 20 min using 1 cpu = 1,500 nets/hour " All nets extracted in 1 min using 20 cpus = 30k nets/hour um/min Critical Net Length [um] ICCAD99 22

23 Design Flow Industry Std Layout " GDSII, annotated GDSII, CIF, Sematech API 3D Model Generator " Flexible process descriptor " API-mode or Batch-mode or GUI-mode 3D RC Extraction " Lumped, distributed " API-mode or Batch-mode or GUI-mode Industry Std Output " Spice, Sematech API " 3D visualization ICCAD99 23

24 Model Generation Input " Layout " Process Description - Arbitrary layers - Interlayer dielectrics - Conformal dielectrics Output " Meshed 3D Model ICCAD99 24

25 Applications Critical Cells " Coefficient generation " Cell optimization Critical Blocks " IP characterization " Routing Critical Nets " Clock trees, control lines " User-selected nets Substrate Coupling IR drop " Power grid effects delays ICCAD99 25

26 Critical Cells AutoIC simulates 10,000 cells in 2 hours " 1 AutoIC license replaces Raphael licenses " Adaptive meshing on SRAM bit-line shown ICCAD99 26

27 Cell Optimization AutoIC identifies where interactions occur Modify layout to optimize performance " Magnitude of electrostatic flux on SRAM bit-line shown ICCAD99 27

28 Critical Nets Handles largest global nets " Automatic tunneling around aggressor net " 3D visualization indicates crosstalk areas " Designer can modify layout to eliminate problem " 1 AutoIC license replaces QuickCap licenses ICCAD99 28

29 Critical Blocks PCB-style layout (Cypress) " Non-manhattan Geometries " Varying Linewidths " AutoIC 500x faster than QuickCap! " Aggressor net, 3D tunnel & 3D mesh shown ICCAD99 29

30 Non-Ideal Fabrication AutoIC simulates Process Variations " Any geometry " Any material AutoIC correctly solves floating filler metal " Note that filler adds 20% to self-cap! " Non-zero potential on floating filler shown ICCAD99 30

31 AutoIC-SMP Scaling Symmetric multiprocessing support " Excellent scaling with every added CPU " Accelerates both large and small nets SMP Scaling for Critical Net Extraction 4 Relative Scaling 3 2 Large Monterey benchmark global net (control90!reset) small net (control90!n6969) Number CPUs (Sun Ultra Enterprise 450) ICCAD99 31

32 "The Layout is the Design" Timing Delay " Self-capacitances dominate Signal Integrity " Noise or Crosstalk " Cross-capacitances dominate AutoIC generates lumped RC models " Extracts high-accuracy 3D self-caps and cross-caps from the interconnect layout " 3D visualization identifies areas for correction AutoNet generates distributed RC models " Important differences between lumped and distributed simulations ICCAD99 32

33 AutoNet Go from Layout to Distributed Spice Variable model size Segment1 " Lumped net = 1 segment A T1 V1 T3 B " Distributed net = multiple segments Segments a T4 V3 V2 C T2 T5 D b " Spice star-model for each segment " Created from layout " Cross-caps between segments A Segment1 T1 V3 V1 Segment3 T3 B a T4 Segment4 " Compact Spice model size " No model reduction needed C T2 Segment2 D V2 T5 Segment5 b ICCAD99 33

34 AutoNet Automatic segmentation " 5 segments on Net1 " 4 segments on Net2 Net1 Net2 Distributed RC spice model " Each segment has self-capacitance " Each segment has cross-capacitances to segments on other nets B A A B C D E a b c d C D E a b c d ICCAD99 34

35 AutoNet Parallel bus lines " Generated distributed model (8 segments per net) " Generated lumped T-model (1 segment per net) volts Unit step response Vin 8 segments T-model time [ps] Crosstalk volts Vin 8 segments T-model 0.2 " Step Response - Distributed and T model responses similar " Coupling - Distributed and lumped responses similar time [ps] ICCAD99 35

36 AutoNet Non-uniform bus lines " Generated distributed model (4-5 segments per net) " Generated lumped T-model (1 segment per net) volts Unit step responses Vin 4/5 segments T-model Victim B time [ps] Victim A Crosstalk Vin Victim A, 4/5 segments Victim B, 4/5 segments Victim A, T-model Victim B, T-model volts Aggressor " Step Response - Distributed and T model responses similar " Coupling - 2x more noise on distributed model time [ps] ICCAD99 36

37 AutoNet Parallel lines with varying cross-section " Net1 switches Unit step response and coupling effects Net Net1 0.8 volts [V] Vin response, 4/5 segments response, T-model response, self capacitance coupling, 4/5 segments coupling, T-model 0.2 " Step Response - Distributed and T models similar - Commonly used self-cap model is inaccurate " Coupling - 30% larger noise with distributed model time [ps] ICCAD99 37

38 AutoNet Non-uniform parallel lines " Nets switch in opposite directions Net High/low switch response Non-monotonic Net1 0.8 volts [V] Vin 1 Vin 2 Vout 1, 4/5 segments Vout, T-model 1 Vout 2, 4/5 segments Vout, T-model " Step Response - Distributed and T models similar " Coupling time [ps] - Distributed model shows non-monotonic behavior ICCAD99 38

39 AutoNet Clock Tree Skew " Hierarchical H-shaped layout " 256 terminals Clock skew volts [V] Vin Vout 1 Vout 2 Vout sample segments time [ps] " RC model with 70 segments " Non-constant clock skew due to cross capacitances " 20% clock skew at 3 random clock terminals! ICCAD99 39

40 AutoNet Compare Floating Filler & Grounded Filler " 3x3 crossing bus " Net1 switches Unit step response, filler floating / grounded Net1 Net2 Net3 volts [V] Vin Vout 1, floating filler Vout 1, grounded filler Vout 2, floating filler Vout 2, grounded filler Vout 3, floating filler Vout 3, grounded filler time [ps] Significant filler problem " 25% difference in risetime " 9x increase in noise level ICCAD99 40

41 AutoIRdrop AutoIC solves 3D field outside interconnects AutoIRdrop solves 2D/3D field inside interconnects " Varying angles, width, cross-section " Vias " Aluminum, copper " Current sink/source 4 2D/3D Field Solver " Solves potential drop - Resistance " Solves current density through wire - Enables electromigration analysis ICCAD99 41

42 AutoIRdrop "Naive" Resistance Network " N-ports require N simulations, resulting in N 2 resistances 1 2 "Smart" Resistance Network " N-ports require N simulations, resulting in N resistances Field Simulation " 2D resistance is very accurate, much faster than 3D " 2D suitable for resistance, 3D suitable for capacitance 2 3 ICCAD99 42

43 AutoSubstrate Solves 3D field inside substrates " Contacts " Multiple materials 3D Field Solver 10 " Solves potential distribution " Solves electrostatic flux distribution " Solves current density through contacts ICCAD99 43

44 AutoSubstrate Resistance Network " Resistance calculated from calculated current densities " Resistor for every portport interaction " Automatic spice model Ohm x Port Port ICCAD99 44

45 Shipping Now Fastest, Most accurate, Easiest to use " Replace multiple tools " Large engineering time savings Licenses " End-user licenses " OEM, Embedded licenses Available Now " Sun, Linux, HP platforms " Uniprocessor & SMP configurations ICCAD99 45

46 For More Information Contact " Dr. Per Ljung 2740 Van Ness Ave. #210 San Francisco, CA (415) x12 ICCAD99 47

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