Tunnel FET architectures and device concepts for steep slope switches Joachim Knoch
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1 Tunnel FET architectures and device concepts for steep slope switches Joachim Knoch Institute of Semiconductor Electronics RWTH Aachen University Sommerfeldstraße Aachen
2 Outline MOSFETs Operational Principles Band-to-band Tunnel FETs Operational Principles Tunnel FETs Optimization Device Geometry Tunnel FETs Optimization Injecting Contacts Drain-Induced-Barrier-Thinning Short Channel Effects Conclusion
3 MOSFET Operation Principles Conduction/valence bands along direction of current transport (x/ydirection) and vertical (z-direction)
4 MOSFET Operation Principles Landauer no scattering 1D transport
5 MOSFET Operation Principles in a well behaving MOSFET:
6 MOSFET Operation Principles in a well behaving MOSFET:
7 MOS-Capacitance
8 MOSFET Operation Principles minimal S!!
9 MOSFET Operation Principles On-State with
10 MOSFET Operation Principles On-State
11 What is a good MOSFET supposed to do? On-state Power consumption as small as possible as small as possible
12 Band-to-Band Tunnel FETs gated n-i-p structure ambipolar operation Field-effect modulation of tunneling current minimum leakage determined by size of band gap
13 Band-to-Band Tunnel FETs significantly lower on-state currents exponential increase of I d V ds Drain-Induced-Barrier-Thinning inverse subthreshold slope <60mV/dec only in small gate voltage range avergage slope > 60mV/dec
14 Band-to-Band Tunnel FETs Operational Principles current through TFET can be approximated with Landauer expression How to calculate?
15 Band-to-Band Tunnel FETs Operational Principles approximation of exact bands with triangular potentail barrier energy-independent transmission probability calculated with WKB approximation λ dop is the depletion length in the source contact λ ch is the length scale for potential variations in the channel J. Knoch and J. Appenzeller, DRC
16 Band-to-Band Tunnel FETs Operational Principles
17 Band-to-Band Tunnel FETs Operational Principles exponential screening of potential variations best device layout: wrap-gate architecture with thin nanowire with ultrathin
18 Band-to-Band Tunnel FETs Operational Principles
19 Band-to-Band Tunnel FETs Operational Principles getting rid of f(e) getting rid of k B T
20 Band-to-Band Tunnel FETs Operational Principles exponential increase of I d since thinning of tunneling barrier is dominant
21 Band-to-Band Tunnel FETs Operational Principles point slope exponential increase of I d since thinning of tunneling barrier is dominant average slope
22 Band-to-Band Tunnel FETs Operational Principles band-pass filter behavior effective cooling of f(e) J. Knoch, S. Mantl and J. Appenzeller, Solid-State Electron., 51, 572 (2007).
23 Band-to-Band Tunnel FETs Operational Principles band-pass filter behavior effective cooling of f(e) J. Knoch, S. Mantl and J. Appenzeller, Solid-State Electron., 51, 572 (2007).
24 Tunnel-FET Optimization Device Geometry source-channel p-n- junction as steep as possible small effective mass small (but not too small) band gap
25 Tunnel-FET Optimization Device Geometry back-gate top-gate large parasitic resistance on-current limited by gate leakage M.T. Björk, J. Knoch, H. Schmid, H. Riel, W. Riess, Appl. Phys. Lett., 92, (2008).
26 Tunnel-FET Optimization Device Geometry increased on-current for smaller d ox C. Sandow, J. Knoch, C. Urban, Q.T. Zhao and S. Mantl, Solid-State Electron., 53, 1126 (2009).
27 Tunnel-FET Optimization Device Geometry J. Appenzeller, Y.-M. Lin, J. Knoch, Z. Chen and Ph. Avouris, IEEE Trans. Electron Dev., 52, 2568 (2005).
28 Tunnel-FET Optimization Injecting Conctact source-channel p-n- junction as steep as possible small effective mass small (but not too small) band gap
29 Tunnel-FET Optimization Injecting Conctact
30 Tunnel-FET Optimization Injecting Conctact need low doping concentration and good screening simultaneously J. Appenzeller, J. Knoch, M.T. Bjoerk, H, Schmid, H. Riel and W. Riess, IEEE Trans. Electron Dev., 55, 2827 (2008).
31 Band-to-Band Tunnel FETs significantly lower on-state currents exponential increase of I d V ds Drain-Induced-Barrier-Thinning inverse subthreshold slope <60mV/dec only in small gate voltage range avergage slope > 60mV/dec
32 Drain-Induced Barrier Thinning experiment simulation J. Knoch and J. Appenzeller, phys. stat. sol. a, 205, 679 (2008). C. Sandow, J. Knoch, C. Urban, Q.T. Zhao and S. Mantl, Solid-State Electron., 53, 1126 (2009).
33 Drain-Induced Barrier Thinning inverter transfer curve V in V out sufficient noise margin important for functionality of inverter In Out
34 Drain-Induced Barrier Thinning sufficient noise margin necessary for signal restoration, noise suppression pulse edge sharpening
35 Drain-Induced Barrier Thinning non-linearity of output characteristics of tunnel FETs diminishes noise margin substantially simualtion of tunnel FET inverter
36 Drain-Induced Barrier Thinning injection of charge into channel from drain strong dependence of charge density on drain voltage
37 Drain-Induced Barrier Thinning injection of charge into channel from drain strong dependence of charge density on drain voltage significant Drain-induced barrier thinning but this is no short channel effect
38 Drain-Induced Barrier Thinning semi-analytical, self-consistent calculation based on: increasing E f s helps to get more linear output characteristics but: large E f s yield S 60mV/dec
39 Drain-Induced Barrier Thinning increasing E f s helps to get more linear output characteristics but: large E f s yield S 60mV/dec
40 Drain-Induced Barrier Thinning in quantum capacitance limit (QCL): QCL attainable in 1D nanowire FETs with wrap-gate structure J. Knoch and J. Appenzeller, phys. stat. sol. a, 205, 679 (2008). J. Knoch, M.T. Björk, H. Schmid, H. Riel, W. Riess, Device. Research. Conf
41 Drain-Induced Barrier Thinning L=50nm d ox = 10nm d ch = 1nm m * = 0.02m 0 L=20nm d ox = 1nm d ch = 1nm m * = 0.1m 0 J. Knoch and J. Appenzeller, phys. stat. sol. a, 205, 679 (2008). J. Knoch, M.T. Björk, H. Schmid, H. Riel, W. Riess, Device. Research. Conf
42 Short Channel Effects conventional FET: drain-induced-barrier-lowering tunnel FET: drain-induced-barrier-thinning
43 Short Channel Effects
44 Short Channel Effects drain-induced barrier thinning J. Appenzeller, J. Knoch, M.T. Björk, H. Schmid, H. Riel W. Riess, IEEE Trans. Electron Dev., 55, 2827 (2008).
45 Short Channel Effects reduced gate impact J. Appenzeller, J. Knoch, M.T. Björk, H. Schmid, H. Riel W. Riess, IEEE Trans. Electron Dev., 55, 2827 (2008).
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