IEEE TRANSACTIONS ON ELECTRON DEVICES 1

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1 IEEE TRANSACTIONS ON ELECTRON DEVICES 1 Low-Frequency Noise Contributions from Channel and Contacts in InAs Nanowire Transistors Collin J. Delker, Member, IEEE, Yunlong Zi, Chen Yang, and David B. Janes, Member, IEEE Abstract Nanowire transistors are promising candidates for future electronics applications; however, they generally exhibit higher levels of low-frequency noise compared with traditional MOSFETs. The physics of this noise generation in nanowires needs to be understood for improving the device performance. In this paper, the low-frequency noise in InAs nanowire transistors was studied at different gate voltages before and after passivation by a polymethyl methacrylate (PMMA) layer. Noise levels in nanowire devices can be separated into contributions from the channel and from the contacts by analyzing the noise behavior under different bias conditions for devices with varying channel lengths. It is shown that a noise component, which is independent of channel length, can be attributed to the contacts, and a lengthdependent component is attributed to the channel. Applying the PMMA passivation layer over the entire device reduces the noise level generated by the channel, but does not change the noise level generated by the contacts. This paper provides a method to understand, and potentially improve, the noise performance. Operation in a channel-dominated bias regime allows extraction of a Hooge parameter specifically for the channel. PMMA passivation was effective in reducing this channel Hooge parameter from to Index Terms Contact resistance, indium arsenide, low-frequency noise, nanowire transistors. I. INTRODUCTION UNLIKE conventional MOSFETs, nanowire transistors generally do not have doped source and drain regions, thus the injection from source to channel is controlled not by modulating p-n junctions but by modulating the thermionic emission and/or tunneling current from metal contact into the semiconductor. Such junctionless transistors, like those in this paper, demonstrate characteristics qualitatively similar to those of conventional MOSFETs, but the contacts play an important role in the device operation, including noise. Junctionless transistors typically exhibit ambipolar (p-branch) behavior, Manuscript received March 20, 2013; revised July 15, 2013; accepted July 17, This work was supported by the National Science Foundation under Grant ECCS and Grant ECCS The review of this paper was arranged by Editor Z. Celik-Butler. C. J. Delker and D. B. Janes are with the School of Electrical and Computer Engineering and Birck Nanotechnology Center, Purdue University, West Lafayette, IN USA ( cdelker@purdue.edu; janes@ecn.purdue.edu). Y. Zi is with the Department of Physics, Purdue University, West Lafayette, IN USA ( yzi@purdue.edu). C. Yang is with the Department of Chemistry and Department of Physics, Purdue University, West Lafayette, IN USA ( yang@purdue.edu). Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TED which limits the maximum on/off ratio especially in lowbandgap materials. InAs devices without Schottky barriers, for example, are limited to an on/off ratio of about 450. Presence of a Schottky barrier can increase this limit [1]. Measurements of barrier height between InAs and metal contacts show a barrier of less than 50 mev consistent with Fermi level pinning near the conduction band. High levels of 1/ f noise present a challenge to use nanowires as field-effect-transistors for practical applications [2], [3]. While some of the 1/ f noise stems from electron trapping and detrapping along the channel [4], [5], noise may also be generated by fluctuations in the series resistance of the source and drain contacts [6], [7]. This additional noise can play a major role in overall noise characteristics. The standard method of characterizing noise in a device has been Hooge s empirical relationship S I = α H I 2 (1) fn where S I is the current noise power spectral density, f is the frequency, I is the current through the device channel, and N is the total number of charge carriers in the channel [8] IEEE The Hooge parameter α H can then be used as a figure of merit to compare devices and technologies. This relationship, however, assumes that a device has ohmic contacts and the channel region of the device is the dominant noise source. If the contacts play a significant role either in device resistance or noise, this relationship will overestimate the Hooge parameter compared with the parameter of the channel alone. It has been shown that ungated access regions between the gated portion of the device and the metal contact can significantly affect the noise properties of top-gated nanowire transistors [9]. While there are no ungated access regions in our back-gated nanowire devices, the metal contacts have series resistance contributions largely independent of the applied gate bias, which can lead to similar behavior. In this paper, the noise levels of back-gated InAs nanowire transistors are measured at varying gate voltages to extract the noise contributions from the channel and the contacts. Evidence of these contributions is also presented by a simple passivation of polymethyl methacrylate (PMMA) over the transistor channels, which reduces the noise generated by the channel but not the noise generated by the contacts. II. EXPERIMENT Synthesis of InAs nanowires was achieved in a multizone furnace vapor deposition system. In the upstream zone, InAs

2 2 IEEE TRANSACTIONS ON ELECTRON DEVICES powder ( % from Alfa Aesar) was placed as a solid precursor. The SiO 2 /Si substrate was treated by poly-l-lysine (from Ted Pella) to increase the adhesion of Au nanoparticles (from Ted Pella), and followed by 20-nm Au nanoparticle dispersion. Then, it was placed in the downstream zone as the growth substrate. Before growth, the reaction tube was evacuated and a base pressure of a few torrs was achieved to avoid oxygen contamination. The temperatures of the upstream and downstream zones were set to 820 C 850 C and 480 C 520 C, respectively, to start the synthesis. Several torr pressures were maintained by H 2 carrier gas for about 80 min during the growth. The finished wires, with diameters of about 30 nm, were then removed from the growth substrate by sonication in isopropanol solution. The nanowire-containing solution was dispersed onto silicon wafers with 20-nm thermally grown SiO 2, prepatterned with alignment markers. The wires were optically photographed in relation to the alignment markers so that nickel source and drain contacts, with contact lengths of 500 nm, could be patterned and deposited by e-beam lithography and liftoff. The silicon substrate becomes a shared back-gated electrode. Channel lengths were varied from 100 to 1000 nm to study the effects of contacts and channel lengths on noise behavior. I V characteristics and noise power spectral density were first measured at room temperature with the nanowire channels exposed to ambient conditions. Then, the wafer was spin coated with PMMA A4 (4% molecular weight in anisole) to a thickness of about 180 nm, and hardened by a 90-s hotplate bake at 180 C. The I V and noise were then remeasured on the passivated devices. As shown in Fig. 1, the PMMA passivation shifted the threshold voltage by about +0.5 V, but did not greatly affect the current or device resistance for a given gate overdrive voltage. While metal contacts to InAs typically exhibit Fermi level pinning near the conduction band, the contacts may still have series resistance because of factors such as an interfacial oxide layer or surface roughness [10]. Our devices show a nominal contact resistance of K (150 K for the device in Fig. 1) large enough to have significant impact on device performance, though they do not exhibit rectifying behavior. Contact resistance was extracted at low drain bias by extrapolating current versus gate voltage to higher gate voltages where current begins to saturate. The PMMA passivation, which only covered the device channel, did not affect the contact resistance. For comparison, in a prior study employing InAs nanowires with comparable diameters [11], extrinsic contact resistances above 50 K can be inferred for device configurations with Ni InAs alloy contacts as well as as-fabricated Ni contacts. Comparable on-currents were also observed in that study. The effective electron mobility of our devices, estimated from the transconductance of the measured I V curves, remains relatively unchanged at about 400 cm 2 /V s before and after passivation. All the noise measurements were taken using an Agilent 35670A spectrum analyzer with a Stanford Research SR570 low-noise current preamplifier at an applied drain voltage of 50 mv, low enough to avoid the effects of saturation. All the measurements were made in atmosphere at room temperature. Fig. 1. (a) Output characteristics before passivation. (b) Linear current voltage (I V ) characteristics before and after passivation at V ds = 50 mv. The constant slope at higher gate voltage shows the series resistance of the contacts. Inset: diagram of nanowire transistor device. Both (a) and (b) correspond to a device with 1000-nm channel length. Fig. 2. Current spectral density noise versus frequency before and after passivation for 100-nm device at V g V t = 1 V (channel-dominated bias regime). Dotted line: 1/ f slope for reference. Representative noise frequency spectra are shown in Fig. 2 for a device with channel length 100 nm before and after passivation, exhibiting a near 1/ f dependence for measured frequencies up to 1600 Hz. Measurements made using higher bandwidths did not affect the measured values at any given frequency. To compare different devices, the measured noise power spectral density at 100 Hz was normalized by current squared, and the resulting A = S I f/i 2 = S R f/r 2 is plotted

3 DELKER et al.: LOW-FREQUENCY NOISE CONTRIBUTIONS 3 at high gate voltages, producing the flat noise region, and the same contact noise level is observed. The noise levels at lower gate voltages, however, have been reduced by about two orders of magnitude for the longer channel lengths compared with the unpassivated devices. Shorter devices have a smaller, but not insignificant, reduction. A transition between the two regimes can be seen at intermediate gate voltages, where both the contacts and channel contribute to total device noise and resistance, leading to the positive slope in the passivated devices. It is clear that the PMMA passivation, which only covers the exposed nanowire but does not reach the metal semiconductor contact interface, reduces the noise due to the channel, but not the noise due to the contacts. To illustrate the effects of PMMA passivation, the noise amplitude when biased in the channel-dominated region is plotted for various device lengths in Fig. 3(c). An improvement of one-two orders of magnitude can be seen for all device lengths, with shorter devices generating more noise. III. DISCUSSION To understand the experimental measurements, a quantitative model is used, which considers the role of channel and contacts from subthreshold to the on-state. In the subthreshold region, where the channel resistance is high, the absolute number of charge carriers in the channel is, to first order, exponential with gate voltage [12] N ch e (Vg Vt)/nkT (2) Fig. 3. Measured noise versus gate voltage (a) as fabricated and (b) PMMA passivated at V ds = 50 mv. (c) Noise amplitude for various device lengths before and after passivation, with low gate bias (V g V t = 1 V) to ensure channel-dominated behavior. versus gate overdrive voltage V g V t. Noise measurements before passivation are shown in Fig. 3(a) for various device lengths. At high gate voltages, a nearly constant noise level is observed, which can be attributed to the contacts dominating both the noise and resistance of the device. Because the noise in this regime is due to the contacts, varying the channel length has a little effect. At lower gate voltages, including subthreshold, the channel resistance increases, so that contacts play a little role in the resistance or noise. In this regime, shorter devices that contain fewer carriers exhibit higher noise levels than longer devices with higher numbers of carriers in the channel, as expected from the Hooge relation. After the PMMA passivation, the noise data were remeasured, as shown in Fig. 3(b). Once again, the contacts dominate and therefore channel resistance in the subthreshold regime can be written as follows: R ch 1 e (Vg Vt)/nkT. (3) N ch As the gate bias is moved above threshold, the total carrier count becomes N ch = L ch C g (V g V t )/q, where L ch is the channel length and C g is the gate capacitance per unit length. N ch increases with increasing gate bias so the channel resistance decreases, leading to R ch (V g V t ) 1 (4) in the on-state assuming constant mobility and low drain voltages keeping N ch uniform along the entire channel. With the channel effectively turned on, the current eventually depends only on the series resistance of the source contact. When fully on at high gate voltages, the gate will no longer have strong control of the conduction band due to the semiconductor capacitance limit [13], meaning the contact resistance, R s, will be nearly constant. During device operation, the total sourceto-drain resistance is R tot = R ch + R s. Both the channel and contacts also contribute to lowfrequency noise. Because fluctuations in resistance lead to fluctuations in current, the resistance noise spectral density can also be used for computation: S R /R 2 = S I /I 2.Inthis way, independent series noise sources can be added together directly. Assuming the noise generation in the channel and the contacts are independent processes, the total S R (S Rtot )isthe

4 4 IEEE TRANSACTIONS ON ELECTRON DEVICES sum of a channel component S Rch and a contact component S Rs [14] as follows: S Rtot = S Rch + S Rs. (5) The total noise in the device, when normalized by resistance, then becomes S Rtot Rtot 2 = S Rch + S Rs (R ch + R s ) 2. (6) The channel and contacts each have their own independent Hooge parameters α ch and α s, respectively, so that S Rch = α ch R 2 ch fn ch (7) S Rs = α s Rs 2. (8) fn s As the gate voltage (and N ch ) increases, the channel noise will decrease. Combining (2), (3), and (7) in the subthreshold region S Rch e 3(Vg Vt) (9) or in the on-state S Rch (V g V t ) 3. (10) The metal semiconductor contacts can also be contributed to noise. The contact resistance (and therefore noise) is observed to be nearly constant with gate voltage S I f/i 2 = S Rs f/r 2 s = α s (11) where α s is the constant noise level (unitless). When normalized to contact area, α s can be used as a figure of merit for comparison of contact technologies [15]. By analyzing the noise normalized by resistance versus gate voltage for a given device, such as the plots in Fig. 3, the noise contributions from the contacts and the channel can effectively be separated [9]. When the device is biased fully into the on-state where S Rs S Rch and R s R ch, S Rtot /Rtot 2 S Rs /Rs 2 = constant, the contact noise level dominates and the α s parameter can be extracted. When the device is biased near or below threshold, S Rch S Rs and R ch R s, the channel noise dominates and the channel Hooge parameter α ch can be extracted. Fig. 4(a) shows noise as a function of resistance for a representative device with channel length of 1000 nm. The contacts dominate at lower resistances, where the device shows approximately equal noise levels both before and after passivation, following (11). The channel dominates at higher resistance, where the noise levels are much lower in the passivated device and follow (7). Fig. 4(b) shows the measured noise data for two passivated devices with channel lengths of 100 and 1000 nm, along with the model described by (5) (11), fit using α s = and α ch = The channel Hooge parameter was found by subtracting the contact noise component (obtained at high gate voltages) from the total measured noise at a given bias point, then using (7) to solve for α ch. A constant contact noise level of α s 10 5 was extracted for all the devices Fig. 4. (a) Noise as a function of resistance for the 1000-nm device before and after passivation. (b) Measured noise for two passivated devices (symbols) along with modeled noise behavior (dashed lines) from (5) (11). Vertical dotted line: threshold voltage of both the devices. using (11) and the measured noise data at the highest gate voltage. At lower gate voltages (< 1 V), the channel dominates both resistance and noise, so that S R /R 2 S Rch /R 2 ch e (V g V t ) from (7) and (3). At high gate voltages (> 4V) where the contacts dominate both noise and resistance, S R /R 2 S Rs /R 2 s constant from (11). The transition region ( V) shows different behavior depending on the device length. In the shorter device, the channel noise dominates over the contact noise, yet the contact resistance is the major contributor to total resistance. In this case, S R /R 2 S Rch /R 2 s (V g V t ) 3, from (10), and the negative slope is seen. In the transition region of the longer device, the contact noise still dominates overall noise while the channel resistance is higher, leading to S R /R 2 S Rs /R 2 ch (V g V t ) 2 from (3) and (10), and the positive slope is seen. These regions are demonstrated in Fig. 5, which shows the channel and contact components of both resistance and noise for the 1000-nm device before and after passivation using the model with above-stated parameters. The shaded areas show the regime in which the contacts generate more noise than the channel, yet the channel contributes most to the resistance. Observation of this regime demonstrates that the contacts can be a significant contributor to low-frequency noise even when the channel dominates the overall device resistance. At voltages above the shaded region, the contacts dominate the device in both noise and resistance. At voltages below the shaded region, the channel dominates

5 DELKER et al.: LOW-FREQUENCY NOISE CONTRIBUTIONS 5 in InAs nanowires measured in vacuum at room temperature, such as in [16], which found α = Noise in the device channel is generally thought to stem from carrier interactions with the semiconductor oxide interface, or in this case, the semiconductor atmosphere interface (including native oxides). It has been shown that noise increases by randomly absorbing and desorbing oxygen into a nanowire surface of metal oxide nanowires, causing small fluctuations in threshold voltage and therefore current [17]. In our devices, the PMMA may be limiting the wire s exposure to the atmosphere, limiting adsorption of oxygen, and reducing random fluctuations of the surface potential. Water molecules on the surface may also be removed by PMMA passivation [18], which could reduce the noise levels. Indium arsenide and other III V nanowires are known to have high interface state density [19], so the PMMA could also be tying up dangling bonds on the surface and reducing the number of interface traps, which contribute to carrier density fluctuation noise [20]. The trap density can be estimated from the noise levels in the channel-dominated regime [21]. By averaging the calculated trap density over each of the sampled devices, the as-fabricated and passivated devices have an estimated trap density of cm 2 and cm 2, respectively. Fig. 5. Modeled contact and channel components of the noise and resistance for 1000-nm device (a) before and (b) after PMMA passivation, using α ch = before passivation, α ch = after passivation, and α s = 10 5 for both the cases. Shaded area: regime of contact noise domination but channel resistance domination. the device in both noise and resistance. Before passivation, the threshold voltage lies in the channel-dominated regime, leaving a region of 0 < V gs V t < 1 V where the device is on and the contacts have little influence. After passivation, however, the threshold has shifted into the shaded region where the contacts will contribute to noise, implying their contact effects dominate noise at all voltages in the on state. Shorter devices would be expected to exhibit reduced channel resistance, yet constant contact resistance, pushing the upper edge of the shaded region to the left, further reducing the gate voltage range where contacts have little influence on noise. The contact resistance of the sampled devices averages 10 5, and while seemingly high, the contact area is small, leading to a specific contact resistivity of 10 4 cm 2. In theory, the contact influence could be reduced further, expanding the bias range of channel noise and resistance domination, by contact annealing or other treatments, which were not done on these devices. Care must be taken when extracting a Hooge parameter due to the two unique noise mechanisms at work in these devices. To calculate a meaningful channel Hooge parameter, the device must be biased well into the channel-dominated regime so that the contact contributions are minimized. The Hooge parameter α ch, extracted from the V g = 0.5 V point, before passivation is , and after passivation falls to The passivated device value, although measured in air, is of the same order as prior reported Hooge parameters IV. CONCLUSION In this paper, it was shown that how the observed noise properties in nanowire devices are influenced by both the contacts and channel. The contacts generate noise independently of the channel, and can dominate noise generation even when the overall resistance is dominated by the channel. In certain bias regimes and channel lengths, it is possible for the contacts to dominate total noise levels at all gate voltages above threshold. It was also shown that passivation by a PMMA layer improved the channel Hooge parameter by one-two orders of magnitude, but did not affect contact noise levels. While PMMA is not considered to be a permanent passivation layer due to the permeability of H 2 O molecules through the layer [22], this passivation method does provide insight into noise mechanisms of these devices. From this paper, it is clear that the noise reduction near or below threshold can be realized by channel passivation methods such as this PMMA layer, but reduction of noise in the on state will require improvement of the contact technology. Noise in the transition region near threshold may require improvement of both channel and contact noise. REFERENCES [1] Y. Zhao, D. Candebat, C. J. Delker, Y. Zi, D. B. Janes, J. Appenzeller, and C. Yang, Understanding the impact of Schottky barriers on the performance of narrow bandgap nanowire field effect transistors, Nano Lett., vol. 12, no. 10, pp , [2] L. K. J. Vandamme, 1/f noise in homogeneous single crystals of III-V compounds, Phys. Lett. A, vol. 49, no. 3, pp , [3] L. K. J. Vandamme and F. N. Hooge, What do we certainly know about noise in MOSTs, IEEE Trans. Electron Devices, vol. 55, no. 11, pp , Nov [4] A. van der Ziel, Unified presentation of 1/f noise in electron devices, Proc. IEEE, vol. 76, no. 3, pp , Mar [5] S. L. Rumyantsev, M. S. Shur, M. E. Levinshtein, A. Motayed, and A. V. Davydov, Low-frequency noise in GaN nanowire transistors, J. Appl. Phys., vol. 103, no. 6, pp , 2008.

6 6 IEEE TRANSACTIONS ON ELECTRON DEVICES [6] M. Y. Luo, G. Bosman, A. van der Ziel, and L. L. Hench, Theory and experiments of 1/f noise in Schottky-barrier diodes operating in the thermionic-emission mode, IEEE Trans. Electron Devices, vol. 35, no. 8, pp , Aug [7] J. Appenzeller, Y.-M. Lin, J. Knoch, Z. Chen, and P. Avouris, 1/f noise in carbon nanotube devices On the impact of contacts and device geometry, IEEE Trans. Nanotechnol., vol. 6, no. 3, pp , May [8] F. N. Hooge, T. G. M. Kleinpenning, and L. K. J. Vandamme, Experimental studies on 1/f noise, Rep. Progr. Phys., vol. 44, no. 5, p. 479, [9] C.J.Delker,S.Kim,M.Borg,L.E.Wernersson,andD.B.Janes, 1/f noise sources in dual-gated indium arsenide nanowire transistors, IEEE Trans. Electron Devices, vol. 59, no. 7, pp , Jul [10] V. L. Rideout, A review of the theory and technology for ohmic contacts to group III V compound semiconductors, Solid-State Electron., vol. 18, no. 6, pp , [11] Y.-L. Chueh, A. C. Ford, J. C. Ho, Z. A. Jacobson, Z. Fan, C.-Y. Chen, L.-J. Chou, and A. Javey, Formation and characterization of nixinas/inas nanowire heterostructures by solid source reaction, Nano Lett., vol. 8, no. 12, pp , [12] S. M. Sze and K. K. Ng, Physics of Semiconductor Devices. NewYork, NY, USA: Wiley, [13] J. Appenzeller, J. Knoch, M. T. Bjork, H. Riel, H. Schmid, and W. Riess, Toward nanowire electronics, IEEE Trans. Electron Devices, vol. 55, no. 11, pp , Nov [14] X. Li and L. K. J. Vandamme, 1/f noise in MOSFET as a diagnostic tool, Solid-State Electron., vol. 35, no. 10, pp , [15] L. K. J. Vandamme, Characterization of contact interface, film sheet resistance and 1/f noise with circular contacts, Fluctuation Noise Lett., vol. 10, no. 4, pp , [16] M. R. Sakr and X. P. A. Gao, Temperature dependence of the low frequency noise in indium arsenide nanowire transistors, Appl. Phys. Lett., vol. 93, no. 20, pp , [17] W. Wang, H. D. Xiong, M. D. Edelstein, D. Gundlach, J. S. Suehle, C. A. Richter, W.-K. Hong, and T. Lee, Low frequency noise characterizations of ZnO nanowire field effect transistors, J. Appl. Phys., vol. 101, no. 4, pp , [18] A. Javey, J. Guo, D. B. Farmer, Q. Wang, E. Yenilmez, R. G. Gordon, M. Lundstrom, and H. Dai, Self-aligned ballistic molecular transistors and electrically parallel nanotube arrays, Nano lett., vol. 4, no. 7, pp , [19] S. A. Dayeh, C. Soci, P. K. L. Yu, E. T. Yu, and D. Wang, Transport properties of InAs nanowire field effect transistors: The effects of surface states, J. Vacuum Sci. Technol. B, Microelectron. Nanometer Struct., vol. 25, no. 4, pp , [20] P. C. Chang, Z. Fan, C. J. Chien, D. Stichtenoth, C. Ronning, and J. G. Lu, High-performance ZnO nanowire field effect transistors, Appl. Phys. Lett., vol. 89, no. 13, pp , [21] K. K. Hung, P. K. Ko, C. Hu, and Y. C. Cheng, A unified model for the flicker noise in metal-oxide-semiconductor field-effect transistors, IEEE Trans. Electron Devices, vol. 37, no. 3, pp , Mar [22] S. J. Seo, S. C. Yang, J. H. Ko, and B. S. Bae, Effects of sol-gel organicinorganic hybrid passivation on stability of solution-processed zinc tin oxide thin film transistors, Electrochem. Solid-State Lett., vol. 14, no. 9, pp. H375 H379, Collin J. Delker (M 00) received the B.S. degree in electrical engineering from Kansas State University, Manhattan, KS, USA, in He is currently pursuing the Ph.D. degree with Purdue University, West Lafayette, IN, USA. Yunlong Zi received the Bachelor of Engineering degree in materials science and engineering from Tsinghua University, Beijing, China, in He is currently pursuing the Ph.D. degree with Purdue University, West Lafayette, IN, USA. Chen Yang received the Ph.D. degree from Harvard University, Cambridge, MA, USA, in She has been an Assistant Professor with the Department of Chemistry and Department of Physics, Purdue University, West Lafayette, IN, USA, since David B. Janes (S 86 M 89) received the Ph.D. degree from the University of Illinois at Urbana- Champaign, Urbana, IL, USA, in He is currently a Professor of electrical and computer engineering with Purdue University, West Lafayette, IN, USA.