Synthesis of Silicon. applications. Nanowires Team. Régis Rogel (Ass.Pr), Anne-Claire Salaün (Ass. Pr)
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1 Synthesis of Silicon nanowires for sensor applications Anne-Claire Salaün Nanowires Team Laurent Pichon (Pr), Régis Rogel (Ass.Pr), Anne-Claire Salaün (Ass. Pr) Ph-D positions: Fouad Demami, Liang Ni, Gertrude Godem-Wenga 1 CMC2 - November FRONTIER-2009, 25, Barcelona, Nov Spain29-Dec 3, 2009, Sendai, Japan
2 IETR - Institut d Electronique et de Télécommunications de Rennes FRANCE Rennes 2
3 IETR - Institut d Electronique et de Télécommunications de Rennes FRANCE Microelectronics and Microsensors Department Two research teams involved Devices Development of process fabrication Microsensors Development of innovative sensors Research fields covered: Competences and know-how Micro/nano electronics Microtechnology/Microfluidic Sensors Microsystems and systems Electronic on plastic substrates Synthesis of Si related materials (thin films, nano-objects) Si & Ge low temperature technology on flexible substrate Actuation and detection techniques Chemical and biological detection 3
4 Introduction Context Owing to their physical and electrical properties, silicon nanowires represent a promising material with strong potential large variety of applications in future nanoelectronic devices Fabrication of innovative devices based on silicon nanowires with remarkable electronic properties. New topic in the lab Our objectives Synthesis of silicon nanowires Study and optimization of their electrical performances Fabrication of electronic devices (resistors, field-effect transistors) Development of innovative micro-sensors (chemical, biological) 4
5 Silicon nanowires Benefits of silicon nanowires (SiNWs) High surface / volume ratio: surface phenomena predominate Possibility of surface functionalization for biological applications Development of nanosensors with high sensitivity Compatibility with CMOS technologies Silicon nanowires synthesis: 2 approaches Top-down Approach Bottom-up Approach Starts from bulk materials and scales down the patterned areas Growth technique from molecular precursors using nanoparticles as catalysts t Optical and x-ray lithography E-beam and ion-beam lithography Scanning probe lithographyh Printing and imprinting Layer-by-layer self assembly Molecular self assembly Direct assembly Coating and growth 5
6 Outline Introduction Context Benefits of silicon nanowires (SiNWs) Silicon nanowires: bottom-up approach Synthesis method Fabrication of silicon nanowires based resistors Electrical l characterization ti Chemical species detection Silicon nanowires: top-down approach Synthesis method Fabrication of silicon nanowires based resistors Fabrication of nanowires Thin Film Transistors (SiNW-TFT) Electrical characterization Chemical species detection 6
7 SiNW synthesis : Bottom-up Bottom-up approach Nanowire synthesis is achieved by a vapor-liquid-solid (VLS) process A droplet of a liquid catalyst is put in contact with gaseous precursor molecules. SiNWs are synthesized using gold (Au) as metal catalyst and silane (SiH 4 ) as precursor gas in a hot wall LPCVD reactor. 7
8 SiNW synthesis : Bottom-up The diameter of the nanowire, grown by the VLS process, is given by the diameter of the gold nanoparticles. Nanowire Au Gold deposited by thermal evaporation (thickness below 5 nm), Growth in LPCVD reactor with silane at 480 C (pressure: 40Pa) Diameter : about 100 nm, various orientation, length can exceed 10 µm 8
9 SiNW synthesis : Bottom-up Advantage of the VLS method: Possibility of selective doping (n- or p-type) of the nanowires, by controlled injection of the dopant precursor gas High quality single crystalline nanowires with well-controlled composition and electronic properties Challenges: Controlling diameter and orientation of the nanowires which impede the success of the fabrication of nanowire arrays with high degree of reproducibility. 9
10 Fabrication of nanowires based resistors SiNW synthesis : Bottom-up SiO 2 Highly in-situ doped polysilicon First mask Definition of the comb shape Electrodes geometry on a SiO 2 capped substrate Silicon substrate Au Second mask Thin film Au local deposition after lift-off technique nanowires Growth of SiNWs by LPCVD. Silicon nanowire network: used to interconnect electrodes Silicon substrate or glass substrate (maximum process temperature 600 C) 10
11 SiNW synthesis : Bottom-up Different interdigitated structures can be achieved, varying number of teeth and local deposition of gold 1,0x10-8 Au thickness : 5nm 5,0x10-9 Current (A) 0,0-5,0x ,0x ,0-0,5 0,0 0,5 1,0 Voltage (V)
12 SiNW synthesis : Bottom-up Thin Film Transistors with Nanowires Output characteristics 1,5x10-7 Source Drain 1,0x10-7 VG=10V ds I 5,0x10-8 VG=0V 0,0 VG=-20V Highly doped silicon substrate Gate Vds Field effect but bad electrical contact Surface sensitive to charges in ambiance 12
13 Silicon Nanowire as gas sensor SiNW synthesis : Bottom-up Main interest of SiNWs rests on their high surface that can be sensitive to charges SiNWs device exposed to smoke SiNWs device exposed to ammonia 1,0x10-7 smoke vacuum t (A) Current 8,0x10-8 6,0x10-8 4,0x10-8 air Reversible trend Resistan nce ( ) ,0x10-8 air 0, Time (sec) 21 min NH Time (min) ammonia and smoke may act as chemical gates: species act as electrons donor (reducing agents) at the SiNWs surface. positively charged gas molecules binded on SiNWs surface can modulate the conductance 13
14 Outline Introduction Context Benefits of silicon nanowires (SiNWs) Silicon nanowires: bottom-up approach Synthesis method Fabrication of silicon nanowires based resistors Electrical l characterization ti Chemical species detection Silicon nanowires: top-down approach Synthesis method Fabrication of silicon nanowires based resistors Fabrication of nanowires Thin Film Transistors (SiNW-TFT) Electrical characterization Chemical species detection 14
15 SiNW synthesis : Top-down Top-down approach starts from bulk materials and scales down the patterned areas Advantages high-yield, high-uniformity, and well-aligned production of nanowires this approach is more promising for mass production of highly uniformed nanowire arrays and nanowire-based devices. Sidewall spacer formation technique This technique uses anisotropic dry etching Low cost (does not require the use of high cost lithographic techniques) Compatible with conventional CMOS technology Benefits of excellent homogeneity and reproducibility of conformal CVD processes 15
16 SiNW synthesis : Top-down Fabrication of silicon nanowires by the sidewall spacers formation technique RIE etching Polysilicon nanowires RIE etching Undoped polysilicon Si poly N + Silicon oxide APCVD oxide Monocristalline substrate 16
17 SiNW synthesis : Top-down Optmization of the steepness: dry etching parameters (pressure, power) N + Si poly oxide Oxide Accurate control of the Si-poly etching : Nanowire substrate Nanowires with curvature radius ~ 50 nm 17
18 SiNW synthesis : Top-down Fabrication of Nanowires resistors Nitride LPCVD Undoped Si- poly Current (A) 2,0x10-8 1,5x µm 5 µm 1,0x µm 20 µm 5,0x10-9 0,0-1,0-0,5 0,0 0,5 1,0-5,0x10-9 V oltage (V) N+ Si-poly APCVD oxide -1,0x ,5x ,0x10-8 Current versus voltage for 4lengths of silicon nanowires Thermal oxide Silicon nanowires 18 Si substrate
19 Silicon Nanowire as gas sensor SiNW synthesis : Top-down SiNWs device exposed to smoke SiNWs device exposed to ammonia smoke exposure NH 3 exposure Resista ance ( ) Res sistance ( ) vacuum vacuum vacuum Time (min) Time (min) Ammonia and smoke may act as chemical gates: donor of electrons Carrier transport strongly depends on structural nanowires defects (polysilicon grain boundaries) Gas molecules adsorbed may play a significant role in decreasing the potential barrier height at the grain boundaries between two grains 19
20 SiNW synthesis : Top-down Nanowires Field effect transistors using sidewall spacer process nanowires Vgs = 0V 3,5x10-8 Vgs = 1V Vgs = 2V 3,0x10-8 Vgs = 3V Vgs = 4V 2,5x10-8 S D Ids (A) 2,0x10-8 1,5x10-8 1,0x10-8 G N + Substrate 5,0x ,0-5,0x10-9 1E Vds (volts) 1E-8 Ids (A) 1E-9 Vds = 4V 1E-10 1E Vgs (volts) 20
21 SiNW synthesis : Top-down To increase the surface APCVD oxide Nanowire Nitride Sacrificial oxide process 21
22 Conclusions and future directions Nanowires synthesis Feasibility of silicon nanowires for both synthesis methods explored Electrical behavior show good potential for electronic devices Curvature radius has to be lowered to observe the nanometric size effects on the electrical behaviour Future directions Detection of chemical and biological species (areas of healthcare, life sciences) Nanowires: new opportunities in this interdisciplinary area diameters comparable to those of the biological/chemical species being sensed. Devices based on nanowires: ultrasensitive electrical sensors for the detection of biological and chemical species. - ability to bind analytes on their surface - direct electrical detection (without using labels) - low concentrations of DNA, proteins or viruses -rapid analysis of these species 22
23 Conclusions and future directions conductance time Detection of DNA-hybridization P-type FET : the binding of target molecules (negative charges) leads to an accumulation of holes in the nanowire: conductance Probe binding No-complementary targett (no hybridization) Complementary Target (hybridization) 23
24 Conclusions and future directions Detection of proteins Antibody receptor Nanowire modified with specific surface receptors immobilization of antibodies binding of antigens Binding of a protein Biological sensors Specific sensing achieved by linking a recognition group to the surface of the nanowire The nanowire surface can be modified with a variety of linker molecules (bioaffinitive agents): functionalization Significant signal changes with the binding of molecules SiNWs development could significantly impact areas of electronics, genomics, biomedical diagnostics, drug discovery... 24
25 Thank you for your attention 25
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