Analog Synaptic Behavior of a Silicon Nitride Memristor

Transcription

1 Supporting Information Analog Synaptic Behavior of a Silicon Nitride Memristor Sungjun Kim, *, Hyungjin Kim, Sungmin Hwang, Min-Hwi Kim, Yao-Feng Chang,, and Byung-Gook Park *, Inter-university Semiconductor Research Center (ISRC) and the Department of Electrical and Computer Engineering, Seoul National University, Seoul 88, South Korea Microelectronics Research Center, Department of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas 78758, USA * thinlizzy@snu.ac.kr * bgpark@snu.ac.kr Contents: Figure S1. Two proposed 3D vertical structures. Figure S. Conduction mechanism of Ni/SiN x /AlO y /TiN memristor. Figure S3. Negative-set behavior of Ni/SiN x /AlO y /TiN memristor when high CCL (1 ma) is applied. Figure S. Gradually modulated transient current by pulses with incremental amplitude for set and reset. Figure S5. LTP and LTD by identical pulse and incremental pulse width. Figure S. Sensing current and applied voltage amplitude for energy calculation of intermediate state. Figure S7 Transient characteristics for STDP. S-1

2 Fig. S1 Two proposed 3D vertical structures. double horizontal electrode and gate-all-around structures. Here we propose two 3D structures. One is double horizontal electrode (DHE) structure. The process flow of the DHE structure is shown in Figure S1a. First, TiN metal electrode or doped polysilicon and SiO are sequentially deposited on the Si substrate by CVD. The number of preferred layers of TiN or doped polysilicon deposited at this time is the number of vertically stacked cells. Next, fin line is defined by photo lithography process, dry etch of TiN or polysilicon and SiO are sequentially performed to form fin line, and the resistive material, SiN x is deposited by CVD. After depositing the resistance change material, top metals such as W, Ni, and TiN to be used as an upper electrode is deposited by CVD or sputter, and the upper electrode is defined by photo lithography in a direction perpendicular to the lower electrode lines. Finally, metal dry etch is done to complete the DHE structure. The second structure can be used if the silicon electrode replaces the metal electrode. We have obtained a similar I-V curve of Ni/SiN/TiN in a conventional Ni/SiN/n ++ Si device. 1 Considering line resistance, a metal electrode such as TiN are preferred. However, in the gate-all-around (GAA) structure, the operating voltage can S-

3 be reduced due to field enhancement in GAA structure. The process flow of the GAA structure is shown in Figure S1b. First, doped polysilicon or single crystalline silicon and SiO are sequentially deposited on the Si substrate in the same manner as the DHE structure, and the photo lithography process is followed by dry etching of polysilicon and SiO in order to form a fin line. Next, SiO is deposited by CVD, the upper electrode line is defined by lithography in the direction perpendicular to the lower electrode fin line, and dry etch is performed. In order to selectively remove SiO between the lower electrode layers, wet etch is performed with an HF solution and a resistance change material like SiN x is deposited by a CVD method. Then, when metals such as W and TiN can be deposited by CVD or sputter to form an upper electrode, a GAA structure is completed. Ln(I) [Ln(A)] Voltage:.5~1 V (R: 99%) Ln(I/V ) [Ln(A/V )] Voltage: ~.8 V (R: 99%) /Voltage [1/V] I/Voltage [A/V] 5.µ 15.µ 5.µ. R/R Temperature [K] (c) Ln(I/V) [Ln(S)] Voltage:.~ V (R: 99%) Sqrt(V) [V 1/ ] (d) Fig. S Conduction mechanism of Ni/SiN x /AlO y /TiN memristor: ln(i) versus 1/V in on-current state, ln(i/v ) versus 1/V in on-current state, (c) temperature dependence (3 K ~ 33 K) (d) ln(i/v) versus V 1/ in off-current state. In order to study the conduction mechanisms of the Ni/SiN x /AlO y /TiN memristor, current fitting of I-V curves in the on- and off-state was conducted. The on-current state, in which conducting defects within the SiN x film are produced by an electric field, is effectively fitted by the trap-assisted tunneling (TAT) conduction model and Fowler-Nordheim (F-N) tunneling mechanism for low and high voltage regimes, respectively. Figure Sa shows ln(i) versus 1/V for the I-V curve in the on-state for a low voltage regime (.5 ~ 1 V), which is given by S-3

4 , where J TAT is the current density, q is the elementary charge, m is the effective mass of the electron, h is the reduced Planck s constant, E is the electric field across the dielectric films, and Ø t is the energy level of the electron defect states. The TAT model in the SiN x film can be explained by multi-step tunneling by means of traps generated by a break in the Si-H bond under a high electric field during the forming and set processes. 3 Furthermore, Figure Sb shows ln(i/v ) versus 1/V for the I-V curve in the on-current state for a high voltage regime (> V), which is given by, where m T is the tunneling effective mass and Ø b is the barrier height. F-N tunneling is a dominant mechanism for the reduction of effective thickness in the insulating layers, as a result of the high electric field. In order to validate the conduction and switching mechanisms of the Ni/SiN x /AlO y /TiN memristor, we investigated the temperature dependence on the conducting path, formed by the high CCL of 1 ma. Figure Sc shows an increase in the on-current (~.5 V) with a temperature from 3 to 33 K. The resistance decreases with increasing temperature, indicating that the conducting paths exhibit semiconducting properties. The thermal coefficient α =.1 K 1 can be obtained from a linear fit of the following equation: R(T) = R [1 + α(t ᅳ T )], in the inset of Figure Sc. Therefore, we believe that the dominant conducting path in the Ni/SiN x /AlO y /TiN memristor would originate from the intrinsic SiN film, and exclude the diffusion of Ni atoms into the SiN x layer or strong metallic filaments in the AlO y layer. The I-V curve in the off-current state shows the linear fitting for ln(i/v) compared to V 1/ in Figure Sd. Poole-Frenkel (P-F) emission can be expressed by using the following relationship:, where d is the insulator thickness, is the barrier height, is the permittivity of free space, is the relative dielectric constant, k is the Boltzmann constant, and T is the absolute temperature. The P-F effect is S-

5 dominant as a result of trapping and de-trapping of carriers in the bulk of the insulator layer with many traps. The P-F emission occurs due to the field-assisted thermal excitation of electrons from the traps into the conduction band. The off-current state is close to the initial state, because the conducting paths are nearly ruptured. This result is in accordance with silicon nitride films deposited by various means in a variety of literature. As opposed to in the on-current state, a distinctive regime for F-N tunneling before set transition is not observed in the off-current state. The SiN x film in the off-current state exhibits strong insulating properties, and a very high electric field may be required to induce band bending of the SiN x layer negative set st nd 3rd Fig. S3 I-V characteristics (CCL=1 ma): High operating current is vulnerable to negative-set. Programming µ µ µ 1µ Volage [V] Read Read Read Read Read Read Read Read Erasing -5.µ -1.µ -15.µ. 5.m 1.m..m.m.m 8.m 1.m 1.m Fig. S Gradually modulated transient current by pulses with incremental amplitude for set and reset. Figure Sa shows the transient current depends on the scheme of increasing pulse amplitude. The current S-5

6 increase with repeated pulses is clearly observed. Figure Sb shows the current decreasing can be observed by applying a negative pulse. Since the incremental pulse amplitude increases the absolute amount of transient current, a read pulse is inserted between erasing pulses. Through the transient current of the read pulse, we were able to monitor progressively decreasing current. Conductance [S] 18.µ 1.µ 1.µ 1.µ LTP: 5.3 V/ ns LTD: 3.5 V/1 ns Conductance [S] 18.µ 1.µ 1.µ 1.µ LTP: 5.3 V/ ~ 11 ns LTD: 3.5 V/1 ~ 19 ns 8.µ Pulse number [#] 8.µ Pulse number [#] Fig. S5 Conductance modulation of Ni/SiN x /AlO y /TiN memristor: identical pulse response pulse width incremental response. Applied voltage [V] µ 3.µ 5.µ 15.µ Sensing current [A] 7.n 75.n 8.n Fig. S Sensing current and applied voltage amplitude for energy calculation of intermediate. The energy of inference at intermediate state is.3 pj (. V 5 ns 3.3 µa). Pulse with. V/5 ns is enough to stabilize the transient current for sensing the read current for inference. The average value of 3 points after stabilization was calculated except for the displacement current which occurs when the pulse is rising and falling. S-

7 - - 9.µ 9.5µ µ µ 3µ µ 5µ µ 9.5µ -.1 1µ µ 3µ µ 5µ Fig. S7 Transient characteristics: LTP and LTD. References: (1) Kim, S.; Jung. S.; Kim, M.-H; Cho, S.; Park, B.-G. Gradual Bipolar Resistive Switching in Ni/Si 3 N /n + -Si Resistive-switching Memory Device for High-Density Integration and Low-Power Applications. Solid. State. Electron. 15, 11, () Lee, M.-S; Park, B.-G.; Shin, H.; Lee, J.-H. Characteristics of Elliptical Gate-all-around SONOS Nanowire with Effective Circular Radius. Electron. Dev. Lett. 1, 11, (3) Jiang, X.; Ma, Z.; Xu, J.; Chen, K.; Xu, L.; Li, W.; Huang, X.; Feng, D. a-sin x :H-Based Ultra-Low Power Resistive Random Access Memory with Tunable Si Dangling Bond Conducting Path. Sci. Rep. 15, 5, 157. () Chang, Y.-F.; Fowler, B.; Chen, Y.-C.; Chen, Y.-T.; Wang, Y.; Xue, F.; Zhou, F.; Lee, J. C. Intrinsic SiO x -Based Unipolar Resistive Switching Memory. II. Thermal Effects on Charge Transport and Characterization of Multilevel Programing. J. Appl. Phys. 1, 11, 379. S-7