4196 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 63, NO. 11, NOVEMBER 2016

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1 4196 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 63, NO. 11, NOVEMBER 2016 Hybrid Open Drain Method and Fully Current- Based Characterization of Asymmetric Resistance Components in a Single MOSFET Jaewon Kim, Heesung Lee, Seong Kwang Kim, Junyeap Kim, Jaewon Park, Member, IEEE, Sung-Jin Choi, Dae Hwan Kim, Senior Member, IEEE, and Dong Myong Kim, Member, IEEE Abstract Separate extraction of source (R S ) from drain resistance (R D ) is important in the systematic modeling of electrical characteristics and investigation of physical mechanism related to the performance and reliability in MOSFETs and their integrated circuits. We report a hybrid open drain method (ODM), as a fully current-based characterization technique, for a comprehensive separation of asymmetric source and drain resistance components in a single MOSFET. In the hybrid ODM, the ODM through the parasitic bipolar transistor is combined with the dualsweep combinational transconductance technique, the channel resistance method, and the parasitic junction current method. We fully considered the asymmetry in the source and the drain possibly caused by the layout, process, and degradation under bias. We successfully extracted the resistance components with R Se = , R De = , R So = , R Do = , and R SUB = in the n-channel MOSFETs. R Se (R De ) is the V GS -independent external source (drain) resistance. R So (R Do ) is the V GS -independent external spreading source (drain) resistance and R Si (R Di ) is the V GS -dependent intrinsic source (drain) resistance, respectively. R SUB is the substrate resistance. The hybrid ODM is expected to be useful in the characterization of parasitic resistances in each MOSFET with asymmetry caused by the layout, process, and degradation without using multiple devices with different channel length (L) and width (W) for measurement. Index Terms Drain resistance, open drain method (ODM), separate extraction, single MOSFET, source resistance, substrate resistance. I. INTRODUCTION ACCURATE extraction of parasitic resistance components is very important for a long-term assessment of electrical performance and reliability as the parasitic resistance comes up with the channel resistance [1] [4]. In particular, Manuscript received September 1, 2016; accepted September 4, Date of publication September 26, 2016; date of current version October 20, This work was supported by the National Research Foundation of Korea Grant funded by the Korean Government (MSIP) under Grant 2016R1A5A The review of this paper was arranged by Editor M. M. Hussain. (Jaewon Kim and Heesung Lee are co-first authors.) J. Kim, H. Lee, S. K. Kim, J. Kim, S.-J. Choi, D. H. Kim, and D. M. Kim are with the School of Electrical Engineering, Kookmin University, Seoul , South Korea ( dmkim@kookmin.ac.kr). J. Park is with the Department of electrical and electronic Engineering, Southern University of Science and Technology of China, Shenzhen , China. Color versions of one or more of the figures in this paper are available online at Digital Object Identifier /TED a comprehensive separation of asymmetric source and drain resistance components (R S and R D ) in each MOSFET, caused by the layout, fabrication process, and/or degradation by hot carriers under high current driving, is important for a robust design, accurate modeling, and systematic characterization of MOSFETs and their integrated circuits. As well known, the effect of the source resistance (R S ) on the performance and degradation is much more significant than that of the drain resistance (R D ) in MOSFETs. We know that the source resistance causes a degradation of the transconductance (g m ), cutoff frequency ( f T ), power consumption, and noise performance. We also note that the hot carrier effect under high gate and drain bias causes asymmetric degradation of the drain resistance from the source resistance in MOSFETs. Therefore, separate extraction of R S from R D in each independent MOSFET is important in the systematic modeling of electrical characteristics and investigation of physical mechanism related to the performance and reliability in MOSFETs and their integrated circuits. However, the conventional extraction techniques require a complicated extraction process and multiple devices with different geometrical dimensions. Some techniques combine experimental capacitance voltage (C V ) data with the experimental current voltage (I V ) data. There are also some disputable assumptions and leave degradations of MOSFETs during characterization [5] [11]. In this paper, we report a hybrid ODM, which completely extracts the V GS -independent parasitic resistance components (R Se, R So, R De, R Do,andR SUB ) in MOSFETs through experimental I V characteristics of each independent device. The hybrid ODM is a fully current-based and comprehensive extraction technique for parasitic resistances in a single MOSFET. In the hybrid ODM, four I V -based extraction techniques are comprehensively combined. First, the ODM, based on the open collector method in the bipolar junction transistor (BJT) is used for extraction of the contact resistances (R Se and R De ) for the source and drain contacts. Second, the channel resistance method (CRM) is utilized for extraction of the V GS -independent parasitic resistances (R Se + R So + R De + R Do ). Third, the DSCT as the dual-sweep combinational transconductance technique is combined for extraction of the difference in the source and drain resistances IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See for more information.

2 KIM et al.: CHARACTERIZATION OF ASYMMETRIC RESISTANCE COMPONENTS IN A SINGLE MOSFET 4197 function of the substrate current (I SUB as the base current in the parasitic BJT) as [ ] I SUB + I D (1 α R ) V DS = V th ln α R [I SUB + I D (1 α F )/α F ] + R Se (I SUB + I D ) + R De I D (1) Fig. 1. Schematic cross section of an n-channel MOSFET with the equivalent circuit of the parasitic BJT and parasitic resistance components in measurement. [R De + R Do (R Se + R So )]. Finally, the parasitic junction current method (PJCM) was combined for extraction of the substrate resistance (R SUB ) [12] [15]. This allows a fully current-based and independent characterization of parasitic resistances in the single MOSFETs during and/or after an individual degradation process without combining devices with different channel length (L) and width (W) having the same degradation process or asymmetries between the source and the drain. Even though we applied the proposed technique to relatively large size of MOSFETs, the proposed technique is expected to be fully applicable to the single MOSFETs with extremely scaled gate length and width as far as they follow conventional long channel I V characteristics. II. COMPREHENSIVE SEPARATE EXTRACTION OF PARASITIC RESISTANCES THROUGH HYBRID OPEN DRAIN METHOD Parasitic resistance components with an equivalent circuit in a single MOSFET are shown in Fig. 1. R Se (R De ) as the gate bias (V GS )-independent external source (drain) resistance mainly coming from the contact resistance, R So (R Do ) as the V GS -independent external spreading source (drain) resistance for the heavily-doped source and drain region, R Si (R Di )as the V GS -dependent intrinsic source (drain) resistance close to the source/drain junction, and R SUB as the substrate resistance. In addition, the equivalent circuit for the parasitic BJT with the base as the substrate, and the emitter and the collector as the heavily doped source and drain is also shown in Fig. 1. In the separate characterization of the parasitic resistance components, we use a fully current-based and comprehensive hybrid ODM technique for accuracy and consistency even in a single MOSFET whether it is symmetric or asymmetric. For separate extraction of the V GS -independent source and drain external resistances (R Se and R De ) mainly coming from the contact resistance, in the first, we developed the ODM utilizing the parasitic n + pn + BJT with n + source as an emitter, p-substrate as the base, and n + drain as the collector. We note that the ODM is based on the open collector method with the Ebers Moll equivalent model for BJTs [14] [16]. With the drain as the collector in the parasitic BJT kept open, the voltage between the drain and the source (V DS ) becomes a linear with α F (α R ) as the forward (reverse) common-base current gain for the parasitic BJT and V th (=kt/q) asthethermal voltage. With the drain terminal open, I D goes to zero. Therefore, the parasitic source (drain) resistance R Se (R De ) is obtained from I SUB V DS (I SUB V SD for the reverse sweep) through [ ] 1 dv DS V DS ID =0 = V th ln + R Se I SUB, = R Se ID =0 α R di SUB with I D (I S ) as the drain (source) current in the MOSFET as the collector (emitter) in the parasitic BJT. We note that R De can be obtained by swapping the source with the drain in the ODM. We note that R De can be obtained by swapping the source with the drain in the ODM. In the second, for separate extraction of the V GS - independent external spreading source (drain) resistances R So (R Do ) through a fully current-based characterization, the CRM [5] is combined with the DSCT technique [12]. Obtained from the CRM under small drain bias (V DS ), the V GS -dependent total resistance R tot (V GS ) in Fig. 1 is described as R tot (V GS ) V DS = R Se + R So + R Do + R De I DS + R SDi (V GS ) + R ch (V GS ) (3) R internal (V GS ) = R SDi (V GS ) + R ch (V GS ) = V DS I D (4) L R SDi (V GS ) μ int C ox W(V GS V T ) (5) L eff R ch (V GS ) = μ eff C ox W(V GS V T ) (6) with V GS -dependent R internal as the total internal resistance, R ch as a channel resistance, R SDi as a resistance for the lightly doped region, V T as the threshold voltage, C ox (= ε ox /t ox ) as the oxide capacitance per unit area, L eff (= L L) as the bias-dependent effective channel length, μ int and μ eff as the bias-dependent effective mobility in the lightlydoped source/drain and the channel region, respectively. Therefore, the sum of V GS -independent external source/drain resistances (R Se + R So + R Do + R De ) is obtained through (2) R Se + R So + R Do + R De = R tot VGS V T (7) by making the V GS -dependent components [R Si (V GS ), R Di (V GS ),andr ch (V GS )] negligible with a high conductive channel at V GS V T. We also note that, through the DSCT technique [12], R D R S can be extracted by the forward (g mf ) and reverse (g mr ) transconductances in the saturation mode of operation. With the parasitic source resistance R S, the drain-to-source

3 4198 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 63, NO. 11, NOVEMBER 2016 current I DS in the forward mode is described as I DS = μ ( ) nc ox W (V GS I DS R S V T ) 2. (8) 2 L Therefore, the forward mode transconductance g mf under the forward mode of operation is obtained through g mf (V GS ) I ( ) DS W = μ n C ox (V GS I DS R S V T ) L ( ( ) ) IDS 1 R S. (9) By rearranging the terms, we have ( ) ) IDS g mf (V GS ) = g mo (1 R S = g mo (1 g mf R S ) (10) where the intrinsic transconductance g mo described as ( ) W g mo (V GS ) = μ n C ox (V GS I DS R S V T ). (11) L By swapping the source with the drain, we also obtain the reverse mode transconductance (g mr ) with the parasitic drain resistance R D described as ( ) ) IDS g mr = g mo (1 R D = g mo (1 g mr R D ). (12) We finally obtain R S, R D, and the difference R diff from the DSCT through R S = g mo g mf, R D = g mo g mr (13) g mo g mf g mo g mr R diff R D R S = (g mf g mr )/(g mf g mr ) (14) where (R D R S ) (R De + R Do + R Di ) (R Se + R So + R Si ). (15) As shown in Fig. 3, R diff changes little with V GS, and, therefore, R Si and R Di are calculated to be the same in the device under test. By combining (7) and (15) with the ODM, the V GS -independent external spreading resistances (R Do and R So ) can be separated through R Do = R tot VGS V T + R diff R De ODM (16) 2 and R So from the same process for the reverse sweep data. Finally, the substrate resistance R SUB can be extracted by combining the PJCM with the ODM [13], [15] (the current path for the PJCM as shown in Fig. 1) through I SUB,S D = IS e (V SUB V )/V th (17) V r S I SUB,S D (18) r S =[R SUB + (R Se R De )] (19) R SUB = r S (R De R Se ) = V R Se I SUB,S D 1 + (R Se /R De ) (20) with r s as the total parasitic resistance from the substrate to source/drain contact, and I SUB,S D as the current through the substrate. Fig. 2. R tot versus 1/(V GS V T ) for the CRM. Total channel resistance value is extrapolated from (R tot (V GS ) = R SDo + R SDe ). For the plot R tot versus 1/(V GS V T ) instead of R tot versus (V GS V T ) in conventional CRM. Fig. 3. Measured R diff = R D R S through the DSCT technique. This plot also shows that R SDi is symmetric, because R diff value changes little. Inset: experimental transconductances (g mf and g mr ) for the forward and reverse dual sweeps. Difference in the transconductance between the forward and reverse shows that the R S and R D value is asymmetric. III. EXPERIMENTAL RESULTS For application of the hybrid ODM as a fully currentbased comprehensive separate characterization of parasitic resistance components in a single MOSFET, we employed the n-channel MOSFETs with t ox = 6.91 nm, W = 30/50/70 μm andl = 0.18/0.27/0.36 μm as schematically shown in Fig. 1. The subthreshold slope (SS) and the threshold voltage (V T ) were measured to be SS = mv/decade and V T = V. By combining the CRM with the DSCT technique, as shown in Figs. 2 and 3, the V GS -independent extrinsic resistance components are extracted to be R Se = 6.67 and R De = R tot is measured through the CRM at V DS = 0.05 V and obtained R tot (V GS ) = R SDo + R SDe = as shown in Fig. 2. Through the plot from R tot versus 1/(V GS V T ), it is expected to be more accurate than the conventional R tot extrapolation from the plot for R tot versus V GS [7], [17]. We obtained R diff = (R De + R Do ) (R Se + R So ) = By combining the DSCT technique with the CRM, we obtained R De + R Do = 8.91 and R Se +R So = Then, using the hybrid process combining

4 KIM et al.: CHARACTERIZATION OF ASYMMETRIC RESISTANCE COMPONENTS IN A SINGLE MOSFET 4199 Fig. 4. Measured ODM shows the gate bias (V GS )-independent external source (R Se ) and drain resistances (R De ). Open (closed) symbol shows when the source (drain) node is floated for the ODM. The gate bias (V GS )- independent external source and drain resistances are extracted by (1/slope) through the ODM. Inset: equivalent circuit of ODM. Fig. 5. Substrate current as a function of the substrate bias in the PJCM for the substrate resistance. Extracted series resistance (r s ) includes both the substrate resistance (R SUB ) and the external source and drain resistances (R Se and R De ). R SUB can be extracted by combining r s with R Se and R De obtained from the PJCM. TABLE I EXTRACTED RESISTANCES IN MOSFETs THROUGH THE HYBRID ODM By the PJCM [the path PJCM in Fig. 1 and (18)], we obtained r s = R SUB + R Se R De = asshowninfig. 5. Finally, we obtained each parasitic resistance component to be R Se = 6.67, R De = 7.75, R So = 0.81, R Do = 1.16, andr SUB = 6.43 in an independent single MOSFET through the hybrid ODM with the fully currentbased comprehensive extraction process. We also verified the proposed hybrid ODM with intentional asymmetry by adding external resistance to the drain terminal as summarized in Table I. The result confirms that the fully current-based hybrid ODM technique, combined with fully current-based CRM, DSCT, and PJCM, is very accurate and useful for independent and separate extraction of parasitic resistance components in single MOSFETs. IV. CONCLUSION We reported a hybrid ODM as a fully current-based comprehensive and separate characterization technique for parasitic resistance components in single MOSFETs. In the hybrid ODM, the ODM through a parasitic BJT is combined with the CRM, the DSCT, and the PJCM. It was applied to MOSFETs with various channel length (L = μm) and width (W = μm). During the separate extraction process, asymmetry in the source and the drain resistance components possibly caused by the layout, fabrication process, and/or degradation during the operation of each MOSFET is fully considered. By the proposed hybrid ODM, we comprehensively separated each parasitic resistance component to be R Se = , R So = , R De = , R Do = , andr SUB = Even though we applied the proposed technique to MOSFETs with the long channel MOSFETs, the proposed technique is fully applicable to the single MOSFETs with extremely scaled gate length and width as far as they follow conventional long channel I V characteristics. We expect that this fully dc currentbased technique is useful for consistent characterization of fabrication process, layout, and physical mechanisms in the degradation of each MOSFET even as a component in a large scale integrated circuit. It is also useful in the robust design and modeling of the CMOS integrated circuits and their systems. REFERENCES the ODM as shown in Fig. 4 with CRM and DSCT, the intrinsic source and drain resistance components are extracted to be R So = 0.81 and R Do = 1.16, respectively. [1] B. Davari, R. H. Dennard, and G. G. Shahidi, CMOS scaling for high performance and low power-the next ten years, Proc. IEEE, vol. 83, no. 4, pp , Apr [2] F. Matsuoka, K. Kasai, H. Oyamatsu, M. Kinugawa, and K. Maeguchi, Drain structure optimization for highly reliable deep submicrometer n-channel MOSFET, IEEE Trans. Electron Devices, vol. 41, no. 3, pp , Mar [3] F. K. Baker and J. R. Pfiester, The influence of tilted source-drain implants on high-field effects in submicrometer MOSFET s, IEEE Trans. Electron Devices, vol. 35, no. 12, pp , Dec [4] J. P. Campbell, K. P. Cheung, J. S. Suehle, and A. Oates, A simple series resistance extraction methodology for advanced CMOS devices, IEEE Electron Device Lett., vol. 32, no. 8, pp , Aug doi: /LED [5] Y. Taur and T. H. Ning, Fundamentals of Modern VLSI Devices, 2nd ed. Cambridge, U.K.: Cambridge Univ. Press, 2009, pp [6] D. K. Schroder, Semiconductor Material and Device Characterization, 3rd ed. New York, NY, USA: Wiley, 2006, pp

5 4200 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 63, NO. 11, NOVEMBER 2016 [7] C. L. Lou, W. K. Chim, D. S. H. Chan, and Y. Pan, A novel single-device DC method for extraction of the effective mobility and source-drain resistances of fresh and hot-carrier degraded drainengineered MOSFETâ s, IEEE Trans. Electron Devices, vol. 45, no. 6, pp , Jun [8] A. Raychaudhuri, M. J. Deen, M. I. H. King, and J. Kolk, Finding the asymmetric parasitic source and drain resistances from the A.C. conductances of a single MOS transistor, Solid-State Electron., vol. 39, no. 6, pp , Jun [9] A. Ortiz-Conde, J. J. Liou, W. K. Wong, and F. J. García-Sánchez, Simple method for extracting the difference between the drain and source series resistances in MOSFETs, Electron. Lett., vol. 30, no. 12, pp , Jun [10] A. Oritz-Conde, F. J. G. Sanchez, and J. J. Liou, An improved method for extracting the difference between the drain and source series resistances in MOSFETs, Electron. Lett., vol. 39, no. 3, pp , Mar [11] S. C. Baek, H. Bae, D. H. Kim, and D. M. Kim, Avalanche hot source method for separated extraction of parasitic source and drain resistances in single metal-oxide-semiconductor field effect transistors, J. Semicond. Technol. Sci., vol. 12, no. 1, Mar [12] S. Jun et al., Dual-sweep combinational transconductance technique for separate extraction of parasitic resistances in amorphous thin-film transistors, IEEE Electron Device Lett., vol. 36, no. 2, pp , Feb [13] H. Bae et al., Separate extraction of source, drain, and substrate resistances in MOSFETs with parasitic junction current method, IEEE Electron Device Lett., vol. 31, no. 11, pp , Nov [14] J. J. Ebers and J. L. Moll, Large signal behavior of junction transistors, Proc. IRE, vol. 42, no. 12, pp , Dec [15] L. J. Giacoleto, Measurement of emitter and collector series resistances, IEEE Trans. Electron Devices, vol. 19, no. 5, pp , May [16] W. Filensky and H. Beneking, New technique for determination of static emitter and collector series resistances of bipolar transistors, Electron. Lett., vol. 17, no. 14, pp , Jul [17] D. M. Kim, H. C. Kim, and H. T. Kim, Modeling and extraction of gate bias-dependent parasitic source and drain resistances in MOSFETs, Solid-State Electron., vol. 47, no. 10, pp , Oct Junyeap Kim is currently pursuing the B.S. degree in electrical engineering from Kookmin University, Seoul, South Korea, in Jaewon Park (S 09 M 13) received the B.S. degree in electrical engineering from Korea University, Seoul, South Korea, in 2004, and the Ph.D. degree in electrical engineering from Texas A&M University, College Station, TX, USA, in His current research interests include the development and application of microfabrication, organon-a-chip microdevices, and high-throughput drug screening platforms. Sung-Jin Choi received the M.S. and Ph.D. degrees in electrical engineering from the Korea Advanced Institute of Science and Technology, Daejeon, South Korea, in He is currently an Assistant Professor with the School of Electrical Engineering, Kookmin University, Seoul, South Korea. Jaewon Kim received the B.S. degree in electrical South Korea, in 2016, where he is currently pursuing Heesung Lee received the B.S. degree in electrical South Korea, in 2016, where he is currently pursuing Dae Hwan Kim (M 08 SM 12) received the B.S., M.S., and Ph.D. degrees in electrical engineering from Seoul National University, Seoul, South Korea, in 1996, 1998, and 2002, respectively. He is currently a Professor with the School of Electrical Engineering, Kookmin University, Seoul. His current research interests include nano CMOS, oxide and organic thin-film transistors, biosensors, and neuromorphic devices. Seong kwang Kim received the B.S. degree in electrical South Korea, in 2015, where he is currently pursuing Dong Myong Kim (S 86 M 88) received the B.S. (magna cum laude) and M.S. degrees in electronics engineering from Seoul National University, Seoul, South Korea, in 1986 and 1988, respectively, and the Ph.D. degree in electrical engineering from the University of Minnesota Twin Cities, Minneapolis, MN, USA, in He is currently a Professor in the School of Electrical Engineering, Kookmin University, Seoul, since 1993.