FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO. LTC V Software-Selectable Multiprotocol Transceiver

Transcription

1 LC V Software-Selectable Multiprotocol ransceiver FERES Software-Selectable ransceiver Supports: RS232, RS449, EI530, EI530-, V.35, V.36, X.21 Operates from Single 3.3V Supply with LC2846 or a Single 5V Supply with 3.3V Logic with LC2847 V Rheinland of North merica Inc. Certified NE1, NE2 and B Compliant, Report No.: B/050101/02 Complete DE or DCE Port with LC2846 or LC2847 vailable in a 36-Lead Narrow (0.209") SSOP and 38-Lead (7mm x 5mm) QFN package PPLICIO S Data Networking CS and DS Data Routers DESCRIPIO he LC 2845 is a 5-driver/5-receiver multiprotocol transceiver. he LC2845 and LC2846 form the core of a complete software-selectable DE or DCE interface port that supports the RS232, RS449, EI530, EI530-, V.35, V.36 or X.21 protocols. he LC2845 operates from a 3.3V supply and supplies provided by the LC2846. his part is available in a 36-lead SSOP and 38-lead (7mm x 5mm) QFN package. he LC2845 and LC2847 in QFN packages offer the smallest multiprotocol serial port available., LC and L are registered trademarks of Linear echnology Corporation. YPICL PPLICIO DE or DCE Multiprotocol Serial Interface with DB-25 Connector RL M RI LL CS DSR DCD DR RS RXD RXC XC SCE XD LC2845 LC2846 D5 D * RL (140) M (142) RI (125) LL (141) CS B CS (106) DSR B DSR (107) DCD B DCD (109) DR B DR (108) RS B RS (105) SHIELD (101) SG (102) RXD B RXD (104) RXC B RXC (115) XC B XC (114) SCE B SCE (113) XD B XD (103) *OPIONL DB-25 CONNECOR

2 LC2845 BSOLE MXIMM RINGS W W W (Note 1) Supply Voltage V to 6.5V V to 6.5V V EE... 10V to 0.3V V DD V to 10V Input Voltage ransmitters V to ( + 0.3V) Receivers... 18V to 18V Logic Pins V to ( + 0.3V) Output Voltage ransmitters... (V EE 0.3V) to (V DD + 0.3V) Receivers V to ( + 0.3V) Short-Circuit Duration ransmitter Output... Indefinite Receiver Output... Indefinite V EE sec Operating emperature Range LC2845C... 0 C to 70 C LC2845I C to 85 C Storage emperature Range C to 150 C Lead emperature (Soldering, 10 sec) C PCKGE/ORDER INFORMION W 1 V DD D DCE/DE 14 D4ENB 15 EN D5 18 OP VIEW D4 D5 36 V EE 35 GND B B 30 / 29 / B B B 24 D D G PCKGE 36-LED PLSIC SSOP JMX = 125 C, θ J = 90 C/ W, θ JC = 35 C/ W ORDER PR NMBER LC2845CG LC2845IG D NC 11 DCE/DE 12 OP VIEW V DD VCC VEE V EE GND D4ENB EN D5 VCC D HF PCKGE 38-LED (7mm 5mm) PLSIC QFN JMX = 125 C, θ J = 34 C/ W EXPOSED PD IS V EE (PIN 39) MS BE SOLDERED O PCB B B / / B B B D4 ORDER PR NMBER LC2845CHF LC2845IHF HF PR MRKING I Consult LC Marketing for parts specified with wider operating temperature ranges. ELECRICL CHRCERISICS he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. = 5V, = 3.3V, V DD = 8V, V EE = 7V for V.28, 5.5V for V.10, V.11 (Notes 2, 3) SYMBOL PRMEER CONDIIONS MIN YP MX NIS Supplies I CC Supply Current (DCE Mode, RS530, RS530-, X.21 Modes, No Load 2.7 m ll Digital Pins = GND or ) RS530, RS530-, X.21 Modes, Full Load m V.28 Mode, No Load 1 3 m V.28 Mode, Full Load 1 3 m No-Cable Mode µ 2

3 ELECRICL CHRCERISICS LC2845 he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. = 5V, = 3.3V, V DD = 8V, V EE = 7V for V.28, 5.5V for V.10, V.11 (Notes 2, 3) SYMBOL PRMEER CONDIIONS MIN YP MX NIS I EE V EE Supply Current (DCE Mode, RS530, RS530-, X.21 Modes, No Load 2 m ll Digital Pins = GND or ) RS530, X.21 Modes, Full Load 23 m RS530-, Full Load 34 m V.28 Mode, No Load 1 m V.28 Mode, Full Load 12 m No-Cable Mode 10 µ I DD V DD Supply Current (DCE Mode, RS530, RS530-, X.21 Modes, No Load 0.3 m ll Digital Pins = GND or ) RS530, RS530-, X.21 Modes, Full Load 0.3 m V.28 Mode, No Load 1 m V.28 Mode, Full Load 13.5 m No-Cable Mode 10 µ I VIN Supply Current (DCE Mode, ll Modes Except No-Cable Mode 650 µ ll Digital Pins = GND or ) P D Internal Power Dissipation (DCE Mode, RS530, RS530-, X.21 Modes, Full Load 240 mw ll Digital Pins = GND or ) V.28 Mode, Full Load 64 mw Logic Inputs and Outputs V IH Logic Input High Voltage 2 V V IL Logic Input Low Voltage = 5V 0.8 V EN when = 3.3V 0.5 V I IN Logic Input Current,,, D4, D5 ±10 µ,,, DCE, D4ENB, EN = GND µ,,, DCE, D4ENB, EN = ±10 µ V OH Output High Voltage I O = 3m V V OL Output Low Voltage I O = 1.6m V I OSR Output Short-Circuit Current 0V V O ±50 m I OZR hree-state Output Current = = =, V O = GND µ = = =, V O = ±10 µ V.11 Driver V ODO Open Circuit Differential Output Voltage R L = 1.95k (Figure 1) ±5 V V ODL Loaded Differential Output Voltage R L = 50Ω (Figure 1) 0.5V ODO 0.67V ODO V ±2 V V OD Change in Magnitude of Differential R L = 50Ω (Figure 1) 0.2 V Output Voltage V OC Common Mode Output Voltage R L = 50Ω (Figure 1) 3 V V OC Change in Magnitude of Common Mode R L = 50Ω (Figure 1) 0.2 V Output Voltage I SS Short-Circuit Current V O = GND ±150 m I OZ Output Leakage Current 0.25V V O 0.25V, Power Off or ±1 ±100 µ No-Cable Mode or Driver Disabled t r, t f Rise or Fall ime LC2845C (Figures 2, 5) ns LC2845I (Figures 2, 5) ns t PLH Input to Output LC2845C (Figures 2, 5) ns LC28451 (Figures 2, 5) ns t PHL Input to Output LC2845C (Figures 2, 5) ns LC2845I (Figures 2, 5) ns t Input to Output Difference, t PLH t PHL LC2845C (Figures 2, 5) ns LC2845I (Figures 2, 5) ns t SKEW Output to Output Skew (Figures 2, 5) 3 ns 3

4 LC2845 ELECRICL CHRCERISICS he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. = 5V, = 3.3V, V DD = 8V, V EE = 7V for V.28, 5.5V for V.10, V.11 (Notes 2, 3) SYMBOL PRMEER CONDIIONS MIN YP MX NIS V.11 Receiver V H Input hreshold Voltage 7V V CM 7V V V H Input Hysteresis 7V V CM 7V mv I IN Input Current (, B) 10V V,B 10V ±0.66 m R IN Input Impedance 10V V,B 10V kω t r, t f Rise or Fall ime (Figures 2, 6) 15 ns t PLH Input to Output LC2845C C L = 50pF (Figures 2, 6) ns LC2845I C L = 50pF (Figures 2, 6) ns t PHL Input to Output LC2845C C L = 50pF (Figures 2, 6) ns LC2845I C L = 50pF (Figures 2, 6) ns t Input to Output Difference, t PLH t PHL LC2845C C L = 50pF (Figures 2, 6) ns LC2845I C L = 50pF (Figures 2, 6) ns V.10 Driver V O Output Voltage Open Circuit, R L = 3.9k ±4 ±6 V V Output Voltage R L = 450Ω (Figure 3) ±3.6 V R L = 450Ω (Figure 3) 0.9V O I SS Short-Circuit Current V O = GND ±150 m I OZ Output Leakage Current 0.25V V O 0.25V, Power Off or ±0.1 ±100 µ No-Cable Mode or Driver Disabled t r, t f Rise or Fall ime R L = 450Ω, C L = 100pF (Figures 3, 7) 2 µs t PLH Input to Output R L = 450Ω, C L = 100pF (Figures 3, 7) 1 µs t PHL Input to Output R L = 450Ω, C L = 100pF (Figures 3, 7) 1 µs V.10 Receiver V H Receiver Input hreshold Voltage V V H Receiver Input Hysteresis mv I IN Receiver Input Current 10V V 10V ±0.66 m R IN Receiver Input Impedance 10V V 10V kω t r, t f Rise or Fall ime C L = 50pF (Figures 4, 8) 15 ns t PLH Input to Output C L = 50pF (Figures 4, 8) 55 ns t PHL Input to Output C L = 50pF (Figures 4, 8) 109 ns t Input to Output Difference, t PLH t PHL C L = 50pF (Figures 4, 8) 60 ns V.28 Driver V O Output Voltage Open Circuit ±10 V R L = 3k (Figure 3) ±5 ±8.5 V I SS Short-Circuit Current V O = GND ±150 m I OZ Output Leakage Current 0.25V V O 0.25V, Power Off or ±1 ±100 µ No-Cable Mode or Driver Disabled SR Slew Rate R L = 3k, C L = 2500pF (Figures 3, 7) 4 30 V/µs t PLH Input to Output R L = 3k, C L = 2500pF (Figures 3, 7) µs t PHL Input to Output R L = 3k, C L = 2500pF (Figures 3, 7) µs 4

5 ELECRICL CHRCERISICS YPICL PERFOR CE CHRCERISICS I CC (m) W = 25 C = 25 C = 25 C D RE (kbd) 2845 G I EE (m) I DD (m) LC2845 he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. = 5V, = 3.3V, V DD = 8V, V EE = 7V for V.28, 5.5V for V.10, V.11 (Notes 2, 3) SYMBOL PRMEER CONDIIONS MIN YP MX NIS V.28 Receiver V HL Input Low hreshold Voltage 0.8 V V LH Input High hreshold Voltage 2 V V H Receiver Input Hysterisis V R IN Receiver Input Impedance 15V V 15V kω t r, t f Rise or Fall ime C L = 50pF (Figures 4, 8) 15 ns t PLH Input to Output C L = 50pF (Figures 4, 8) ns t PHL Input to Output C L = 50pF (Figures 4, 8) ns Note 1: bsolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: ll currents into device pins are positive; all currents out of device are negative. ll voltages are referenced to device ground unless otherwise specified. RS530, X.21 in DCE Mode (hree V.11, wo V.10 Drivers with Full Load) I CC vs Data Rate RS530, X.21 in DCE Mode (hree V.11, wo V.10 Drivers with Full Load) I CC vs emperature RS530- in DCE Mode (hree V.10 Drivers with Full Load) I EE vs Data Rate D RE (kbd) 2845 G02 D RE (kbd) 2845 G03 RS530- in DCE Mode (hree V.10 Drivers with Full Load) I EE vs emperature Note 3: ll typicals are given for = 5V, = 3.3V, V DD = 8V, V EE = 7V for V.28, 5.5V for V.10, V.11 and = 25 C V.28 in DCE Mode (Five V.28 Drivers with Full Load) I DD vs Data Rate V.28 in DCE Mode (Five V.28 Drivers with Full Load) I DD vs emperature I CC (m) I EE (m) I DD (m) EMPERRE ( C) 2845 G04 EMPERRE ( C) 2845 G05 EMPERRE ( C) 2845 G06 5

6 LC2845 PIN FNCIONS (G-36/QFN-38 Packages) (Pins 1, 19/Pins 17, 36): Positive Supply for the ransceivers. Connect to Pin 8 on LC2846 or to 5V supply. Connect a capacitor to ground. V DD (Pin 2/Pin 37): Positive Supply Voltage for V.28. Connect to V DD Pin 7 on LC2846 or 8V supply. Connect a capacitor to ground. (Pin 3/Pin 38): L Level Driver 1 Input. (Pin 4/Pin 1): L Level Driver 2 Input. (Pin 5/Pin 2): L Level Driver 3 Input. (Pin 6/Pin 3): CMOS Level Receiver 1 Output. Receiver outputs have a weak pull up to when high impedance. (Pin 7/Pin 4): CMOS Level Receiver 2 Output. (Pin 8/Pin 5): CMOS Level Receiver 3 Output. D4 (Pin 9/Pin 6): L Level Driver 4 Input. (Pin 10/Pin 7): CMOS Level Receiver 4 Output. (Pin 11/Pin 8): L Level Mode Select Input 0. Mode select inputs pull up to. (Pin 12/Pin 9): L Level Mode Select Input 1. (Pin 13/Pin 10): L Level Mode Select Input 2. DCE/DE (Pin 14/Pin 12): L Level Mode Select Input. Logic high enables Driver 3. Logic low enables Receiver 1. D4ENB (Pin 15/Pin 13): L Level Enable Input. Logic low enables Driver 4. Pulls up to. EN (Pin 16/Pin 14): L Level Enable Input. Logic high enables Receiver 4. Pulls up to. (Pin 17/Pin 15): CMOS Level Receiver 5 Output. D5 (Pin 18/Pin 16): L Level Driver 5 Input. (Pin 20/Pin 18): Positive Supply for the Receiver Outputs. 3V 3.6V. Connect a capacitor to ground. D5 (Pin 21/Pin 19): Driver 5 Inverting Output. (Pin 22/Pin 20): Receiver 5 Inverting Input. (Pin 23/Pin 21): Receiver 4 Inverting Input. D4 (Pin 24/Pin 22): Driver 4 Inverting Input. B (Pin 25/Pin 23): Receiver 3 Noninverting Input. (Pin 26/Pin 24): Receiver 3 Inverting Input. B (Pin 27/Pin 25): Receiver 2 Noninverting Input. (Pin 28/Pin 26): Receiver 2 Inverting Input. / B (Pin 29/Pin 27): Receiver 1 Noninverting Input and Driver 3 Noninverting Output. / (Pin 30/Pin 28): Receiver 1 Inverting Input and Driver 3 Inverting Output. B (Pin 31/Pin 29): Driver 2 Noninverting Output. (Pin 32/Pin 30): Driver 2 Inverting Output. B (Pin 33/Pin 31): Driver 1 Noninverting Output. (Pin 34/Pin 32): Driver 1 Inverting Output. GND (Pin 35/Pin 33): Ground. V EE (Pin 36/Pins 34, 35): Negative Supply Voltage. Connect to V EE Pin 31 on LC2846 or to 7V supply. Connect a capacitor to ground. EXPOSED Pad V EE (Pin 39): Must be Soldered to PCB. 6

7 LC2845 BLOCK DIGR 1 W 36 V EE ES CIRCIS V DD 2 35 GND R L 34 V OD 3 33 B R L V OC 32 B 2845 F B Figure 1. V.11 Driver est Circuit 30 / 5 6k S3 6 6k 29 / B 28 B R L 100Ω C L 100pF C L 100pF B R C L 7 S3 27 B Figure 2. V.11 Driver/Receiver C est Circuit 2845 F02 6k 26 8 S3 D 25 B C L R L D4 9 D4 24 D4 10 6k S F03 Figure 3. V.10/V.28 Driver est Circuit DCE/DE 14 D4ENB 15 EN k S3 22 D R D5 18 D5 21 D5 C L MODE SELECION LOGIC 2845 F04 Figure 4. V.10/V.28 Receiver est Circuit BD 7

8 LC2845 W ODE SELECIO (Note 1) (Note 4) (Note 4) (Note 1) D4 MODE NME DCE,, D5 /DE D4, D5 B B B Not sed (Default V.11) L X V.11 V.11 V.11 V.11 Z Z V.10 RS L X V.11 V.11 V.10 Z Z Z V.10 RS L X V.11 V.11 V.11 V.11 Z Z V.10 X L X V.11 V.11 V.11 V.11 Z Z V.10 V L X V.28 Z V.28 Z Z Z V.28 RS449/V L X V.11 V.11 V.11 V.11 Z Z V.10 V.28/RS L X V.28 Z V.28 Z Z Z V.28 No Cable X X Z Z Z Z Z Z Z Not sed (Default V.11) L L V.11 V.11 V.11 V.11 V.11 V.11 V.10 RS L L V.11 V.11 V.10 Z V.11 V.11 V.10 RS L L V.11 V.11 V.11 V.11 V.11 V.11 V.10 X L L V.11 V.11 V.11 V.11 V.11 V.11 V.10 V L L V.28 Z V.28 Z V.28 Z V.28 RS449/V L L V.11 V.11 V.11 V.11 V.11 V.11 V.10 V.28/RS L L V.28 Z V.28 Z V.28 Z V.28 No Cable X X Z Z Z Z Z Z Z MODE NME DCE /DE Not sed (Default V.11) RS RS X V RS449/V V.28/RS No Cable Not sed (Default V.11) RS RS X V RS449/V V.28/RS No Cable Note 1: Driver inputs are L level compatible. Note 2: nused receiver inputs are terminated with 30k to ground. Note 3: Receiver outputs are CMOS level compatible and have a weak pull-up to when Z. Note 4: Driver 4 is enabled by D4ENB=0 (Pin 15). Note 5: Receiver 4 is enabled by EN=1 (Pin 16). (Note 2) (Note 3) (Note 2) (Note 2) (Note 2) (Note 5) (Note 3) (Note 5), B B B, V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS V.11 V.11 V.10 30k V.11 V.11 V.10 CMOS CMOS V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS V.28 30k V.28 30k V.28 30k V.28 CMOS CMOS V.11 V.11 V.11 V.11 V.11 V.11 V.10 CMOS CMOS V.28 30k V.28 30k V.28 30k V.28 CMOS CMOS 30k 30k 30k 30k 30k 30k 30k Z Z 30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS 30k 30k V.10 30k V.11 V.11 V.10 Z CMOS 30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS 30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS 30k 30k V.28 30k V.28 30k V.28 Z CMOS 30k 30k V.11 V.11 V.11 V.11 V.10 Z CMOS 30k 30k V.28 30k V.28 30k V.28 Z CMOS 30k 30k 30k 30k 30k 30k 30k Z Z 8

9 LC2845 W W SWICHI G I E WVEFOR S 3V D 0V 1.5V f = 1MHz : t r 10ns : t f 10ns 1.5V t PLH t PHL V O B V O 50% t r 90% 10% 1/2 V O V DIFF = V(B) V() 90% t f 50% 10% B V O t SKEW t SKEW 2845 F05 Figure 5. V.11 Driver Propagation Delays V O B 0V V O t PLH f = 1MHz : t r 10ns : t f 10ns INP 0V t PHL V OH R V OL 1.65V OP 1.65V 2845 F06 Figure 6. V.11 Receiver Propagation Delays 3V D 0V V O V O 1.5V t PHL 3V t f 0V 3V 1.5V t PLH 0V 3V t r 3V 2845 F07 Figure 7. V.10, V.28 Driver Propagation Delays V IH RECEIVER HRESHOLD RECEIVER HRESHOLD V IL V OH R t PHL 1.65V t PLH 1.65V 2845 F08 V OL Figure 8. V.10, V.28 Receiver Propagation Delays 9

10 LC2845 PPLICIONS INFORMION Overview W he LC2846/LC2845 or LC2847/LC2845 form the core of a complete software-selectable DE or DCE interface port that supports the RS232, RS449, EI530, EI530-, V.35, V.36 or X.21 protocols. Cable termination is provided on-chip, eliminating the need for discrete designs. complete DCE-to-DE interface operating in EI530 mode is shown in Figure 9. he LC2846 of each port is used to generate the clock and data signals. he LC2845 is used to generate the control signals along with LL (Local Loop-Back), RL (Remote Loop-Back), M (est Mode) and RI (Ring Indicate). Cable termination is used only for the clock and data signals because they must support V.11 cable termination. he control signals do not need any external resistors. DE DCE SERIL CONROLLER LC2846 LC2846 SERIL CONROLLER XD XD 103Ω XD SCE SCE 103Ω SCE XC 103Ω XC XC RXC 103Ω RXC RXC RXD 103Ω RXD RXD LC2845 LC2845 RS RS RS DR DR DR DCD DCD DCD DSR DSR DSR CS CS CS LL D4 LL LL M M D4 M RI RI D5 RI RL D5 RL RL 2845 F09 10 Figure 9. Complete Multiprotocol Interface in EI530 Mode

11 LC2845 PPLICIONS INFORMION Mode Selection W he interface protocol is selected using the mode select pins, and (see the Mode Selection table). For example, if the port is configured as a V.35 interface, the mode selection pins should be = 1, = 0, = 0. For the control signals, the drivers and receivers will operate in V.28 (RS232) electrical mode. For the clock and data signals, the drivers and receivers will operate in V.35 electrical mode. he DCE/DE pin will configure the port for DCE mode when high, and DE when low. he interface protocol may be selected simply by plugging the appropriate interface cable into the connector. he mode pins are routed to the connector and are left unconnected (1) or wired to ground (0) in the cable as shown in Figure 10. he internal pull-up current sources will ensure a binary 1 when a pin is left unconnected and that the LC2846/ LC2845 enters the no-cable mode when the cable is removed. In the no-cable mode the LC2846/LC2845 supply current drops to less than 1000µ and all driver outputs are forced into a high impedance state. he mode selection may also be accomplished by using jumpers to connect the mode pins to ground or. Cable ermination raditional implementations have included switching resistors with expensive relays, or required the user to change termination modules every time the interface standard has changed. Custom cables have been used with the termination in the cable head or separate terminations are built on the board and a custom cable routes the signals to the appropriate termination. Switching the termination with FEs is difficult because the FEs must remain off even though the signal voltage is beyond the supply voltage for the FE drivers or the power is off. sing the LC2846/LC2845 solves the cable termination switching problem. Via software control, appropriate termination for the V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35 electrical protocols is chosen. V.10 (RS423) Interface typical V.10 unbalanced interface is shown in Figure 11. V.10 single-ended generator output with ground C is connected to a differential receiver with inputs ' connected to, and input C' connected to the signal return ground C. sually, no cable termination is required for V.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in Figure 12. (D) CONNECOR LC2846 DCE/DE NC NC DCE/DE CBLE LC2845 D4ENB 3.3k EN (D) 2845 F10 Figure 10. Single Port DCE V.35 Mode Selection in the Cable 11

12 LC2845 PPLICIONS INFORMION W he V.10 receiver configuration in the LC2845 is shown in Figure 13. In V.10 mode switch S3 inside the LC2845 is turned off. he noninverting input is disconnected inside the LC2845 receiver and connected to ground.he cable termination is then the 30k input impedance to ground of the LC2845 V.10 receiver. GENEROR C BLNCED INERCONNECING CBLE I Z CBLE ERMINION Figure 11. ypical V.10 Interface ' C' LOD RECEIVER 2845 F m V.11 (RS422) Interface typical V.11 balanced interface is shown in Figure 14. V.11 differential generator with outputs and B with ground C is connected to a differential receiver with ground C', inputs ' connected to, B' connected to B. he V.11 interface has a differential termination at the receiver end that has a minimum value of 100Ω. he termination resistor is optional in the V.11 specification, but for the high speed clock and data lines, the termination is required to prevent reflections from corrupting the data. he receiver inputs must also be compliant with the impedance curve shown in Figure 12. In V.11 mode, all switches are off except S1 of the LC2846 s receivers which connects a 103Ω differential termination impedance to the cable as shown in Figure he LC2845 only handles control signals, so no termination other than its V.11 receivers 30k input impedance is necessary. GENEROR BLNCED INERCONNECING CBLE LOD CBLE ERMINION RECEIVER 10V 3V ' 3V 10V V Z B B' 100Ω MIN C C' 2845 F m 2845 F12 Figure 14. ypical V.11 Interface 12 Figure 12. V.10 Receiver Input Impedance ' B' C' R8 6k S3 GND R6 R7 LC2845 RECEIVER 2845 F13 Figure 13. V.10 Receiver Configuration ' B' C' 51.5Ω S1 S2 51.5Ω 124Ω R8 6k S3 GND R6 R7 LC2846 RECEIVER Figure 15. V.11 Receiver Configuration 2845 F15 1 ctually, there is no switch S1 in receivers and. However, for simplicity, all termination networks on the LC2846 can be treated identically if it is assumed that an S1 switch exists and is always closed on the and receivers.

13 LC2845 PPLICIONS INFORMION V.28 (RS232) Interface W typical V.28 unbalanced interface is shown in Figure 16. V.28 single-ended generator output with ground C is connected to a single-ended receiver with input ' connected to, ground C' connected via the signal return ground C. In V.28 mode, all switches are off except S3 inside the LC2846/LC2845 which connects a 6k (R8) impedance to ground in parallel with () plus (R6) for a combined impedance of 5k as shown in Figure 17. he noninverting input is disconnected inside the LC2846/ LC2845 receiver and connected to a L level reference voltage for a 1.4V receiver trip point. V.35 Interface typical V.35 balanced interface is shown in Figure 18. V.35 differential generator with outputs and B with ground C is connected to a differential receiver with ground C', inputs ' connected to, B' connected to B. he V.35 interface requires a or delta network termination at the receiver end and the generator end. he receiver differential impedance measured at the connector must be 100Ω ±10Ω, and the impedance between shorted terminals (' and B') and ground C' must be 150Ω ±15Ω. In V.35 mode, both switches S1 and S2 inside the LC2846 are on, connecting the network impedance as shown in Figure 19. he 30k input impedance of the receiver is placed in parallel with the network termination, but does not affect the overall input impedance significantly. he generator differential impedance must be 50Ω to 150Ω and the impedance between shorted terminals ( and B) and ground C must be 150Ω ±15Ω. For the generator termination, switches S1 and S2 are both on as shown in Figure 20. GENEROR BLNCED INERCONNECING CBLE CBLE ERMINION ' LOD RECEIVER GENEROR 50Ω 125Ω BLNCED INERCONNECING CBLE ' LOD CBLE ERMINION 125Ω 50Ω RECEIVER 50Ω B B' 50Ω C C' 2845 F16 C C' 2845 F18 Figure 16. ypical V.28 Interface Figure 18. ypical V.35 Interface ' R8 6k S3 R6 LC2845 RECEIVER ' 51.5Ω S1 S2 124Ω R8 6k S3 R6 LC2846 RECEIVER B' R7 B' 51.5Ω R7 C' GND 2845 F17 C' GND 2845 F19 Figure 17. V.28 Receiver Configuration Figure 19. V.35 Receiver Configuration 13

14 LC2845 PPLICIONS INFORMION W No-Cable Mode he no-cable mode ( = = = D4ENB = 1, EN = 0) is intended for the case when the cable is disconnected from the connector. he bias circuitry, drivers and receivers are turned off, the driver outputs are forced into a high impedance state, and the supply current drops to less than 700µ. LC2846 and LC2847 Supplies he LC2846 and LC2847 use an internal capacitive charge pump to generate V DD and V EE as shown in Figure 21. voltage doubler generates about 8V on V DD and a voltage inverter generates about 7.5V for V EE. hree surface mounted tantalum or ceramic capacitors are required for C1, C2 and C3. he V EE capacitor C4 should be a minimum of 3.3µF. ll capacitors are 16V and should be placed as close as possible to the LC2846 to reduce EMI. he LC2846 has an internal boost switching regulator which generates a 5V output from the 3.3V supply as shown in Figure 22. he 5V supplies its internal charge pump and transceivers as well as its companion chip. he LC2847 requires an external 5V supply. Receiver Fail-Safe ll LC2846/LC2845 receivers feature fail-safe operation in all modes. If the receiver inputs are left floating or shorted together by a termination resistor, the receiver output will always be forced to a logic high. 5V LC2846 C3 C1 C5 10µF V.35 DRIVER 124Ω V DD C1 + C1 LC2846 OR LC2847 S2 C2 + C2 V EE GND 51.5Ω S1 51.5Ω Figure 20. V.35 Driver + B C 2845 F20 C2 C4 3.3µF 2845 F21 DE vs DCE Operation he DCE/DE pin acts as an enable for Driver 3/Receiver 1 in the LC2846, and Driver 3/Receiver 1 in the LC2845. he LC2846/LC2845 can be configured for either DE or DCE operation in one of two ways: a dedicated DE or DCE port with a connector of appropriate gender, or a port with one connector that can be configured for DE or DCE operation by rerouting the signals to the LC2846/LC2845 using a dedicated DE cable or dedicated DCE cable. dedicated DE port using a DB-25 male connector is shown in Figure 23. he interface mode is selected by logic outputs from the controller or from jumpers to either or GND on the mode select pins. dedicated DCE port using a DB-25 female connector is shown in Figure 24. port with one DB-25 connector, can be configured for either DE or DCE operation is shown in Figure 25. he configuration requires separate cables for proper signal routing in DE or DCE operation. For example, in DE mode, the XD signal is routed to Pins 2 and 14 via Driver 1 in the LC2846. In DCE mode, Driver 1 now routes the RXD signal to Pins 2 and 14. Compliance esting he LC2846/LC2845 chipset has been tested by V Rheinland of North merica Inc. and passed the NE1, NE2 and B requirements. Copies of the test report are available from LC or V Rheinland of North merica Inc. he title of the report is est Report No.B/050101/02 he address of V Rheinland of North merica Inc. is: V Rheinland of North merica Inc. 1775, Old Highway 8 NW, Suite 107 St. Paul, MN el. (651) Fax (651) V C6 10µF SHDN L1 5.6µH SW BOOS SWICHING REGLOR SHDN FB GND C1,C2: IYO YDEN X5R JMK316BJ106ML : ON SEMICONDCOR MBR0520 L1: SMID C3-5R6 13k 4.3k 5V 480m C5 10µF 2845 F22 14 Figure 21. Charge Pump Figure 22. LC2846 Boost Switching Regulator

15 LC2845 YPICL PPLICIONS 3.3V C6 10µF 5V V DD 8V C3 C1 SHDN L1 5.6µH BOOS SWICHING REGLOR CHRGE PMP MBR C2 C4 3.3µF V EE 7.5V 13k 4.3k C5 10µF 5V XD SCE LC XD (103) XD B SCE (113) SCE B XC RXC RXD DCE/DE 3.3V XC (114) XC B RXC (115) RXC B RXD (104) RXD B SG SHIELD C7 C8 RS DR V DD V EE GND C DB-25 MLE CONNECOR RS (105) RS B DR (108) DR B DCD DSR CS LL LC2845 D DCD (109) DCD B DSR (107) DSR B CS (106) CS B LL (141) RI * RI (125) M 25 M (142) RL D5 21 RL (140) DCE/DE D4ENB EN NC C10 3.3V *OPIONL 2845 F23 Figure 23. Controller-Selectable Multiprotocol DE Port with DB-25 Connector 15

16 LC2845 YPICL PPLICIONS 3.3V C6 10µF 5V V DD 8V C3 C1 SHDN L1 5.6µH BOOS SWICHING REGLOR CHRGE PMP MBR C2 C4 3.3µF V EE 7.5V 13k 4.3k C5 10µF 5V RXD RXC LC RXD (104) RXD B RXC (115)B RXC B XC SCE XD NC DCE/DE 3.3V XC (114) XC B SCE (113) SCE B XD (103) XD B SG (102) SHIELD (101) C7 C8 CS DSR V DD V EE GND C DB-25 FEMLE CONNECOR CS (106) CS B DSR (107) DSR B DCD DR RS RI LC2845 D * DCD (109) DCD B DR (108) DR B RS (105) RS B RI (125) LL 18 LL (141) RL 21 RL (140) M D5 25 M (142) NC DCE/DE D4ENB EN NC C10 3.3V *OPIONL 2845 F24 16 Figure 24. Controller-Selectable DCE Port with DB-25 Connector

17 LC2845 YPICL PPLICIONS 3.3V DE_XD/DCE_RXD DE_SCE/DCE_RXC C6 10µF 5V V DD 8V C3 C1 SHDN L1 5.6µH BOOS SWICHING REGLOR CHRGE PMP LC2846 MBR C2 C4 3.3µF V EE 7.5V 13k 4.3k C5 10µF 5V DE 2 XD 14 XD B 24 SCE 11 SCE B DCE RXD RXD B RXC RXC B DE_XC/DCE_XC DE_RXC/DCE_SCE DE_RXD/DCE_XD DCE/DE 3.3V XC XC B RXC RXC B RXD RXD B SG SHIELD XC XC B SCE SCE B XD XD B C7 C8 DE_RS/DCE_CS DE_DR/DCE_DSR V DD V EE GND C DB-25 CONNECOR RS RS B DR DR B CS CS B DSR DSR B DE_DCD/DCE_DCD DE_DSR/DCE_DR DE_CS/DCE_RS DE_LL/DCE_RI LC2845 D DCD DCD B DSR DSR B CS CS B LL DCD DCD B DR DR B RS RS B RI DE_RI/DCE_LL * RI LL DE_M/DCE_RL 25 M RL DE_RL/DCE_M D5 21 RL M DCE/DE DCE/DE D4ENB C10 3.3V EN NC *OPIONL 2845 F25 Figure 25. Controller-Selectable Multiprotocol DE/DCE Port with DB-25 Connector 17

18 LC2845 PCKGE DESCRIPION G Package 36-Lead Plastic SSOP (5.3mm) (Reference LC DWG # ) 1.25 ± * ( ) ( ) 0.42 ± BSC RECOMMENDED SOLDER PD LYO ** ( ) (.079) ( ) ( ) NOE: 1. CONROLLING DIMENSION: MILLIMEERS MILLIMEERS 2. DIMENSIONS RE IN (INCHES) 3. DRWING NO O SCLE * DIMENSIONS DO NO INCLDE MOLD FLSH. MOLD FLSH SHLL NO EXCEED.152mm (.006") PER SIDE ** DIMENSIONS DO NO INCLDE INERLED FLSH. INERLED FLSH SHLL NO EXCEED.254mm (.010") PER SIDE 0.65 (.0256) BSC ( ) 0.05 (.002) G36 SSOP

19 LC2845 PCKGE DESCRIPIO HF Package 38-Lead Plastic QFN (5mm 7mm) (Reference LC DWG # ) 0.70 ± ± 0.05 (2 SIDES) 4.10 ± 0.05 (2 SIDES) 3.20 ± 0.05 (2 SIDES) PCKGE OLINE 0.25 ± BSC 5.20 ± 0.05 (2 SIDES) 6.10 ± 0.05 (2 SIDES) 7.50 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PD LYO 5.00 ± 0.10 (2 SIDES) 0.75 ± ± 0.10 (2 SIDES) PIN 1 OP MRK (SEE NOE 6) ± 0.10 (2 SIDES) 5.15 ± 0.10 (2 SIDES) 0.40 ± ± REF REF 0.25 ± BSC R = YP BOOM VIEW EXPOSED PD (H) QFN 0303 NOE: 1. DRWING CONFORMS O JEDEC PCKGE OLINE -220 VRIION WHKD 2. DRWING NO O SCLE 3. LL DIMENSIONS RE IN MILLIMEERS 4. DIMENSIONS OF EXPOSED PD ON BOOM OF PCKGE DO NO INCLDE MOLD FLSH. MOLD FLSH, IF PRESEN, SHLL NO EXCEED 0.20mm ON NY SIDE 5. EXPOSED PD SHLL BE SOLDER PLED 6. SHDED RE IS ONLY REFERENCE FOR PIN 1 LOCION ON HE OP ND BOOM OF PCKGE Information furnished by Linear echnology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear echnology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19

20 LC2845 YPICL PPLICIO DE or DCE Multiprotocol Serial Interface with DB-25 Connector RL M RI LL CS DSR DCD DR RS RXD RXC XC SCE XD LC2845 LC2846 D5 D * RL (140) M (142) RI (125) LL (141) CS B CS (106) DSR B DSR (109) DCD B DCD (107) DR B DR (108) RS B RS (105) SHIELD (101) SG (102) RXD B RXD (104) RXC B RXC (115) XC B XC (114) SCE B SCE (113) XD B XD (103) *OPIONL DB-25 CONNECOR RELED PRS PR NMBER DESCRIPION COMMENS LC1321 Dual RS232/RS485 ransceiver wo RS232 Driver/Receiver Pairs or wo RS485 Driver/Receiver Pairs LC1334 Single 5V RS232/RS485 Multiprotocol ransceiver wo RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs LC1343 Software-Selectable Multiprotocol ransceiver 4-Driver/4-Receiver for Data and Clock Signals LC1344 Software-Selectable Cable erminator Perfect for erminating the LC1543 (Not Needed with LC1546) LC1345 Single Supply V.35 ransceiver 3-Driver/3-Receiver for Data and Clock Signals LC1346 Dual Supply V.35 ransceiver 3-Driver/3-Receiver for Data and Clock Signals LC1543 Software-Selectable Multiprotocol ransceiver erminated with LC1344 for Data and Clock Signals, Companion to LC1544 or LC1545 for Control Signals LC1544 Software-Selectable Multiprotocol ransceiver Companion to LC1546 or LC1543 for Control Signals Including LL LC1545 Software-Selectable Multiprotocol ransceiver 5-Driver/5-Receiver Companion to LC1546 or LC1543 for Control Signals Including LL, M and RL LC1546 Software-Selectable Multiprotocol ransceiver 3-Driver/3-Receiver with ermination for Data and Clock Signals LC V Software-Selectable Multiprotocol ransceiver 3.3V Supply, 4-Driver/4-Receiver Companion to LC2846 for Control Signals Including LL LC V Software-Selectable Multiprotocol ransceiver 3.3V Supply, 3-Driver/3-Receiver with ermination for Data and Clock Signals, Generates the Required 5V and ±8V Supplies for LC2846 and Companion Parts LC2847 Software-Selectable Multiprotocol ransceiver 3-Driver/3-Receiver with ermination for Data and Clock Signals. with 3.3V Digital Interface Seperate Supply for Digital Interface Works Down to 3.3V 20 Linear echnology Corporation 1630 McCarthy Blvd., Milpitas, C (408) FX: (408) L/P K PRINED IN S LINER ECHNOLOGY CORPORION 2002