DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO. LTC2847 Software-Selectable Multiprotocol Transceiver with Termination and 3.3V Digital Interface FEATURES

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1 FERES Software-Selectable ransceiver Supports: RS232, RS449, EI530, EI530-, V.35, V.36, X.21 Operates from Single 5V Supply Separate Supply Pin for Digital Interface Works down to 3V On-Chip Cable ermination Complete DE or DCE Port with LC2845 vailable in 38-Pin 5mm 7mm QFN Package PPLICIO S Data Networking CS and DS Data Routers DESCRIPIO, LC and L are registered trademarks of Linear echnology Corporation. LC2847 Software-Selectable Multiprotocol ransceiver with ermination and 3.3V Digital Interface he LC 2847 is a 3-driver/3-receiver multiprotocol transceiver with on-chip cable termination. When combined with the LC2845, this chip set forms a complete softwareselectable DE or DCE interface port that supports the RS232, RS449, EI530, EI530-, V.35, V.36 and X.21 protocols. ll necessary cable termination is provided inside the LC2847. he V CC supplies the drivers, the receivers and an internal charge pump that requires only five space-saving surface mounted capacitors. he V IN supply drives the digital interface circuitry including the receiver output drivers. It can be tied to V CC or be powered off a lower supply (down to 3V) to interface with low voltage SICs. he LC2847 is available in a 0.8mm tall, 5mm 7mm QFN package. YPICL PPLICIO Complete DE or DCE Multiprotocol Serial Interface with DB-25 Connector RL M LL RI CS DSR DCD DR RS RXD RXC XC SCE XD LC2845 LC2847 D5 R5 D4 R * XD (103) XD B SCE (113) SCE B XC (114) XC B RXC (115) RXC B RXD (104) RXD B SG (102) SHIELD (101) RS (105) RS B DR (108) DR B DCD (109) DCD B DSR (107) DSR B CS (106) CS B RI (125) LL (141) M (142) RL (140) DB-25 CONNECOR *OPIONL

2 LC2847 BSOLE XI RI GS W W W (Note 1) V CC Voltage V to 6.5V V IN Voltage V to 6.5V Input Voltage ransmitters V to (V CC + 0.3V) Receivers... 18V to 18V Logic Pins V to (V CC + 0.3V) Output Voltage ransmitters... (V EE 0.3V) to (V DD + 0.3V) Receivers V to (V IN + 0.3V) V EE... 10V to 0.3V V DD V to 10V Short-Circuit Duration ransmitter Output... Indefinite Receiver Output... Indefinite V EE sec Operating emperature Range LC2847C... 0 C to 70 C LC2847I C to 85 C Storage emperature Range C to 150 C Lead emperature (Soldering, 10 sec) C W PCKGE/ORDER I FOR IO V DD V CC C1 + C1 OP VIEW VEE C C2 VEE V EE VIN DCE/DE B 31 GND 30 GND B B 25 / 24 / B B HF PCKGE 38-LED (7mm 5mm) PLSIC QFN NDERSIDE MEL INERNLLY CONNECED O V EE (PCB CONNECION OPIONL) JMX = 125 C, θ J = 34 C/W ORDER PR NMBER LC2847CHF LC2847IHF HF PR MRKING I Consult LC Marketing for parts specified with wider operating temperature ranges. ELECRICL CHRCERISICS he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. V CC = 5V, V IN = 3.3V, unless otherwise noted (Notes 2, 3) SYMBOL PRMEER CONDIIONS MIN YP MX NIS Supplies I CC V CC Supply Current (DCE Mode, RS530, RS530-, X.21 Modes, No Load 14 m ll Digital Pins = GND or V IN ) RS530, RS530-, X.21 Modes, Full Load m V.35 Mode m V.28 Mode, No Load 20 m V.28 Mode, Full Load m No-Cable Mode µ I VIN V IN Supply Current ll Modes Except No-Cable Mode 405 µ (DCE Mode, ll Digital Pins = GND or V IN ) P D Internal Power Dissipation (DCE Mode) RS530, RS530-, X.21 Modes, Full Load 410 mw V.35 Mode, Full Load 625 mw V.28 Mode, Full Load 150 mw V + Positive Charge Pump Output Voltage V.11 or V.28 Mode, No Load V V.35 Mode V V.28 Mode, with Load V V.28 Mode, with Load, I DD = 10m 6.5 V 2

3 ELECRICL CHRCERISICS he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. V CC = 5V, V IN = 3.3V, unless otherwise noted (Notes 2, 3) LC2847 SYMBOL PRMEER CONDIIONS MIN YP MX NIS V Negative Charge Pump Output Voltage V.28 Mode, No Load 9.6 V V.28 Mode, Full Load V V.35 Mode V RS530, RS530-, X.21 Modes, Full Load V f OSC Charge Pump Oscillator Frequency 500 khz t r Charge Pump Rise ime No-Cable Mode/Power-Off to Normal Operation 2 ms Logic Inputs and Outputs V IH Logic Input High Voltage,,,,,, DCE/DE 2.0 V V IL Logic Input Low Voltage,,,,,, DCE/DE 0.8 V I IN Logic Input Current,, ±10 µ,,, DCE/DE = GND µ,,, DCE/DE = V IN ±10 µ V OH Output High Voltage I O = 3m V V OL Output Low Voltage I O = 1.6m V I OSR Output Short-Circuit Current 0V V O V IN ±50 m I OZR hree-state Output Current = = = V IN, V O = GND µ = = = V IN, V O = V IN ±10 µ V.11 Driver V ODO Open Circuit Differential Output Voltage R L = 1.95k (Figure 1) ± 5 V V ODL Loaded Differential Output Voltage R L = (Figure 1) 0.5V ODO 0.67V ODO V R L = (Figure 1) ±2 V V OD Change in Magnitude of Differential R L = (Figure 1) 0.2 V Output Voltage V OC Common Mode Output Voltage R L = (Figure 1) 3 V V OC Change in Magnitude of Common Mode R L = (Figure 1) 0.2 V Output Voltage I SS Short-Circuit Current V O = GND ±150 m I OZ Output Leakage Current V and V B 0.25V, Power Off or ± 1 ±100 µ No-Cable Mode or Driver Disabled t r, t f Rise or Fall ime (Figures 2, 13) ns t PLH Input to Output Rising (Figures 2, 13) ns t PHL Input to Output Falling (Figures 2, 13) ns t Input to Output Difference, t PLH t PHL (Figures 2, 13) ns t SKEW Output to Output Skew (Figures 2, 13) 3 ns 3

4 LC2847 ELECRICL CHRCERISICS he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. V CC = 5V, V IN = 3.3V, unless otherwise noted (Notes 2, 3) SYMBOL PRMEER CONDIIONS MIN YP MX NIS V.11 Receiver V H Input hreshold Voltage 7V V CM 7V V V H Input Hysteresis 7V V CM 7V mv R IN Input Impedance 7V V CM 7V (Figure 3) Ω t r, t f Rise or Fall ime C L = 50pF (Figures 4, 14) 15 ns t PLH Input to Output Rising C L = 50pF (Figures 4, 14) ns t PHL Input to Output Falling C L = 50pF (Figures 4, 14) ns t Input to Output Difference, t PLH t PHL C L = 50pF (Figures 4, 14) ns V.35 Driver V OD Differential Output Voltage Open Circuit, R L = 1.95k (Figure 5) ±1.2 V With Load, 4V V CM 4V (Figure 6) ±0.44 ±0.55 ±0.66 V V O, V OB Single-Ended Output Voltage Open Circuit, R L = 1.95k (Figure 5) ±1.2 V V OC ransmitter Output Offset R L = (Figure 5) ±0.6 V I OH ransmitter Output High Current V, V B = 0V m I OL ransmitter Output Low Current V, V B = 0V m I OZ ransmitter Output Leakage Current V and V B 0.25V ±1 ±100 µ R OD ransmitter Differential Mode Impedance Ω R OC ransmitter Common Mode Impedance 2V V CM 2V (Figure 7) Ω t r, t f Rise or Fall ime (Figures 8, 13) 5 ns t PLH Input to Output (Figures 8, 13) ns t PHL Input to Output (Figures 8, 13) ns t Input to Output Difference, t PLH t PHL (Figures 8, 13) 0 16 ns t SKEW Output to Output Skew (Figures 8, 13) 4 ns V.35 Receiver V H Differential Receiver Input hreshold Voltage 2V V CM 2V (Figure 9) V V H Receiver Input Hysteresis 2V V CM 2V (Figure 9) mv R ID Receiver Differential Mode Impedance 2V V CM 2V Ω R IC Receiver Common Mode Impedance 2V V CM 2V (Figure 10) Ω t r, t f Rise or Fall ime C L = 50pF (Figures 4, 14) 15 ns t PLH Input to Output C L = 50pF (Figures 4, 14) ns t PHL Input to Output C L = 50pF (Figures 4, 14) ns t Input to Output Difference, t PLH t PHL C L = 50pF (Figures 4, 14) ns V.28 Driver V O Output Voltage Open Circuit ±10 V R L = 3k (Figure 11) ±5 ±8.5 V I SS Short-Circuit Current V O = GND ±150 m R OZ Power-Off Resistance 2V < V O < 2V, Power Off 300 Ω or No-Cable Mode SR Slew Rate R L = 7k, C L = 0 (Figures 11, 15) 4 30 V/µs t PLH Input to Output R L = 3k, C L = 2500pF (Figures 11, 15) µs t PHL Input to Output R L = 3k, C L = 2500pF (Figures 11, 15) µs 4

5 ELECRICL CHRCERISICS he denotes specifications which apply over the full operating temperature range, otherwise specifications are at = 25 C. V CC = 5V, V IN = 3.3V, unless otherwise noted (Notes 2, 3) LC2847 SYMBOL PRMEER CONDIIONS MIN YP MX NIS V.28 Receiver V HL Input Low hreshold Voltage (Figure 12) 0.8 V V LH Input High hreshold Voltage (Figure 12) 2 V V H Receiver Input Hysteresis (Figure 12) V R IN Receiver Input Impedance 15V V 15V kω t r, t f Rise or Fall ime C L = 50pF (Figures 12, 16) 15 ns t PLH Input to Output C L = 50pF (Figures 12, 16) ns t PHL Input to Output C L = 50pF (Figures 12, 16) ns Note 1: bsolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: ll currents into device pins are positive; all currents out of device are negative. ll voltages are referenced to device ground unless otherwise specified. Note 3: ll typicals are given for V CC = 5V, V IN = 3.3V, C VCC = C VIN = 10µF, C VDD =, C VEE = 3.3µF and = 25 C. YPICL PERFOR CE CHRCERISICS W I CC (m) V.11 Mode I CC vs Data Rate 170 = 25 C I CC (m) V.35 Mode I CC vs Data Rate V.28 Mode I CC vs Data Rate 150 = 25 C I CC (m) 60 = 25 C D RE (kbd) D RE (kbd) D RE (kbd) 2846 G G G06 I CC (m) V.11 Mode I CC vs emperature V.35 Mode I CC vs emperature V.28 Mode I CC vs emperature EMPERRE ( C) I CC (m) EMPERRE ( C) I CC (m) EMPERRE ( C) G G G09 5

6 LC2847 PI F CIO S (Pins 1,3,18,19,22,23): No Connect. V DD (Pin 2): Generated Positive Supply Voltage for V.28. Connect a capacitor to ground. V CC (Pin 4): Input Supply Pin. Input supply to charge pump and transceiver. 4.75V V CC 5.25V. Connect a capacitor to GND. (Pin 5): L Level Driver 1 Input. (Pin 6): L Level Driver 2 Input. (Pin 7): L Level Driver 3 Input. (Pin 8): CMOS Level Receiver 1 Output with Pull-p to V IN when hree-stated. (Pin 9): CMOS Level Receiver 2 Output with Pull-p to V IN when hree-stated. (Pin 10): CMOS Level Receiver 3 Output with Pull-p to V IN when hree-stated. (Pin 11): L Level Mode Select Input 0 with Pull-p to V IN. See able 1. (Pin 12): L Level Mode Select Input 1 with Pull-p to V IN. See able 1. V IN (Pin 13): Input Supply Pin. Input supply to digital interface including receiver output drivers. 3V V IN 5.25V. Connect to V CC (Pin 4) or to separate supply for lower receiver output swing. Connect a capacitor to GND. (Pin 14): L Level Mode Select Input 2 with Pull-p to V IN. See able 1. DCE/DE (Pin 15): L Level Mode Select Input with Pull-p to V IN. See able 1. B (Pin 16): Receiver 3 Noninverting Input. (Pin 17): Receiver 3 Inverting Input. B (Pin 20): Receiver 2 Noninverting Input. (Pin 21): Receiver 2 Inverting Input. / B (Pin 24): Receiver 1 Noninverting Input and Driver 3 Noninverting Output. / (Pin 25): Receiver 1 Inverting Input and Driver 3 Inverting Output. B (Pin 26): Driver 2 Noninverting Output. (Pin 27): Driver 2 Inverting Output. B (Pin 28): Driver 1 Noninverting Output. (Pin 29): Driver 1 Inverting Output. GND (Pins 30,31): ransceiver Ground. V EE (Pins 32,33,36): Generated Negative Supply Voltage. Connect a 3.3µF capacitor to GND. Exposed pad can also be connected to V EE. C2 (Pin 34): Capacitor C2 Negative erminal. Connect a capacitor between C2 + and C2. C2 + (Pin 35): Capacitor C2 Positive erminal. Connect a capacitor between C2 + and C2. C1 (Pin 37): Capacitor C1 Negative erminal. Connect a capacitor between C1 + and C1. C1 + (Pin 38): Capacitor C1 Positive erminal. Connect a capacitor between C1 + and C1. 6

7 LC2847 BLOCK DIGR W CHRGE PMP C1 C C1 C1 + C2 + C C2 + C2 V DD 2 V DD V EE V EE V CC GND V CC GND 29 5 S1 S2 28 B 27 6 S1 S2 26 B 7 6k 25 / DCE/DE 15 S3 S2 S / B 6k 21 9 S3 S2 6k 20 B S3 S2 V IN MODE SELECION LOGIC 16 B 2847 BD 7

8 LC2847 ES CIRCIS D B V OD R L R L V OC D B R L 100Ω C L 100pF C L 100pF 2847 F F02 Figure 1. V.11 Driver DC est Circuit Figure 2. V.11 Driver C est Circuit I B B I R B R V CM = ±7V + 2(V B V ) R IN = I B I 2847 F03 C L 2847 F04 Figure 3. Input Impedance est Circuit Figure 4. V.11, V.35 Receiver C est Circuit V OB V OB V OD R L R L V OC V CM + V CM = ±2V 2847 F F F07 V O V O Figure 5. V.35 Driver Open-Circuit est Figure 6. V.35 Driver est Circuit Figure 7. V.35 Driver Common Mode Impedance est Circuit V H + V CM = ±2V F08 V CM F F09 Figure 8. V.35 Driver C est Circuit Figure 9. V.35 Receiver DC est Circuit Figure 10. Receiver Common Mode Impedance est Circuit D R C L R L V C L 2847 F F12 Figure 11. V.28 Driver est Circuit Figure 12. V.28 Receiver est Circuit 8

9 LC2847 W ODE SELECIO able 1 Mode Name DCE/,2, V DD V EE DE (Note 2) (Note 2) (Note 2) (Note 3) (Note 3) (Note 4) (Note 5) B B B B B B (Note 1) (Note 1) Not sed (Default V.11) L X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V 6V RS L X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V 6V RS L X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V 6V X L X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V 6V V L X V.35 V.35 V.35 V.35 Z Z V.35 V.35 V.35 V.35 V.35 V.35 CMOS CMOS 8V 6.5V RS449/V L X V.11 V.11 V.11 V.11 Z Z V.11 V.11 V.11 V.11 V.11 V.11 CMOS CMOS 9.3V 6V V.28/RS L X V.28 Z V.28 Z Z Z V.28 30k V.28 30k V.28 30k CMOS CMOS 8.7V 8.5V No Cable X X Z Z Z Z Z Z 30k 30k 30k 30k 30k 30k Z Z 4.7V 0.3V Not sed (Default V.11) L L V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V 6V RS L L V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V 6V RS L L V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V 6V X L L V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V 6V V L L V.35 V.35 V.35 V.35 V.35 V.35 30k 30k V.35 V.35 V.35 V.35 Z CMOS 8V 6.5V RS449/V L L V.11 V.11 V.11 V.11 V.11 V.11 30k 30k V.11 V.11 V.11 V.11 Z CMOS 9.3V 6V V.28/RS L L V.28 Z V.28 Z V.28 Z 30k 30k V.28 30k V.28 30k Z CMOS 8.7V 8.5V No Cable X X Z Z Z Z Z Z 30k 30k 30k 30k 30k 30k Z Z 4.7V 0.3V Note 1: Driver inputs are L level compatible. Note 2: nused receiver inputs are terminated with 30k to ground. In addition, and are always terminated by a 103Ω differential impedence (see Block Diagram on page 7). Note 3: Receiver Outputs are CMOS level compatible and have a weak pull up to V IN when Z. Note 4: V DD values shown are typical values for V CC = 5V, V IN = 3.3V and = 25 C with LC2847 under full load for each mode. Note 5: V EE values shown are typical values for V CC = 5V, V IN = 3.3V and = 25 C with LC2847 under full load for each mode. W W SWICHI G I E WVEFOR S 3V D 0V 1.5V f = 1MHz : t r 10ns : t f 10ns 1.5V t PLH t PHL V O B V O 50% t r 90% 10% 1/2 V O 90% t f 50% 10% B V O t SKEW t SKEW 2847 F13 Figure 13. V.11, V.35 Driver Propagation Delays V O B 0V V O t PLH f = 1MHz : t r 10ns : t f 10ns INP 0V t PHL V OH R V OL 1.65V OP 1.65V 2847 F14 Figure 14. V.11, V.35 Receiver Propagation Delays 9

10 LC2847 W W SWICHI G I E WVEFOR S 3V D 0V V O V O 1.5V t PHL 3V t f 0V SR = 6V t 3V f 1.5V t PLH 0V 3V t r 3V SR = 6V t r 2847 F15 Figure 15. V.28 Driver Propagation Delays V IH 1.5V V IL t PHL V OH R 1.65V 1.5V t PLH 1.65V 2847 F16 V OL Figure 16. V.28 Receiver Propagation Delays PPLICIO S I FOR IO Overview 10 W he LC2847 consists of a charge pump and a 3-driver/ 3-receiver transceiver. he 5V V CC input powers the charge pump and transceiver. he charge pump generates the V DD and V EE supplies. he LC2847 s V DD and V EE supplies can be used to power a companion chip like the LC2845. he V IN input powers the digital interface including the receiver output drivers. Having a separate pin to power the digital interface allows the flexibility of controlling the receiver output swing to interface with 5V or 3.3V logic. he LC2847 and LC2845 form a complete softwareselectable DE or DCE interface port that supports the RS232, RS449, EI530, EI530-, V.35, V.36 and X.21 protocols. Cable termination is provided on-chip, eliminating the need for discrete termination designs. complete DCE-to-DE interface operating in EI530 mode is shown in Figure 17. he LC2847 half of each port is used to generate and appropriately terminate the clock and data signals. he LC2845 is used to generate the control signals along with LL (local loopback), RL (Remote Loop-Back), M (est Mode) and RI (Ring Indicate). Mode Selection he interface protocol is selected using the mode select pins, and (see able 1). For example, if the port is configured as a V.35 interface, the mode selection pins should be = 1, = 0, = 0. For the control signals, the drivers and receivers will operate in V.28 (RS232) electrical mode. For the clock and data signals, the drivers and receivers will operate in V.35 electrical mode. he DCE/DE pin will configure the port for DCE mode when high, and DE when low. he interface protocol may be selected simply by plugging the appropriate interface cable into the connector. he mode pins are routed to the connector and are left unconnected (1) or wired to ground (0) in the cable as shown in Figure 18. he internal pull-up current sources will ensure a binary 1 when a pin is left unconnected. he mode selection may also be accomplished by using jumpers to connect the mode pins to ground or V IN.

11 LC2847 PPLICIO S I FOR IO SERIL CONROLLER XD W DE LC2847 XD DCE LC Ω SERIL CONROLLER XD SCE SCE 103Ω SCE XC 103Ω XC XC RXC 103Ω RXC RXC RXD 103Ω RXD RXD LC2845 LC2845 RS RS RS DR DR DR DCD DCD DCD DSR DSR DSR CS CS CS LL D4 LL R4 LL M R4 M D4 M RI R5 RI D5 RI RL D5 RL R5 RL Figure 17. Complete Multiprotocol Interface in EI530 Mode 2847 F17 When the cable is removed, leaving all mode pins unconnected, the LC2847/LC2845 will enter no-cable mode. In this mode the LC2847/LC2845 supply current drops to less than 1000µ and the LC2847/LC2845 driver outputs are forced into a high impedance state. t the same time, the and receivers of the LC2847 are differentially terminated with 103Ω and the other receivers on the LC2847 and LC2845 are terminated with 30kΩ to ground. Cable ermination raditional implementations used expensive relays to switch resistors or required the user to change termination modules every time a new interface standard was 11

12 LC2847 PPLICIO S I FOR IO W (D) CONNECOR LC2847 DCE/DE DCE/DE CBLE LC2845 (D) 2847 F18 Figure 18. Single Port DCE V.35 Mode Selection in the Cable selected. Switching the terminations with FEs is difficult because the FEs must remain off when the signal voltage is beyond the supply voltage. lternatively, custom cables may contain termination in the cable head or route signals to various terminations on the board. GENEROR BLED INERCONNECING CBLE CBLE ERMINION ' LOD RECEIVER he LC2847/LC2845 chip set solves the cable termination switching problem by automatically providing the appropriate termination and switching on-chip for the V.10 (RS423), V.11 (RS422), V.28 (RS232) and V.35 electrical protocols. C Figure 19. ypical V.10 Interface C' 2847 F19 V.10 (RS423) Interface ll V.10 drivers and receivers necessary for the RS449, EI530, EI530-, V.36 and X.21 protocols are implemented on the LC2845. typical V.10 unbalanced interface is shown in Figure 19. V.10 single-ended generator with output and ground C is connected to a differential receiver with input ' connected to, and ground C' connected via the signal return to ground C. sually, no cable termination is required for V.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in Figure 20. he V.10 receiver configuration in the LC2845 is shown in Figure 21. In V.10 mode, switch S3 inside the LC2845 is turned off. he noninverting input is disconnected inside the LC2845 receivers and connected to ground m 10V I Z 3V 3V Figure 20. V.10 Receiver Input Impedance 3.25m V Z 10V 2847 F20

13 LC2847 PPLICIO S I FOR IO W ' R8 6k S3 R5 R6 LC2845 RECEIVER ' S1 S2 124Ω R8 6k S3 R5 R6 LC2847 RECEIVER B' B R4 R7 B' R4 R7 C' GND 2847 F21 C' GND 2847 F23 GENEROR Figure 21. V.10 Receiver Configuration B C BLED INERCONNECING CBLE CBLE ERMINION Figure 22. ypical V.11 Interface he cable termination is then the 30k input impedance to ground of the LC2845 V.10 receiver. V.11 (RS422) Interface typical V.11 balanced interface is shown in Figure 22. V.11 differential generator with outputs and B and ground C is connected to a differential receiver with input ' connected to, input B' connected to B, and ground C' connected via the signal return to ground C. he V.11 interface has a differential termination at the receiver end that has a minimum value of 100Ω. he termination resistor is optional in the V.11 specification, but for the high speed clock and data lines, the termination is essential to prevent reflections from corrupting the data. he receiver inputs must also be compliant with the impedance curve shown in Figure 20. In V.11 mode, all switches are off except S1 of the LC2847 s receivers which connects a 103Ω differential 1 ctually, there is no switch S1 in receivers and. However, for simplicity, all termination networks on the LC2847 can be treated identically if it is assumed that an S1 switch exists and is always closed on the and receivers. ' B' C' 100Ω MIN LOD RECEIVER 2847 F22 Figure 23. V.11 Receiver Configuration termination impedance to the cable as shown in Figure he LC2845 only handles control signals, so no termination other than its V.11 receivers 30k input impedance is necessary. V.28 (RS232) Interface typical V.28 unbalanced interface is shown in Figure 24. V.28 single-ended generator with output and ground C is connected to a single-ended receiver with input ' connected to and ground C' connected via the signal return to ground C. GENEROR ' B' C' C Figure 24. ypical V.28 Interface S1 S2 BLED INERCONNECING CBLE 124Ω R8 6k S3 GND R5 R4 CBLE ERMINION Figure 25. V.28 Receiver Configuration ' C' R6 R7 LOD LC2847 RECEIVER RECEIVER 2847 F F24 13

14 LC2847 PPLICIO S I FOR IO 14 W In V.28 mode, S3 is closed inside the LC2847/LC2845 which connects a 6k (R8) impedance to ground in parallel with (R5) plus (R6) for a combined impedance of 5k as shown in Figure 25. Proper termination is only provided when the B input of the receivers is floating, since S1 of the LC2847 s and receivers remains on in V.28 mode 1. he noninverting input is disconnected inside the LC2847/LC2845 receiver and connected to a L level reference voltage to give a 1.4V receiver trip point. V.35 Interface typical V.35 balanced interface is shown in Figure 26. V.35 differential generator with outputs and B and ground C is connected to a differential receiver with input ' connected to, input B' connected to B, and ground C' connected via the signal return to ground C. he V.35 interface requires a or delta network termination at the receiver end and the generator end. he receiver differential impedance measured at the connector must be 100Ω ±10Ω, and the impedance between shorted terminals (' and B') and ground (C') must be 1 ±15Ω. GENEROR ' B' C' B C BLED INERCONNECING CBLE Figure 26. ypical V.35 Interface S1 S2 124Ω R8 6k S3 GND R5 R4 Figure 27. V.35 Receiver Configuration ' B' C' LOD CBLE ERMINION R6 R7 LC2847 RECEIVER 2847 F27 RECEIVER 2847 F26 In V.35 mode, both switches S1 and S2 inside the LC2847 are on, connecting a network impedance as shown in Figure 27. he 30k input impedance of the receiver is placed in parallel with the network termination, but does not affect the overall input impedance significantly. he generator differential impedance must be to 1 and the impedance between shorted terminals ( and B) and ground (C) must be 1 ±15Ω. No-Cable Mode he no-cable mode ( = = = 1) is intended for the case when the cable is disconnected from the connector. he charge pump, bias circuitry, drivers and receivers are turned off, the driver outputs are forced into a high impedance state, and the V CC supply current to the transceiver drops to less than 300µ while its V IN supply current drops to less than 10µ. Note that the LC2847 s and receivers continue to be terminated by a 103Ω differential impedance. Charge Pump he LC2847 uses an internal capacitive charge pump to generate V DD and V EE as shown in Figure 28. voltage doubler generates about 8V on V DD and a voltage inverter generates about 7.5V on V EE. Four surface mounted tantalum or ceramic capacitors are required for C1, C2, C3 and C5. he V EE capacitor C4 should be a minimum of 3.3µF. ll capacitors are 16V and should be placed as close as possible to the LC2847 to reduce EMI. Receiver Fail-Safe ll LC2847/LC2845 receivers feature fail-safe operation in all modes. If the receiver inputs are left floating or are shorted together by a termination resistor, the receiver output will always be forced to a logic high. 5V C3 C1 C5 V DD C1 + C1 V CC LC2847 C2 + C2 V EE GND Figure 28. Charge Pump + C2 C4 3.3µF 2847 F28

15 LC2847 YPICL PPLICIO S DE vs DCE Operation he DCE/DE pin acts as an enable for Driver 3/Receiver 1 in the LC2847, and Driver 3/Receiver 1 in the LC2845. he LC2847/LC2845 can be configured for either DE or DCE operation in one of two ways: a dedicated DE or DCE port with a connector of appropriate gender or a port with one connector that can be configured for DE or DCE operation by rerouting the signals to the LC2847/LC2845 using a dedicated DE cable or dedicated DCE cable. dedicated DE port using a DB-25 male connector is shown in Figure 29. he interface mode is selected by logic outputs from the controller or from jumpers to either V IN or GND on the mode select pins. dedicated DCE port using a DB-25 female connector is shown in Figure 30. port with one DB-25 connector, that can be configured for either DE or DCE operation is shown in Figure 31. he configuration requires separate cables for proper signal routing in DE or DCE operation. For example, in DE mode, the XD signal is routed to Pins 2 and 14 via the LC2847 s Driver 1. In DCE mode, Driver 1 now routes the RXD signal to Pins 2 and 14. Power Dissipation Calculations he LC2847 takes in 5V V CC. V DD and V EE are in turn produced from V CC with an internal charge pump at approximately 80% and 70% efficiency respectively. Current drawn internally from V DD or V EE translates directly into a higher I CC. he LC2847 dissipates power according to the equation: P DISS(2847) = V CC I CC N D P R + N R P R (1) P R refers to the power dissipated by each driver in a receiver termination on the far end of the cable while N D is the number of drivers. Conversely, current from the far end drivers dissipate power N R P R in the internal receiver termination where N R is the number of receivers. LC2847 Power Dissipation Consider an LC2847 in X.21, DCE mode (three V.11 drivers and two V.11 receivers). From the Electrical Characteristics able, I CC at no load = 14m, I CC at full load = 100m. Each receiver termination is 100Ω (R R ) and current going into each receiver termination = (100m 14m)/3 = 28.7m (I R ). P R = (I R ) 2 R R (2) From Equation (2), P R = 82.4mW and from Equation (1), DC power dissipation P DISS(2847) = 5V 100m mW mW = 418mW. Consider the above example running at a baud rate of 10MBd. From the ypical Characteristic for V.11 Mode I CC vs Data Rate, the I CC at 10MBd is 160m. I CC increases with baud rate due to driver transient dissipation. From Equation (1), C power dissipation P DISS(2847) = 5V 160m mW mW = 718mW. LC2845 Power Dissipation If a LC2845 is used to form a complete DCE port with the LC2847, it will be running in the X.21 mode (three V.11 drivers and two V.10 drivers, two V.11 receivers and two V.10 receivers, all with internal 30k termination). In addition to V CC, it uses the V DD and V EE outputs from the LC2847. Negligible power is dissipated in the large internal receiver termination of the LC2845 so the N R P R term of Equation (1) can be omitted. hus Equation (1) is modified as follows: P DISS(2845) = (V CC I CC ) + (V DD I DD ) + (V EE I EE ) N D P R (3) Since power is drawn from the supplies of the LC2847 (V DD and V EE ) at less than 100% efficiency, the LC2847 dissipates extra power to source P DISS(2845) and P R : P DISS1(2847) = 125% (V DD I DD ) + 143% (4) (V EE I EE ) P DISS(2845) N D P R = 25% (V DD I DD ) + 43% (V EE I EE ) From the LC2845 Electrical Characteristics able, for V CC = 5V, V DD = 8V and V EE = 5.5V: I CC at no load I CC at full load with all drivers high I EE at no load I EE at full load with both V.10 drivers low I DD at no load I DD at full load 2.7m 110m 2m 23m 0.3m 0.3m 15

16 LC2847 YPICL PPLICIO S V CC 5V XD SCE C3 C5 C1 CHRGE PMP LC C2 C4 3.3µF XD (103) XD B SCE (113) SCE B XC RXC RXD C7 C8 RS DR DCE/DE V CC V DD V EE GND V IN 3.3V C6 C XC (114) XC B RXC (115) RXC B RXD (104) RXD B SG SHIELD DB-25 MLE CONNECOR RS (105) RS B DR (108) DR B DCD DSR CS LC DCD (109) DCD B DSR (107) DSR B CS (106) CS B LL R4 18 LL (141) RI D4 * RI (125) M R5 25 M (142) RL D5 DCE/DE V IN D4ENB R4EN V IN 3.3V C10 *OPIONL 21 RL (140) 2847 F29 16 Figure 29. Controller-Selectable Multiprotocol DE Port with DB-25 Connector

17 LC2847 YPICL PPLICIO S V CC 5V RXD RXC C3 C5 C1 CHRGE PMP LC C2 C4 3.3µF RXD (104) RXD B RXC (115) RXC B XC SCE XD C7 C8 CS DSR DCE/DE V CC V DD V EE GND V IN 3.3V C6 C XC (114) XC B SCE (113) SCE B XD (103) XD B SGND (102) SHIELD (101) DB-25 FEMLE CONNECOR CS (106) CS B DSR (107) DSR B DCD DR RS LC DCD (109) DCD B DR (108) DR B RS (105) RS B RI R4 * RI (125) LL D4 18 LL (141) RL R5 21 RL (140) M D5 DCE/DE V IN D4ENB R4EN C10 V IN 3.3V 25 *OPIONL M 9142) 2847 F30 Figure 30. Controller-Selectable DCE Port with DB-25 Connector 17

18 LC2847 YPICL PPLICIO S V CC 5V DE_XD/DCE_RXD DE_SCE/DCE_RXC C3 C5 C1 CHRGE PMP LC C2 C4 3.3µF DE XD XD B SCE SCE B DCE RXD RXD B RXC RXC B DE_XC/DCE_XC DE_RXC/DCE_SCE DE_RXD/DCE_XD C7 C8 DE_RS/DCE_CS DE_DR/DCE_DSR DCE/DE V CC V DD V EE GND V IN 3.3V C6 C XC XC B RXC RXC B RXD RXD B SG SHIELD DB-25 CONNECOR RS RS B DR DR B XC XC B SCE SCE B XD XD B CS CS B DSR DSR B DE_DCD/DCE_DCD DE_DSR/DCE_DR DE_CS/DCE_RS LC DCD DCD B DSR DSR B CS CS B DCD DCD B DR DR B RS RS B DE_LL/DCE_RI D4 18 LL LL DE_RI/DCE_LL R4 * RI RI DE_M/DCE_RL R5 25 M M DE_RL/DCE_M D5 21 RL RL DCE/DE DCE/DE V IN D4ENB R4EN 15 V IN C10 3.3V *OPIONL 2847 F31 18 Figure 31. Controller-Selectable Multiprotocol DE/DCE Port with DB-25 Connector

19 LC2847 PCKGE DESCRIPIO HF Package 38-Lead Plastic QFN (5mm 7mm) (Reference LC DWG # ) 0.70 ± ± 0.05 (2 SIDES) 4.10 ± 0.05 (2 SIDES) 3.20 ± 0.05 (2 SIDES) PCKGE OLINE 0.25 ± BSC 5.20 ± 0.05 (2 SIDES) 6.10 ± 0.05 (2 SIDES) 7.50 ± 0.05 (2 SIDES) RECOMMENDED SOLDER PD LYO 5.00 ± 0.10 (2 SIDES) 0.75 ± ± 0.10 (2 SIDES) PIN 1 OP MRK (SEE NOE 6) ± 0.10 (2 SIDES) 5.15 ± 0.10 (2 SIDES) 0.40 ± ± REF REF 0.25 ± BSC R = YP BOOM VIEW EXPOSED PD (H) QFN 0303 NOE: 1. DRWING CONFORMS O JEDEC PCKGE OLINE -220 VRIION WHKD 2. DRWING NO O SCLE 3. LL DIMENSIONS RE IN MILLIMEERS 4. DIMENSIONS OF EXPOSED PD ON BOOM OF PCKGE DO NO ILDE MOLD FLSH. MOLD FLSH, IF PRESEN, SHLL NO EXCEED 0.20mm ON NY SIDE 5. EXPOSED PD SHLL BE SOLDER PLED 6. SHDED RE IS ONLY REFEREE FOR PIN 1 LOCION ON HE OP ND BOOM OF PCKGE Information furnished by Linear echnology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear echnology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 19

20 LC2847 YPICL PPLICIO S he V.11 drivers are driven between V CC and GND while the V.10 drivers are driven between V CC and V EE. ssume that the V.11 driver outputs are high and V.10 driver outputs low. Current going into each 100Ω V.11 receiver termination = (110m 2.7m) 23m/3 = 28.1m. Current going into each 4 V.10 receiver termination = 23m 2m/2 = 10.5m. From Equation (2), V.11 P R = 79mW and V.10 P R = 49.6mW. From Equation (3), P DISS(2845) = 5V (110m 23m) + (8V 0.3m) + 5.5V 23m 3 79mW mW = 228mW. Since the LC2845 runs slow control signals, the C power dissipation can be assumed to be equal to the DC power dissipation. he extra power dissipated in the LC2847 due to LC2845 is given by Equation(4), P DISS1(2847) = 25% (8V 0.3m) + 43% (5.5V 23m) = 55mW. So for an X.21 DCE port running at 10MBd, the LC2847 dissipates approximately 718mW + 55mW = 773mW while the LC2845 dissipates 228mW. RELED PRS PR NMBER DESCRIPION COMMENS LC1321 Dual RS232/RS485 ransceiver wo RS232 Driver/Receiver Pairs or wo RS485 Driver/Receiver Pairs LC1334 Single 5V RS232/RS485 Multiprotocol ransceiver wo RS232 Driver/Receiver or Four RS232 Driver/Receiver Pairs LC1343 Software-Selectable Multiprotocol ransceiver 4-Driver/4-Receiver for Data and Clock Signals LC1344 Software-Selectable Cable erminator Perfect for erminating the LC1543 (Not Needed with LC1546) LC1345 Single Supply V.35 ransceiver 3-Driver/3-Receiver for Data and Clock Signals LC1346 Dual Supply V.35 ransceiver 3-Driver/3-Receiver for Data and Clock Signals LC1543 Software-Selectable Multiprotocol ransceiver erminated with LC1344 for Data and Clock Signals, Companion to LC1544 or LC1545 for Control Signals LC1544 Software-Selectable Multiprotocol ransceiver Companion to LC1546 or LC1543 for Control Signals Including LL LC1545 Software-Selectable Multiprotocol ransceiver 5-Driver/5-Receiver Companion to LC1546 or LC1543 for Control Signals Including LL, M and RL LC1546 Software-Selectable Multiprotocol ransceiver 3-Driver/3-Receiver with ermination for Data and Clock Signals LC V Software-Selectable Multiprotocol ransceiver Companion to LC2846 for Control Signals Including LL LC V Software-Selectable Multiprotocol ransceiver 5-Driver/5-Receiver Companion to LC2846 or LC2847 for Control Signals Including LL, M and RL LC V Software-Selectable Multiprotocol ransceiver 3.3V Supply, 3-Driver/3-Receiver with ermination for Data and Clock Signals, Generates the Required 5V and ±8V Supplies for LC2846 Companion Parts 20 Linear echnology Corporation 1630 McCarthy Blvd., Milpitas, C (408) FX: (408) L/P K PRINED IN S LINER ECHNOLOGY CORPORION 2003