MAX13171E/MAX13173E/MAX13175E

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1 ; Rev 3; 8/11 EVLUTION KIT VILBLE Multiprotocol, Pin-Selectable General Description The MX13171E along with the MX13173E/ MX13175E, form a complete pin-selectable data terminal equipment (DTE) or data communication equipment (DCE) interface port that support the V.28 (RS-232), V.1/V.11 (RS-449/V.36, RS-53, RS-53, X.21), and V.35 protocols. The MX13171E transceivers carry the high-speed clock and data signals, while the MX13173E transceivers carry the control signals. The MX13171E can be terminated by the MX13175E pin-selectable resistor termination network. The MX13175E contains six pin-selectable, multiprotocol cable termination networks. The MX13171E/MX13173E have an internal charge pump and low-dropout transmitter output stages that allow V.1-, V.11-, V.28-, and V.35-compliant operation from a single supply. The MX13171E/MX13173E feature a no-cable mode that reduces supply current and disables all transmitter and receiver outputs (high impedance). Short-circuit current limiting and thermal shutdown circuitry protects the receiver and transmitter outputs against excessive power dissipation. The MX13171E/ MX13173E have extended ESD protection for all the transmitter outputs and receivers inputs. The operate over the V to +5.5V supply range and are available in 5mm x 7mm, 38-pin TQFN packages. These devices operate over the -4 C to +85 C extended temperature range. pplications Data Networking PCI Cards CSU and DSU Telecommunication Equipment Data Routers Data Switches Features Supports V.28 (RS-232), V.1 (RS-423), V.11 (RS-449/V.36, RS-53, RS-53, X.21) and V.35 Protocols Pin-Selectable Cable Termination Using the MX13175E Pin-Selectable DCE/DTE Configurations 2/4Mbps (max) Data Rate in RS-449, RS-53, RS-53, X.21, and V.35 True Fail-Safe Receivers while Maintaining V.11 and V.35 Compatibility Operates Over a Wide V to +5.5V V CC Supply Range Flexible V L Logic Reference Input llows Interfacing Down to 1.62V Extended ESD Protection for ll the Transmitter Outputs and Receivers Inputs to Small, 5mm x 7mm, 38-Pin TQFN Package PRT Ordering Information TEMP RNGE PIN- PCKGE MX13171EETU+ - 4 C to + 85 C 38 TQFN-EP* MX13173EETU+ - 4 C to + 85 C 38 TQFN-EP* MX13175EETU+ - 4 C to + 85 C 38 TQFN-EP* +Denotes a lead(pb)-free/rohs-compliant package. *EP = Exposed pad. Typical Operating Circuit LL CTS DSR DCD DTR RTS RXD RXC TXC SCTE TXD T4 R4 R3 R2 MX13173E T3 R1 T2 T1 R3 R2 MX13171E T3 R1 T2 T1 MX13175E LL (141) CTS (16) CTS B DSR (19) DSR B DCD (17) DCD B DTR (18) DTR B RTS (15) RTS B SHIELD (11) SG (12) RXD (14) RXD B DB-25 CONNECTOR RXC (115) RXC B TXC (114) TXC B SCTE (113) SCTE B TXD (13) TXD B Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at

2 BSOLUTE MXIMUM RTINGS (ll voltages to, unless otherwise noted.) Supply Voltages V CC V to +6V V L V to +6V V to -7.1V V DD V to +7.1V V DD to V CC...-.3V to +6V Logic-Input Voltages M, M1, M2, DCE/DTE, LTCH, INVERT, T_IN V to +6V Termination Network Inputs R_, R_B, R_C...-15V to +15V R_ to R_B (only for high-z state)...±14v R_ to R_B...±6V R_ to R_C (only for high-z state)...±14v R_ to R_C...±3V R_B to R_C (only for high-z state)...±3v PCKGE THERML CHRCTERISTICS (Note 1) TQFN Junction-to-mbient Thermal Resistance (θ J )...28 C/W Junction-to-Case Thermal Resistance (θ JC )...1 C/W Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal considerations, refer to Stresses beyond those listed under bsolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. MX13171E ELECTRICL CHRCTERISTICS Logic-Output Voltages R_OUT...-.3V to (V L +.3V) Transmitter Outputs T_OUT_, T_OUT_/R_IN_ (no-cable, V.28, V.1 modes)...-15v to +15V Short-Circuit Duration to...continuous Receiver Inputs R_IN_, T_OUT_/R_IN...-15V to +15V R_IN to R_INB, T3OUT/R3IN to T3OUTB/R3INB...-15V to +15V Continuous Power Dissipation (T = +7 C) 38-Pin TQFN (derate 35.7mW/ C above +7 C) mW Operating Temperature Range...-4 C to +85 C Junction Temperature C Storage Temperature Range C to +15 C Lead Temperature (soldering, 1s)...+3 C Soldering Temperature (reflow) C (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 = (Figure 15), T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS V CC Operating Range V CC V V L Operating Range V L 1.62 V CC V V L Supply Current I L ll inputs connected to, all receiver outputs low, V L = +5.5V V CC Supply Current (DCE Mode) (Digital Inputs = or V CC ) (Transmitter Outputs Static) Internal Power Dissipation (DCE Mode)(Static) I CC P D RS-53, RS-53, X.21, V.36/RS-449 mode (V.11), no load RS-53, RS-53, X.21, V.36/RS-449 mode (V.11), full load 55 8 µ m 15 2 m V.35 mode, no load m V.35 mode, full load m V.28 mode, no load 15 3 m V.28 mode, full load m No-cable mode.1 1 µ RS-53, RS-53, X.21, V.36/RS-449 mode (V.11), full load 1 V.35 mode, full load 5 V.28 mode, full load 7 mw 2

3 MX13171E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 = (Figure 15), T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS Positive Charge-Pump Output Voltage Negative Charge-Pump Output Voltage Charge-Pump Enable Time V DD V.28, V.35 modes, no load (Note 3) V.28 mode, full load (Note 3) V.35 mode, full load (Note 3) RS - 53, RS - 53, X.21, V.36/RS m od e ( V.11) ( N ote 3) No-cable mode V CC V.28, V.35 modes, no load (Note 3) V.28 mode, full load (Note 3) V.35 mode, full load, Note RS - 53, RS - 53, X.21, V.36/RS m od e ( V.11) ( N ote 3) No-cable mode Time until all V DD and specifications meet V V < 1 ms Thermal Shutdown Protection THSD +145 C LOGIC INPUTS (M, M1, M2, DCE/DTE, T1IN, T2IN, T3IN) Input High Voltage V IH.66 x V L V Input Low Voltage V IL.33 x V L V Logic-Input Current I IN T1IN, T2IN, T3IN µ Pullup Resistor R PUIN M, M1, M2, DCE/DTE to V L kω LOGIC OUTPUTS (R1OUT, R2OUT, R3OUT) Output High Voltage V OH I SOURCE = 4m.66 x V L V Output Low Voltage V OL I SINK = 4m.33 x V L V Output Pullup Resistor R PUY No-cable mode (to V L ) 71.4 kω V.11 TRNSMITTER Open-Circuit Differential Output Voltage Loaded Differential Output Voltage V ODO Open circuit, R = 1.95kΩ, Figure 1 -V CC +V CC V V ODL R = 5Ω, Figure 1.5 x V ODO R = 5Ω, Figure 1 I2I V Change in Magnitude of Output Differential Voltage V OD R = 5Ω, Figure 1.2 V Common-Mode Output Voltage V OC R = 5Ω, Figure 1 3. V Change in Magnitude of Common-Mode Output Voltage V OC R = 5Ω, Figure 1 (Note 3).2 V Short-Circuit Current I SC V OUT = 15 m Rise Time t r Figures 2, ns Fall Time t f Figures 2, ns 3

4 MX13171E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 = (Figure 15), T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS Transmitter Input to Output Propagation Delay (Figures 2, 6) Figures 2, t PHL, t PLH V L +3V, Figures 2, Data Skew t PHL -t PLH Figures 2, 6 (Note 3) 2 ns Channel-to-Channel Skew t SKEW Figures 2, 6 (Notes 3, 4) 3 ns V.11 RECEIVER Differential Threshold Voltage V TH -7V V CM +7V -2-5 mv Input Hysteresis V TH -7V V CM +7V 15 mv Receiver Input Current I IN -1V V,B +1V m Receiver Input Resistance R IN -1V V,B +1V 15 3 kω Rise or Fall Time t r, t f Figures 2, 7 3 ns Receiver Input to Output Delay t PHL, t PLH Figures 2, ns Data Skew t PHL -t PLH Figures 2, 7 (Note 3) 3 ns Channel-to-Channel Skew t SKEWR Figures 2, 7 (Notes 3, 4) 3 ns V.35 TRNSMITTER Differential Output Voltage V OD Full load, -4V < V CM < +4V, Figure 3 ±.44 ±.55 ±.66 V Output High Current I OH V,B = V m Output Low Current I OL V,B = V m Output Leakage Current I Z -.25V V OUT +.25V, power off or no-cable mode ns ±.5 ±5 µ Rise or Fall Time t r, t f Figures 3, 6 5 ns Transmitter Input to Output Delay t PLH, t PHL Figures 3, ns Data Skew t PLH - t PHL Figures 3, 6 (Note 3) 3 ns Channel-to-Channel Skew t SKEWR Figures 3, 6 (Notes 3, 4) 3 ns V.35 RECEIVER Differential Threshold Voltage V TH -2V V CM +2V -2-5 mv Input Hysteresis V TH -2V V CM +2V 15 mv Receiver Input Current I IN -1V V,B +1V m Receiver Input Resistance R IN -1V V,B +1V 15 3 kω Rise or Fall Time t r, t f Figures 3, 7 3 ns Receiver Input to Output Delay t PHL, t PLH Figures 3, 7 25 ns Data Skew t PHL - t PLH Figures 3, 7 (Note 3) 3 ns Channel-to-Channel Skew t SKEWR Figures 3, 7 (Notes 3, 4) 3 ns V.28 TRNSMITTER Output-Voltage Swing V OD Open circuit 7.1 R L = 3kΩ 5 6 Short-Circuit Current I OH 85 m V 4

5 MX13171E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 = (Figure 15), T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS Output Leakage Current I Z -.25V V OUT +.25V, power off or no-cable mode Output Slew Rate SR R/F R L = 3kΩ, C L = 25pF (swing in ±3V), Figures 4, 1 ±.5 ±5 µ 4 3 V/µs Transmitter Input to Output Delay t PHL, t PLH R L = 3kΩ, C L = 25pF, Figures 4, µs V.28 RECEIVER Input Threshold Low V IL V Input Threshold High V IH V Input Hysteresis V HYST.25 V Input Resistance R IN -15V V IN +15V kω Rise or Fall Time t r, t f Figures 5, 11 3 ns Receiver Input to Output Delay t PHL, t PLH Figures 5, ns ESD PROTECTION T_OUT, T3OUT_/R1IN_, R_IN to MX13173E ELECTRICL CHRCTERISTICS Human Body Model ±15 ir Gap Discharge IEC ±12 Contact Discharge IEC ±8 (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 = (Figure 15), T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS V CC Operating Range V CC V V L Operating Range V L 1.62 V CC V V L Supply Current I L ll inputs connected to, all receiver outputs low, V L = +5.5V kv µ RS-53, no load m RS-53, X.21, V.36/RS-449, DCE mode, INVERT = low, full load, transmitter outputs m V CC Supply Current I CC static, digital inputs = or V L V.28 mode, no load m V.28 mode, full load m No-cable mode.1 1 µ RS-53, X.21, V.36/RS-449; DCE mode, Internal Power Dissipation P D INVERT = low, full load 12 mw Positive Charge-Pump Output Voltage V DD V.28 mode, no load (Note 3) V.28 mode with full load (Note 3) RS-53 mode, full load (Note 3) RS-53 mode, full load 5.15 No-cable mode V CC V 5

6 MX13173E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 = (Figure 15), T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS Negative Charge-Pump Output Voltage V.28 mode, no load (Note 3) V.28 mode with full load (Note 3) RS-53 mode, full load (Note 3) RS-53 mode, full load No-cable mode Thermal Shutdown Protection THSD +145 C Charge-Pump Enable Time Time until all V DD and specifications meet LOGIC INPUTS (M, M1, M2, DCE/DTE, INVERT, T1IN, T2IN, T3IN, T4IN, T5IN/R5OUT) V < 1 ms Input High Voltage V IH.66 x V L V Input Low Voltage V IL.33 x V L V Logic-Input Current I IN T1IN, T2IN, T3IN, T4IN µ Pullup Resistor R PUIN M, M1, M2, DCE/DTE, INVERT to V L kω LOGIC OUTPUTS (R1OUT, R2OUT, R3OUT, R4OUT, T5IN/R5OUT) Output High Voltage V OH I SOURCE = 4m.66 x V L V Output Low Voltage V OL I SINK = 4m.33 x V L V Output Pullup Resistor R PUY No-cable mode (to V L ) 71.4 kω V.11 TRNSMITTER (T1, T2, T3) Open-Circuit Differential Output Voltage Loaded Differential Output Voltage Change in Magnitude of Output Differential Voltage V ODO Open circuit, R = 1.95kΩ, Figure 1 -V CC +V CC V R = 5Ω, Figure 1.5 x V ODO V ODL R = 5Ω, Figure 1 2 V OD R = 5Ω, Figure 1.2 V Common-Mode Output Voltage V OC R = 5Ω, Figure 1 3. V Change in Magnitude of Common-Mode Output Voltage V OC R = 5Ω, Figure 1 (Note 3).2 V Short-Circuit Current I SC V OUT = 15 m Output Leakage Current I Z -.25V V OUT +.25V, power-off or nocable mode V ±.5 ±5 µ Rise Time t r Figures 2, ns Fall Time t f Figures 2, ns Transmitter Input to Output Prop Delay Figures 2, ns t PHL, t PLH Figures 2, 6, V L +3V 25 ns Data Skew t PHL - t PLH Figures 2, 6 (Note 3) 2 ns Channel-to-Channel Skew t SKEW Figures 2, 6 (Notes 3, 4) 3 ns 6

7 MX13173E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 = (Figure 15), T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS V.11 RECEIVER (R1, R2, R3) Differential Threshold Voltage V TH -7V V CM +7V -2-5 mv Input Hysteresis V TH -7V V CM +7V 15 mv Receiver Input Current I IN -1V V,B +1V m Receiver Input Resistance R IN -1V V,B +1V 15 3 kω Rise or Fall Time t r, t f Figures 2, 7 3 ns Receiver Input to Output Delay t PHL, t PLH Figures 2, 7 27 ns Data Skew t PHL - t PLH Figures 2, 7 (Note 3) 3 ns Channel-to-Channel Skew t SKEWR Figures 2, 7 (Notes 3, 4) 3 ns V.1 TRNSMITTER (T2, T4, T5) Open-Circuit Output Voltage Swing Output-Voltage Swing V T R L = 45Ω R L = 3.9kΩ (out high) 4 6 V O R L = 3.9kΩ (out low) -6-4 R L = 45Ω (out high) 3.6 R L = 45Ω (out low) -3.6 Short-Circuit Current I SC V O = m Output Leakage Current I Z -.25V V OUT +.25V, power-off or no-cable mode.9 x V O V V ±.5 +5 µ Rise or Fall Time t r, t f R L = 45Ω, C L = 1pF, Figure 8 2 µs Transmitter Input to Output Delay t PLH, t PHL R L = 45Ω, C L = 1pF, Figure 8 1 µs V.1 RECEIVER (R2, R4, R5) Input Threshold Voltage V TH 5 25 mv Input Hysteresis V TH 25 mv Receiver Input Current I IN -1V V +1V m Receiver Input Resistance R IN -1V V +1V 15 3 kω Rise or Fall Time t r, t f Figures 5, 9 3 ns Receiver Input to Output Delay t PLH Figure 9 55 t PHL Figure 9 19 Data Skew t PHL - t PLH Figures 5, 9 (Note 3) 6 ns V.28 TRNSMITTER (ll CHNNELS) Output-Voltage Swing V OD Open circuit 7.1 R L = 3kΩ 5 6 Short-Circuit Current I OH 9 m Output Leakage Current I Z -.25V V OUT +.25V, power-off or no-cable mode ns V ±.5 ±5 µ 7

8 MX13173E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 =, Figure 15, T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS Output Slew Rate SR R/F R L = 3kΩ, C L = 25pF (swing in ±3V) Figures 4, V/µs Transmitter Input to Output Delay t PHL, t PLH R L = 3kΩ, C L = 25pF, Figures 4, µs V.28 RECEIVER (ll CHNNELS) Input Threshold Low V IL V Input Threshold High V IH V Input Hysteresis V HYST.25 V Input Resistance R IN -15V V IN +15V kω Rise or Fall Time t r, t f Figures 5, 11 3 ns Receiver Input to Output Delay t PHL, t PLH Figures 5, ns ESD PROTECTION T_OUT, T_OUT/R_IN_, R_IN Human Body Model ±15 ir Gap Discharge IEC ±15 Contact Discharge ±5 MX13175E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 =, Figure 15, T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS V CC Operating Range V CC V V L Operating Range V L 1.62 V CC V V DD Operating Range V DD V Operating Range V V L POR Rising Threshold V V CC POR Rising Threshold V V DD Supply Current I DD ll inputs connected to or V L, except no-cable mode kv.5.25 m ll inputs connected to or V I L, except CC m V CC Supply Current no-cable mode I CC_NOCB = V, M[x] = 1111 (Note 5) m V L Supply Current I L ll inputs connected to or V L µ Supply Current I EE ll inputs connected to or V L m TERMINTOR INPUTS Differential-Mode Impedance V.35 Mode Common-Mode Impedance V.35 Mode -2V V CM +2V, all channels, Figure Ω -2V V CM +2V, all channels, Figure Ω 8

9 MX13175E ELECTRICL CHRCTERISTICS (continued) (V CC = V to +5.5V, V L = +1.62V to +5.5V, C1 = C2 = 1µF, C3 = C4 = C5 =, Figure 15, T = -4 C to +85 C, unless otherwise noted. Typical values are at V CC = +3.3V, V L = +1.8V, T = +25 C.) (Note 2) PRMETER SYMBOL CONDITIONS MIN TYP MX UNITS -7V V CM +7V, all channels, except nocable mode, Figure 12 Differential-Mode Impedance V.11 Mode -7V V CM +7V, no cable, = V, V B < 2V, Figure Differential Path Enable Time 5 µs Differential Path Disable Time 3 µs Common-Mode Path Enable Time 12 µs Common-Mode Path Disable Time High-Impedance Leakage Current LOGIC INPUTS (M, M1, M2, LTCH, DCE/DTE) Note 2: ll devices are 1% production tested at T = +85 C for the MX13171E/MX13173E and T = +25 C for the MX13175E. Specifications over temperature are guaranteed by design. Note 3: Guaranteed by design, not production tested. Note 4: Output-to-output skews are evaluated as difference of propagation delays between different channels in the same condition and for the same polarity (LH or HL). Note 5: M[x] is the input bus DTE/DCE, M2, M1, M. 115 Ω 2 µs I Z -15V V R_ +15V µ Input High Voltage V IH.66 x V L V Input Low Voltage V IL.33 x V L V Logic Input Current I IN V IN = or V L µ ESD PROTECTION R_, R_B to Human Body Model ±15 ir Gap Discharge IEC ±1 Contact Discharge IEC ±6 ll Other Pins Human Body Model ±2 kv kv 9

10 MX13171E Typical Operating Characteristics (V CC = +3.3V, V L = +1.8V, T = +25 C, unless otherwise noted.) SUPPLY CURRENT (m) DIFFERENTIL OUTPUT VOLTGE (V) RS-53 SUPPLY CURRENT vs. DT RTE DCE MODE, R = 5Ω, LL TRNSMITTERS OPERTING T THE SPECIFIED DT RTE , DT RTE (kbps) V.11 DIFFERENTIL OUTPUT VOLTGE vs. TEMPERTURE DC OUTPUT DCE MODE, R = 5Ω V OUT+ V OUT TEMPERTURE ( C) MX13171E toc1 MX13171E toc4 SUPPLY CURRENT (m) OUTPUT VOLTGE (V) DC OUTPUT DCE MODE, R L = 3kΩ V.28 SUPPLY CURRENT vs. DT RTE DCE MODE, LL TRNSMITTERS OPERTING T THE SPECIFIED DT RTE, R L = 3kΩ, C L = 25pF DT RTE (kbps) V.28 OUTPUT VOLTGE vs. TEMPERTURE V OUT+ V OUT TEMPERTURE ( C) MX13171E toc2 MX13171E toc5 SUPPLY CURRENT (m) OUTPUT VOLTGE (V) V.35 SUPPLY CURRENT vs. DT RTE DCE MODE, FULLY LODED, LL TRNSMITTERS OPERTING T THE SPECIFIED DT RTE , DT RTE (kbps) V.35 OUTPUT VOLTGE vs. TEMPERTURE V OH DC OUTPUT DCE MODE, V CM = V, FULL LOD V OL TEMPERTURE ( C) MX13171E toc3 MX13171E toc6 DIFFERENTIL OUTPUT VOLTGE (mv) V.35 LODED DIFFERENTIL OUTPUT VOLTGE vs. COMMON-MODE VOLTGE DC OUTPUT V OD COMMON-MODE VOLTGE (V) MX13171E toc7 INPUT CURRENT (µ) V.11/V.35 RECEIVER INPUT CURRENT vs. INPUT VOLTGE DC OUTPUT DTE MODE R1IN R2IN, R3IN INPUT VOLTGE (V) MX13171E toc8 INPUT CURRENT (m) V.28 RECEIVER INPUT CURRENT vs. INPUT VOLTGE DC OUTPUT DTE MODE INPUT VOLTGE (V) MX13171E toc9 1

11 MX13171E Typical Operating Characteristics (continued) (V CC = +3.3V, V L = +1.8V, T = +25 C, unless otherwise noted.) T_IN 2V/div T_OUT_/R_IN_ 2V/div R_OUT 2V/div T_IN 2V/div T_OUT_/R_IN_.5V/div R_OUT 2V/div V.11 LOOPBCK OPERTION (4Mbps) MX13171E toc1 R = 5Ω V.35 LOOPBCK OPERTION (4Mbps) MX13171E toc12 FULL LOD 1ns/div 1µs/div T_IN 2V/div T_OUT_/R_IN_ 5V/div R_OUT 2V/div SLEW RTE (V/µs) V.28 LOOPBCK OPERTION (25kbps) MX13171E toc11 R L = 3kΩ, C L = 25pF R L = 3kΩ V.28 SLEW RTE vs. LOD CPCITNCE SR R SR F 1µs/div LOD CPCITNCE (pf) MX13171E toc13 PROPGTION DELY (ns) V.11/V.35 RECEIVER PROPGTION DELY vs. TEMPERTURE t PHL tplh MX13171E toc14 PROPGTION DELY (ns) V.11 TRNSMITTER PROPGTION DELY vs. TEMPERTURE t PLH t PHL MX13171E toc15 PROPGTION DELY (ns) V.35 TRNSMITTER PROPGTION DELY vs. TEMPERTURE t PHL t PLH MX13171E toc TEMPERTURE ( C) TEMPERTURE ( C) TEMPERTURE ( C) 11

12 MX13173E Typical Operating Characteristics (V CC = +3.3V, V L = +1.8V, T = +25 C, unless otherwise noted.) SUPPLY CURRENT (m) OUTPUT VOLTGE (V) R-53 SUPPLY CURRENT vs. DT RTE DCE MODE, INVERT = 1 3 TRNSMITTERS OPERTING T THE SPECIFIED DT RTE IN V.11 MODE FULL LOD, R = 5Ω NO LOD, R = 1.95kΩ 1 1 1, DT RTE (kbps) DC OUTPUT DCE MODE V.1 OUTPUT VOLTGE vs. TEMPERTURE R L = 3.9kΩ R L = 45Ω R L = 3.9kΩ SUPPLY CURRENT (m) V OUT+ V OUT TEMPERTURE ( C) MX13171E toc V.28 SUPPLY CURRENT vs. DT RTE FULL LOD, R L = 5Ω, C L = 25pF NO LOD 3 2 DCE MODE, INVERT = 1 LL TRNSMITTERS 1 OPERTING T THE SPECIFIED DT RTE DT RTE (kbps) MX13171E toc2 OUTPUT VOLTGE (V) MX13171E toc18 DIFFERENTIL OUTPUT VOLTGE (V) DC OUTPUT DCE MODE, R L = 3kΩ V.11 DIFFERENTIL OUTPUT VOLTGE vs. TEMPERTURE DC OUTPUT DCE MODE, INVERT = 1, R = 5Ω V OUT+ V OUT TEMPERTURE ( C) V.28 OUTPUT VOLTGE vs. TEMPERTURE V OUT+ V OUT TEMPERTURE ( C) MX13171E toc21 MX13171E toc19 INPUT CURRENT (µv) V.11 RECEIVER INPUT CURRENT vs. INPUT VOLTGE 5 4 DC OUTPUT DCE MODE R3IN R2IN R1IN INPUT VOLTGE (V) MX13171E toc22 INPUT CURRENT (m) V.28 RECEIVER INPUT CURRENT vs. INPUT VOLTGE DC OUTPUT INPUT VOLTGE (V) MX13171E toc23 12

13 MX13173E Typical Operating Characteristics (continued) (V CC = +3.3V, V L = +1.8V, T = +25 C, unless otherwise noted.) SLEW RTE (V/µs) R L = 3kΩ SR R V.28 SLEW RTE vs. LOD CPCITNCE SR F LOD CPCITNCE (pf) T_IN 2V/div T_OUT_/R_IN_ 5V/div R_OUT 2V/div MX13171E toc24 RISE/FLL TIME (µs) V.28 LOOPBCK OPERTION (25kbps) MX13171E toc27 R L = 3kΩ, C L = 25pF 1µs/div V.1 TRNSMITTER RISE/FLL TIME vs. LOD CPCITNCE FLL RISE LOD CPCITNCE (pf) MX13171E toc25 T_IN 2V/div T_OUT_/R_IN_ 5V/div R_OUT 2V/div T_IN 2V/div T_OUT_/R_IN_ 2V/div R_OUT 2V/div V.11 LOOPBCK OPERTION (4Mbps) MX13171E toc26 FULL LOD 1ns/div V.1 LOOPBCK OPERTION (1kbps) MX13171E toc28 R L = 45Ω 4µs/div R L = 3.9kΩ PROPGTION DELY (ns) V.11 RECEIVER PROPGTION DELY vs. TEMPERTURE t PHL t PLH MX13171E toc29 PROPGTION DELY (ns) V.11 TRNSMITTER PROPGTION DELY vs. TEMPERTURE t PHL t PLH MX13171E toc TEMPERTURE ( C) TEMPERTURE ( C) 13

14 MX13175E Typical Operating Characteristics (V CC = +3.3V, V L = +1.8V, T = +25 C, unless otherwise noted.) IMPEDNCE (I) IMPEDNCE (I) V.11 OR V.35 DIFFERENTIL IMPEDNCE vs. TEMPERTURE V CM = +7V V CM = V V CM = -7V TEMPERTURE (NC) V.11 OR V.35 DIFFERENTIL IMPEDNCE vs. SUPPLY VOLTGE ( ) (V) MX13175E toc31 MX13175E toc34 IMPEDNCE (I) IMPEDNCE (I) V.11 OR V.35 DIFFERENTIL IMPEDNCE vs. COMMON-MODE VOLTGE (V CM ) V CM (V) V.35 COMMON-MODE IMPEDNCE vs. TEMPERTURE V CM = +2V V CM = -2V TEMPERTURE (NC) MX13175E toc32 MX13175E toc35 IMPEDNCE (I) IMPEDNCE (I) V.11 OR V.35 DIFFERENTIL IMPEDNCE vs. SUPPLY VOLTGE (V CC ) V CC (V) V.35 COMMON-MODE IMPEDNCE vs. COMMON-MODE VOLTGE (V CM ) V CM (V) MX13175E toc33 MX13175E toc36 14

15 MX13175E Typical Operating Characteristics (continued) (V CC = +3.3V, V L = +1.8V, T = +25 C, unless otherwise noted.) IMPEDNCE (I) V.35 COMMON-MODE IMPEDNCE vs. SUPPLY VOLTGE V CC (V) IMPEDNCE (I) V CM = +2V V CM = -2V MX13175E toc37 IMPEDNCE (I) V.11 OR V.35 DIFFERENTIL IMPEDNCE MGNITUDE vs. FREQUENCY FREQUENCY (MHz) V.35 COMMON-MODE IMPEDNCE vs. SUPPLY VOLTGE ( ) V CM = -2V V CM = +2V (V) MX13175E toc4 PHSE (DEGREES) MX13175E toc38 SUPPLY CURRENT (F) HI-Z MODE SUPPLY CURRENT vs. TEMPERTURE TEMPERTURE (NC) V.11 OR V.35 DIFFERENTIL IMPEDNCE PHSE vs. FREQUENCY FREQUENCY (MHz) I CC I EE MX13175E toc41 MX13175E toc39 15

16 PIN NME FUNCTION 1, 2, 6, 3, 31 N.C. No Connection. Not internally connected. MX13171E Pin Description Device Supply Voltage. Bypass V CC with a capacitor to ground as close as possible to 3, 16 V CC pin 3. 4 T1IN Transmitter 1 Logic Input 5 T2IN Transmitter 2 Logic Input 7 T3IN Transmitter 3 Logic Input 8 R1OUT Receiver 1 Logic Output with Internal Pullup to V L 9 R2OUT Receiver 2 Logic Output with Internal Pullup to V L 1 R3OUT Receiver 3 Logic Output with Internal Pullup to V L 11 M Mode-Select Input with Internal Pullup to V L Logic-Supply Reference Input. V 12 V L determines the voltage level of the logic interface. Bypass V L L with a.1µf capacitor to ground as close as possible to the device. 13 M1 Mode-Select 1 Input with Internal Pullup to V L 14 M2 Mode-Select 2 Input with Internal Pullup to V L 15 DCE/DTE DCE/DTE Mode-Select Input with Internal Pullup to V L 17 R3INB Receiver 3 Noninverting Input 18 R3IN Receiver 3 Inverting Input 19, 24, 29, 35 Ground 2 R2INB Receiver 2 Noninverting Input 21 R2IN Receiver 2 Inverting Input 22 T3OUTB/R1INB Transmitter 3 Noninverting Output/Receiver 1 Noninverting Input 23 T3OUT/R1IN Transmitter 3 Inverting Output/Receiver 1 Inverting Input 25 T2OUTB Transmitter 2 Noninverting Output 26 T2OUT Transmitter 2 Inverting Output 27 T1OUTB Transmitter 1 Noninverting Output 28 T1OUT Transmitter 1 Inverting Output 32 Charge-Pump Negative Supply Output. Connect a ceramic capacitor from to ground as close as possible to the device. 33 C2-34 C2+ 36 C1- Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor between C2+ and C2-. Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF ceramic capacitor between C2+ and C2-. V DD Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor between C1+ and C1-. V DD Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF ceramic capacitor 37 C1+ between C1+ and C1-. Charge-Pump Positive-Supply Output. Connect a ceramic capacitor from V DD to ground 38 V DD as close as possible to the device. EP Exposed Pad. Internally connected to. Connect to a large plane to maximize thermal performance. Not intended as an electrical connection point. Do not share the same plane as the MX13173E. 16

17 PIN NME FUNCTION 1 T1IN Transmitter 1 Logic Input MX13173E Pin Description Device Supply Voltage. Bypass V 2 V CC with a capacitor to ground as close as possible to CC the device. 3 T2IN Transmitter 2 Logic Input 4 T3IN Transmitter 3 Logic Input Logic-Supply Reference Input. V 5 V L determines the voltage level of the logic interface. Bypass V L L with a.1µf capacitor to ground, as close as possible to the device. 6 R1OUT Receiver 1 Logic Output with Internal Pullup to V L 7 R2OUT Receiver 2 Logic Output with Internal Pullup to V L 8 R3OUT Receiver 3 Logic Output with Internal Pullup to V L 9 R5OUT/T5IN Receiver 5 Logic Output/Transmitter 5 Logic Input 1 T4IN Transmitter 4 Logic Input 11 R4OUT Receiver 4 Logic Output 12 M Mode-Select Input with Internal Pullup to V L 13 M1 Mode-Select 1 Input with Internal Pullup to V L 14 M2 Mode-Select 2 Input with Internal Pullup to V L 15 DCE/DTE DCE/DTE Mode-Select Input with Internal Pullup to V L 16 INVERT T4/R4 and T5/R5 S el ect Inp ut w i th Inter nal P ul l up to V L. IN V E RT r ever ses the acti on of DCE/DTE for channels 4 and T4OUT/R4IN Transmitter 4 Inverting Output/Receiver 4 Inverting Input 18, 25, 31, 35 Ground 19 R3INB Receiver 3 Noninverting Input 2 R3IN Receiver 3 Inverting Input 21 R2INB Receiver 2 Noninverting Input 22 R2IN Receiver 2 Inverting Input 23 T3OUTB/R1INB Transmitter 3 Noninverting Output/Receiver 1 Noninverting Input 24 T3OUT/R1IN Transmitter 3 Inverting Output/Receiver 1 Inverting Input 26 T2OUTB Transmitter 2 Noninverting Output 27 T2OUT Transmitter 2 Inverting Output 28 T1OUTB Transmitter 1 Noninverting Output 29 T1OUT Transmitter 1 Inverting Output 3 T5OUT/R5IN Transmitter 5 Inverting Output/Receiver 5 Inverting Input Charge-Pump Negative-Supply Output. Connect a ceramic capacitor from V 32 to ground EE as close as possible to the device. 33 C2-34 C2+ 36 C1- Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor between C2+ and C2-. Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF ceramic capacitor between C2+ and C2-. V DD Charge-Pump Flying-Capacitor Negative Terminal. Connect a 1µF ceramic capacitor between C1+ and C1-. 17

18 PIN NME FUNCTION 37 C1+ MX13173E Pin Description (continued) V DD Charge-Pump Flying-Capacitor Positive Terminal. Connect a 1µF ceramic capacitor between C1+ and C V DD Charge-Pump Positive-Supply Output. Connect a ceramic capacitor from V DD to ground as close as possible to the device. EP Exposed Pad. Internally connected to. Connect to a large plane to maximize thermal performance, not intended as an electrical connection point. Does not share the same plane as the MX13171E. MX13175E Pin Description PIN NME FUNCTION 1, 38 R1B Load 1, Node B 2, 3 R1 Load 1, Node 4, 5 R2 Load 2, Node 6, 7 R2B Load 2, Node B 8 R2C Load 2, Center Tap. Leave unconnected. 9, 1 R3 Load 3, Node 11, 12 R3B Load 3, Node B 13, 18 Ground 14 R3C Load 3, Center Tap. Leave unconnected. 15 V L Logic-Supply Reference Input. V L determines the voltage level of the logic interface. Negative Supply Voltage. Bypass V 16 to with a.1µf capacitor. Connect to from the EE MX13173E. Positive Supply Voltage. Bypass V 17 V DD to with a.1µf capacitor. Connect to V DD from the DD MX13173E. 19 V CC Supply Voltage. Bypass V CC to with a.1µf capacitor as close as possible to the device. 2, 21 R4B Load 4, Node B 22, 23 R4 Load 4, Node 24, 25 R5B Load 5, Node B 26, 27 R5 Load 5, Node 28, 29 R6 Load 6, Node 3, 31 R6B Load 6, Node B 32 DCE/DTE DCE/DTE Mode-Select Input 33 LTCH Latch Signal Input. When LTCH is low, the input latches are transparent. When LTCH is high, the data at the mode-select inputs are latched. 34 M2 Mode-Select Input 2 35 M1 Mode-Select Input 1 36 M Mode-Select Input 37 R1C Load 1, Center Tap. Leave unconnected. EP Exposed Pad. Internally connected to. Connect to a large plane to maximize thermal performance, not intended as an electrical connection point. If is powered from the MX13173E s, planes can be shared. 18

19 R V OD V OC R B Figure 1. V.11 DC Test Circuit 5Ω B 125Ω T V OD 5Ω Figure 3. V.35 Transmitter/Receiver Test Circuit V CM 125Ω 1pF B T 1Ω 1pF Figure 2. V.11 C Test Circuit 5Ω B R 5Ω Test Circuits B R 15pF 15pF T T R V O C L R L 15pF Figure 4. V.1/V.28 Transmitter Test Circuit Figure 5. V.1/V.28 Receiver Test Circuit 19

20 TIN_ V L V V B - -V V L /2 t PLH 5% Figure 6. V.11 Transmitter Propagation Delays +1V B - -1V V H R V L t PLH Figure 7. V.11 Receiver Propagation Delays V L TIN_ V V H -V L t R 9% 1% f = 1MHz: t r, t f 1ns f = 1MHz: t r, t f 1ns INPUT V L /2 Timing Diagrams t PHL 9% V L /2 9% OUTPUT 9% V L /2 1% 1% t R t F t R, t F 1ns V L /2 V L /2 t PHL 9% tf 1% t PHL t PLH 1% t R t F 5% 9% 1% Figure 8. V.1 Transmitter Propagation Delay V IH V IL V H R V L t R, t F 1ns t PHL t PLH V L /2 9% 9% 1% 1% V L /2 t F t R Figure 9. V.1 Receiver Propagation Delay 2

21 V L TIN_ V V H -V L t R, t F 1ns V L /2 V L /2 t PHL 3V -3V Figure 1. V.28 Transmitter Propagation Delay (2.V) V IH (.8V) V IL V H R V L 1.3V t PHL Figure 11. V.28 Receiver Propagation Delay MMETER I tf SR F = 6/t F SR R = 6/t R t R, t F 1ns Timing Diagrams (continued) t PLH -3V 9% 9% V L /2 V L /2 1% 1% t F t R R1 = 52Ω S1 ON 1.3V t PLH t R 3V R1 = 52Ω R3 = 127Ω S1 ON V DM = ±2V S2 OFF R2 = 52Ω MMETER I S2 ON R3 = 127Ω R2 = 52Ω B V CM = ±2V V CM = ±7V OR ±2V R DM = V DM I R CM = V CM I B Figure 12. V.11 or V.35 Differential Impedance Measurement Figure 13. V.35 Common-Mode Impedance Measurement 21

22 V DD V CC Figure 14. MX13175E Block Diagram EP R1C R2C R3C R1 R1B R2 R2B R3 R3B R4 R4B R5 R5B R6 R6B Detailed Description The form a complete pin-selectable DTE or DCE interface port that supports the V.28 (RS-232), V.1/V.11 (RS-449/V.36, RS-53, RS-53, X.21), and V.35 protocols. The MX13171E transceivers carry the high-speed clock and data signals, while the MX13173E transceivers carry serial-interface control signaling. The MX13171E can be terminated by the MX13175E pin-selectable resistor termination network, or by a discrete termination network. The MX13171E/MX13173E feature a low supply current, no-cable mode, true fail-safe operation, and thermal-shutdown circuitry. Thermal shutdown protects the drivers against excessive power dissipation. When activated, the thermal-shutdown circuitry places the driver and receiver outputs into a highimpedance state. The MX13171E is a three-driver/three-receiver, multiprotocol transceiver that operates from a single V to +5.5V supply. The MX13173E is a five-driver/five-receiver multiprotocol transceiver that operates from a single V to +5.5V supply. The MX13175E contains six pin-selectable multiprotocol cable termination networks (Figure 14). Each network is capable of terminating V.11 (RS-422, RS-53, RS-53, RS-449, V.36 and X.21) with a 1Ω differential load, V.35 with a T-network load, or V.28 (RS-232) and V.1 (RS-423) with an open-circuit load for use with transceivers having on-chip termination. The terminations and protocols are pin selectable. The MX13175E replaces discrete resistor termination networks and V L DCE/DTE MX13175E M2 M1 M LTCH expensive relays required for multiprotocol termination, saving space and cost. Dual Charge-Pump Voltage Converter The MX13171E/MX13173E have internal-regulated dual charge pumps that provide positive and negative output voltages from a single supply. The charge pump operates in discontinuous mode. If the output voltage is less than the regulated voltage, the charge pump is enabled. If the output voltage exceeds the regulated voltage, the charge pump is disabled. Each charge pump requires flying capacitors (C1, C2), and reservoir capacitors (C3, C5), to generate the V DD and supplies. Figure 15 shows the charge-pump connections V TO +5.5V C3 C4 C1 1µF Figure 15. Charge Pump V DD C1+ C2- C1- V CC MX13171E MX13173E C2+ C2 1µF C5 22

23 Fail-Safe The MX13171E/MX13173E guarantee a logic-high receiver output when the receiver inputs are open or shorted, or when they are connected to a terminated transmission line with all drivers disabled by setting the receiver threshold between -5mV and -2mV in the V.11 and V.35 modes. If the differential receiver input voltage (B - ) is -5mV, R_OUT is logic-high. If (B - ) is -2mV, R_OUT is logic-low. In the case of a terminated bus with all transmitters disabled, the receiver s differential input voltage is pulled to zero by the termination. This results in a logic-high with a 5mV minimum noise margin. The V.1 receiver threshold is set between 5mV and 25mV. If the V.1 receiver input voltage is less than or equal to 5mV, R_OUT is logic-high. The V.28 receiver threshold is set between.8v and 2.V. If the receiver input voltage is less than or equal to.8v, R_OUT is logic-high. In the case of a terminated bus with transmitters disabled, the receiver s input voltage is pulled to by the termination. Table 1. MX13171E Mode Selection MX13171E MODE NME M2 M1 M DCE/ DTE Mode Selection The mode-select inputs M, M1, and M2 determine which interface protocol is selected (Table 1 for the MX13171E, Table 2 for the MX13173E). The state of the DCE/DTE input determines whether the transceivers are configured as a DTE serial port or a DCE serial port. The INVERT input on the MX13173E changes the DCE/DTE functionality regarding T4/T5 and R4/R5 only. M, M1, M2, INVERT, and DCE/DTE are internally pulled up to V L to ensure logic-high if left unconnected. If the M, M1, and M2 mode inputs are all unconnected, the MX13171E/MX13173E enter no-cable mode. The MX13175E mode select inputs and DCE/DTE input do not have an internal pullup to V L. They are pulled logic-high if their mode-select inputs are tied to the MX13171E/MX13173E s mode select inputs. Termination Modes The termination networks in the MX13175E can be set to one of three modes, V.11, V.35, or high impedance. T1 T2 T3 R1 R2 R3 Not Used (Default V.11) V.11 V.11 Z V.11 V.11 V.11 RS-53 1 V.11 V.11 Z V.11 V.11 V.11 RS-53 1 V.11 V.11 Z V.11 V.11 V.11 X V.11 V.11 Z V.11 V.11 V.11 V.35 1 V.35 V.35 Z V.35 V.35 V.35 RS-449/V V.11 V.11 Z V.11 V.11 V.11 V.28/RS V.28 V.28 Z V.28 V.28 V.28 No Cable Z Z Z Z Z Z Not Used (Default V.11) 1 V.11 V.11 V.11 Z V.11 V.11 RS V.11 V.11 V.11 Z V.11 V.11 RS V.11 V.11 V.11 Z V.11 V.11 X V.11 V.11 V.11 Z V.11 V.11 V V.35 V.35 V.35 Z V.35 V.35 RS-449/V V.11 V.11 V.11 Z V.11 V.11 V.28/RS V.28 V.28 V.28 Z V.28 V.28 No Cable Z Z Z Z Z Z 23

24 Table 2. MX13173E Mode Selection PROTOCOL M2 M1 M Not Used (Default V.11) DCE/ DTE INVER T T1 T2 T3 R1 R2 R3 T4 R4 T5 R5 V.11 V.11 Z V.11 V.11 V.11 Z V.1 Z V.1 RS-53 1 V.11 V.1 Z V.11 V.1 V.11 Z V.1 Z V.1 RS-53 1 V.11 V.11 Z V.11 V.11 V.11 Z V.1 Z V.1 X V.11 V.11 Z V.11 V.11 V.11 Z V.1 Z V.1 V.35 1 V.28 V.28 Z V.28 V.28 V.28 Z V.28 Z V.28 RS-449/V V.11 V.11 Z V.11 V.11 V.11 Z V.1 Z V.1 V.28/RS V.28 V.28 Z V.28 V.28 V.28 Z V.28 Z V.28 No Cable Z Z Z Z Z Z Z Z Z Z Not Used (Default V.11) 1 V.11 V.11 Z V.11 V.11 V.11 V.1 Z V.1 Z RS V.11 V.1 Z V.11 V.1 V.11 V.1 Z V.1 Z RS V.11 V.11 Z V.11 V.11 V.11 V.1 Z V.1 Z X V.11 V.11 Z V.11 V.11 V.11 V.1 Z V.1 Z V V.28 V.28 Z V.28 V.28 V.28 V.28 Z V.28 Z RS-449/V V.11 V.11 Z V.11 V.11 V.11 V.1 Z V.1 Z V.28/RS V.28 V.28 Z V.28 V.28 V.28 V.28 Z V.28 Z No Cable Z Z Z Z Z Z Z Z Z Z Not Used (Default V.11) 1 V.11 V.11 V.11 Z V.11 V.11 V.1 Z V.1 Z RS V.11 V.1 V.11 Z V.1 V.11 V.1 Z V.1 Z RS V.11 V.11 V.11 Z V.11 V.11 V.1 Z V.1 Z X V.11 V.11 V.11 Z V.11 V.11 V.1 Z V.1 Z V V.28 V.28 V.28 Z V.28 V.28 V.28 Z V.28 Z RS-449/V V.11 V.11 V.11 Z V.11 V.11 V.1 Z V.1 Z V.28/RS V.28 V.28 V.28 Z V.28 V.28 V.28 Z V.28 Z No Cable Z Z Z Z Z Z Z Z Z V.1 Not Used (Default V.11) 1 1 V.11 V.11 V.11 Z V.11 V.11 Z V.1 Z V.1 RS V.11 V.1 V.11 Z V.1 V.11 Z V.1 Z V.1 RS V.11 V.11 V.11 Z V.11 V.11 Z V.1 Z V.1 X V.11 V.11 V.11 Z V.11 V.11 Z V.1 Z V.1 V V.28 V.28 V.28 Z V.28 V.28 Z V.28 Z V.28 RS-449/V V.11 V.11 V.11 Z V.11 V.11 Z V.1 Z V.1 V.28/RS V.28 V.28 V.28 Z V.28 V.28 Z V.28 Z V.28 No Cable Z Z Z Z Z Z Z Z Z Z 24

25 s shown in Figure 16, in V.11 mode, switch S1 is closed and switch S2 is open, presenting 14Ω across terminals and B. In V.35 mode, switches S1 and S2 are both closed, presenting a T-network with 14Ω differential impedance and 153Ω common-mode impedance. In high-impedance mode, switches S1 and S2 are both open, presenting a high impedance across terminals and B suitable for V.28 and V.1 modes. B R1 52Ω S1 CLOSED R2 52Ω S2 OPEN MX13175E Figure 16. Termination Modes R3 127Ω C B R1 52Ω S1 CLOSED S2 CLOSED R2 52Ω The state of the MX13175E s mode-select inputs, M, M1, M2, and DCE/DTE determines the mode of each of the six termination networks. Table 3 shows a cross-reference of termination mode and select input state for each of the six termination networks within the MX13175E. MX13175E R3 127Ω (a) V.11 (b) V.35 (c) Z Table 3. MX13175E Termination Mode Selection C B R1 52Ω S1 OPEN S2 OPEN R2 52Ω MX13175E PROTOCOL DCE/DTE M2 M1 M R1 R2 R3 R4 R5 R6 V.1/RS-423 Z Z Z Z Z Z RS-53 1 Z Z Z V.11 V.11 V.11 RS-53 1 Z Z Z V.11 V.11 V.11 X Z Z Z V.11 V.11 V.11 V.35 1 V.35 V.35 Z V.35 V.35 V.35 RS-449/V Z Z Z V.11 V.11 V.11 V.28/RS Z Z Z Z Z Z No Cable V.11 V.11 V.11 V.11 V.11 V.11 V.1/RS Z Z Z Z Z Z RS Z Z Z Z V.11 V.11 RS Z Z Z Z V.11 V.11 X Z Z Z Z V.11 V.11 V V.35 V.35 V.35 Z V.35 V.35 RS-449/V Z Z Z Z V.11 V.11 V.28/RS Z Z Z Z Z Z No Cable V.11 V.11 V.11 V.11 V.11 V.11 R3 127Ω C 25

26 No-Cable Mode The MX13171E/MX13173E enter no-cable mode when the mode-select inputs are left unconnected or connected high (M = M1 = M2 = 1). The receiver outputs enter a high-impedance state in no-cable mode, allowing these output lines to be shared with other receiver outputs (the receiver outputs have an internal pullup resistor to pull the outputs high if not driven). lso, in no-cable mode, the transmitter outputs enter a high-impedance state, so these output lines can be shared with other devices. The MX13175E enters no-cable mode when the mode select inputs, M, M1, and M2 are connected high. In no-cable mode, all six termination networks are placed in V.11 mode, with S1 closed and S2 open. V L Logic Supply The include a V L logic supply that allows user-defined interface logicvoltage levels referenced to V L. V L can go down to +1.62V and up to V CC. ll logic inputs and outputs are referred to V L. Data Rate The support a maximum data rate of 4Mbps in RS-449/V.36, RS-53, RS-53, X.21, V.35 if only one of the MX13171E high-speed transceivers is operated at the maximum data rate. If two high-speed transceivers operate simultaneously, the maximum data rate is 2Mbps. pplications Information Capacitor Selection The capacitors used for the charge pumps, as well as for supply bypassing, must have a low equivalent series resistance (ESR), low inductance (ESL), and low temperature coefficient. Multilayer ceramic capacitors with an X7R dielectric offer the best combination of performance, size, and cost. The flying capacitors (C1, C2) should have a value of 1µF, while the bypass capacitor (C4) and reservoir capacitors (C3, C5) should have a minimum value of (Figure 15). To reduce the ripple present on the transmitter outputs, capacitors C3, C4, and C5 can be increased. The values of C1 and C2 should not be increased. Cable Mode-Select pplication cable-selectable multiprotocol interface is shown in Figure 17. The mode control lines M, M1, and DCE/DTE are wired to the DB-25 connector. To select the serial interface mode, the appropriate combination of M, M1, and DCE/DTE are grounded within the cable wiring. The control lines that are not grounded are pulled high by the internal pullups on the MX13171E/MX13173E. The serial interface protocol of the MX13171E/ MX13173E/MX13175E is selected based on the cable that is connected to the DB-25 interface. V.1 (RS-423) Interface (MX13173E Only) The V.1 interface (Figure 18) is an unbalanced singleended interface capable of driving a 45Ω load. The V.1 driver generates a minimum V O voltage of ±4V across and C when unloaded, and a minimum voltage of.9 x V O when loaded with 45Ω. The V.1 receiver has a single-ended input and does not reject common-mode differences between C and C. The V.1 receiver-input trip threshold is defined between +5mV and +25mV with input impedance characteristic shown in Figure 19. The MX13173E V.1 mode receiver has a threshold between +5mV and +25mV. To ensure that the receiver has proper fail-safe operation, see the Fail- Safe section. To aid in rejecting system noise, the MX13173E V.1 receiver has a typical hysteresis of 25mV. Switch S3 in Figures 2a and 2b is open in V.1 mode to disable the V.28 5kΩ termination at the receiver input. Switch S4 is closed and switch S5 is open to internally ground the receiver B input. 26

27 C4 DTE_TXD/DCE_RXD DTE_SCTE/DCE_RXC DTE_TXC/DCE_TXC DTE_RXC/DCE_SCTE DTE_RXD/DCE_TXD V L DTE_RTS/DCE_CTS DTE_DTR/DCE_DSR DTE_DCD/DCE_DCD DTE_DSR/DCE_DTR DTE_CTS/DCE_RTS.1µF C4 C1 1µF C3 C1 1µF C3 T1IN T2IN T3IN NC V DD R1OUT R2OUT R3OUT V DD T1IN T2IN T3IN R1OUT R2OUT R3OUT CHRGE PUMP T1 T2 T3 V CC R1 R2 R3 MX13171E M M1 M2 DCE/DTE CHRGE PUMP T1 T2 T3 V CC R1 R2 R3 C2 1µF C5 T1OUT T1OUTB T2OUT T2OUTB.1µF T3OUT/R1IN T3OUTB/R1INB R2IN R2INB R3IN R3INB C2 1µF C5 T1OUT T1OUTB T2OUT T2OUTB T3OUT/R1IN T3OUTB/R1INB R2IN R2INB R3IN R3INB.1µF V CC V DD.1µF R1 R1B R2 R2B R3 R3B R4 R4B R5 R5B R6 R6B MX13175E DCE/DTE M2 V L LTCH M1 M DCE/DTE 21 M1 18 M V L.1µF DTE TXD TXD B SCTE SCTE B TXC TXC B RXC RXC B RXD RXD B SG SHIELD RTS RTS B DTR DTR B DCD DCD B DSR DSR B CTS CTS B DCE RXD RXD B RXC RXC B TXC TXC B SCTE SCTE B TXD TXD B DB-25 CONNECTOR CTS CTS B DSR DSR B DCD DCD B DTR DTR B RTS RTS B T4IN T4 T4OUT/R4IN R4OUT R4 R5OUT/T5IN T5 T5OUT/R5IN V L.1µF NC R5 MX13173E M M1 M2 DCE/DTE INVERT Figure 17. Cable-Selectable Multiprotocol DCE/DTE Port with DB-25 Connector 27

28 GENERTOR Figure 18. Typical V.1/V.28 Interface -1V C -3.25m Figure 19. Receiver Input Impedance Curve R8 5kΩ R5 55kΩ R6 11kΩ MX13171E MX13173E RECEIVER UNBLNCED INTERCONNECTING CBLE -3V I Z C +3V CBLE TERMINTION LOD +3.25m V Z +1V R8 5kΩ R5 55kΩ R6 11kΩ RECEIVER MX13173E RECEIVER S3 S3 + - B B 1.4V R7 11kΩ R4 55kΩ S1 C S2 C Figure 2a. V.1 Internal Resistance Network for Receivers 1, 2, and 3 Figure 2b. V.1 Internal Resistance Network for Receivers 4 and 5 28

29 GENERTOR B C BLNCED INTERCONNECTING CBLE Figure 21. Typical V.11 Interface R1 52Ω LOD CBLE TERMINTION 1Ω MIN B C MX13175E RECEIVER V.11 (RS-422) Interface s shown in Figure 21, the V.11 protocol is a fully balanced differential interface. The V.11 driver generates a minimum of ±2V between nodes and B when a 1Ω (min) resistance is present at the load. The V.11 receiver is sensitive to differential signals of ±2mV at receiver inputs and B. The V.11 receiver input must comply with the impedance curve of Figure 22 and reject common-mode signals developed across the cable (referenced from C to C in Figure 21) of up to ±7V. The MX13171E/MX13173E V.11 mode receivers have a differential threshold between -5mV and -2mV to ensure that the receiver has fail-safe operation (see the Fail-Safe section.) To aid in rejecting system noise, the MX13171E/MX13173E V.11 receivers have a typical hysteresis of 15mV. Switch S3 in Figure 23 is open in V.11 mode to disable the V.28 5kΩ termination at the inverting receiver input. Because the control signals are slow (6kbps), 1Ω termination resistance is generally not required for the MX13173E. For high-speed data transmission, the V.11 specification recommends terminating the cable at the receiver with a 1Ω resistor. This resistor, although not required, prevents reflections from corrupting transmitted data. In Figure 23, the MX13175E is used to terminate the V.11 receiver. Internal to the MX13175E, S1 is closed and S2 is open to present a 1Ω minimum differential resistance. The MX13171E s internal V.28 termination is disabled by opening S3. R8 5kΩ -1V -3.25m R5 55kΩ R6 11kΩ -3V Figure 22. Receiver Input Impedance I Z MX13171E RECEIVER +3V +3.25m V Z +1V S1 S2 R3 127Ω S3 + - B R2 52Ω B 1.4V R7 R4 11kΩ 55kΩ S1 C S2 Figure 23. V.11 Termination and Internal Resistance Networks 29

30 V.28 (RS-232) Interface The V.28 interface is an unbalanced single-ended interface (Figure 18). The V.28 driver generates a minimum of ±5V across the 3kΩ load impedance between and C. The V.28 receiver has a single-ended input. The MX13171E/MX13173E V.28 mode receivers have a threshold between +.8V and +2.V. To aid in rejecting system noise, the MX13171E/MX13173E V.28 receivers have a typical hysteresis of 25mV. Switch S3 in Figures 24a and 24b is closed in V.28 mode to enable the 5kΩ V.28 termination at the receiver inputs. V.35 Interface Figure 25 shows a fully-balanced, differential standard V.35 interface. The generator and the load must both present a 1Ω ±1Ω differential impedance and a 15Ω ±15Ω common-mode impedance as shown by the resistive T-networks in Figure 26. The V.35 driver generates a current output (±11m, typ) that develops an output voltage of ±55mV across the generator and B B R8 5kΩ S3 R5 55kΩ + - R6 11kΩ 1.4V R7 11kΩ R4 55kΩ S1 MX13171E MX13173E RECEIVER load termination networks. The V.35 receiver is sensitive to ±2mV differential signals at receiver inputs and B. The V.35 receiver rejects common-mode signals developed across the cable (referenced from C to C ) of up to ±4V, allowing for error-free reception in noisy environments. In Figure 26, the MX13175E is used to implement the resistive T-network that is needed to properly terminate the V.35 driver and receiver. Internal to the MX13175E, S1 and S2 are closed to connect the T- network resistors to the circuit. The V.28 termination resistor (internal to the MX13171E) is disabled by opening S3 to avoid interference with the T-network impedance. The V.35 specification allows for ±4V of ground difference between the V.35 generator and V.35 load. The MX13174E maintains correct termination impedance over this condition. R8 5kΩ S3 R5 55kΩ R6 11kΩ MX13173E RECEIVER C S2 C Figure 24a. V.28 Termination and Internal Resistance Network for Receiver 1, 2, and 3 Figure 24b. V.28 Internal Resistance Network for Receiver 4 and 5 3

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