FEATURES DESCRIPTIO APPLICATIO S TYPICAL APPLICATIO LTC1481 Ultralow Power RS485 Transceiver with Shutdown

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Amanda Gibbs
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1 FETES Low Power: I CC = 12µ Max with Driver Disabled Drivers/eceivers Have ±1kV ESD Protection 1µ Quiescent Current in Shutdown Mode High Speed: p to 2.5Mbits/s Data ate I CC = 5µ Max with Driver Enabled, No Load Single 5V Supply 7V to 12V Common Mode ange Permits ±7V Ground Difference etween Devices on the Data Line Thermal Shutdown Protection Power p/down Glitch-Free Driver Outputs Permit Live Insertion or emoval of Transceiver Driver Maintains High Impedance in Three-State or with the Power Off p to 32 Transceivers on the us 3ns Typical Driver Propagation Delays with 5ns Skew Pin Compatible with the LTC485 PPLICTIO S attery-powered S485/S422 pplications Low Power S485/S422 Transceiver Level Translator DESCIPTIO LTC1481 ltralow Power S485 Transceiver with Shutdown The LTC 1481 is an ultralow power differential line transceiver designed for data transmission standard S485 applications. It will also meet the requirements of S422. The CMOS design offers significant power savings over its bipolar counterparts without sacrificing ruggedness against overload or ESD damage. Typical quiescent current is only 8µ while operating and less than 1µ in shutdown. The driver and receiver feature three-state outputs, with the driver outputs maintaining high impedance over the entire common mode range. Excessive power dissipation caused by bus contention or faults is prevented by a thermal shutdown circuit which forces the driver outputs into a high impedance state. The receiver has a fail-safe feature which guarantees a high output state when the inputs are left open. The LTC1481 is fully specified over the commercial and extended industrial temperature range and is available in 8-pin PDIP and SO packages., LTC and LT are registered trademarks of Linear Technology Corporation. TYPICL PPLICTIO 35 Supply Current vs Temperature O1 E1 DE1 DI1 O2 E2 DE2 DI2 D D 1 GND1 2 GND2 t t LTC1481 T1 SPPLY CENT (µ) DIVE ENLED DIVE DISLED THEML SHTDOWN WITH DIVE ENLED TEMPETE ( C) 1481 T2 1

2 SOLTE XI TI GS W W W (Note 1) Supply Voltage ( )... 12V Control Input Voltage....5V to +.5V Driver Input Voltage....5V to +.5V Driver Output Voltage... ±14V eceiver Input Voltage... ±14V eceiver Output Voltage....5V to +.5V Operating Temperature ange LTC1481C... C T 7 C LTC1481I... 4 C T 85 C Storage Temperature ange C to 15 C Lead Temperature (Soldering, 1 sec)... 3 C W PCKGE/ODE I FO TIO O E DE DI N8 PCKGE 8-LED PDIP TOP VIEW D GND S8 PCKGE 8-LED PLSTIC SO T JMX = 125 C, θ J = 13 C/ W (N8) T JMX = 125 C, θ J = 15 C/ W (S8) ODE PT NME LTC1481CN8 LTC1481IN8 LTC1481CS8 LTC1481IS8 S8 PT MKING I Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTICL CHCTEISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25 C. = 5V (Notes 2, 3) unless otherwise noted. SYMOL PMETE CONDITIONS MIN TYP MX NITS V OD1 Differential Driver Output Voltage (nloaded) I O = 5 V V OD2 Differential Driver Output Voltage (with Load) = 5Ω (S422) 2. V = 27Ω (S485), Figure V V OD Change in Magnitude of Driver Differential Output = 27Ω or = 5Ω, Figure 1.2 V Voltage for Complementary Output States V OC Driver Common Mode Output Voltage = 27Ω or = 5Ω, Figure 1 3 V V OC Change in Magnitude of Driver Common Mode = 27Ω or = 5Ω, Figure 1.2 V Output Voltage for Complementary Output States V IH Input High Voltage DE, DI, E 2 V V IL Input Low Voltage DE, DI, E.8 V I IN1 Input Current DE, DI, E ±2 µ I IN2 Input Current (, ) DE =, = V or 5.25V, V IN = 12V 1. m DE =, = V or 5.25V, V IN = 7V.8 m V TH Differential Input Threshold Voltage for eceiver 7V V CM 12V.2.2 V V TH eceiver Input Hysteresis V CM = V 45 mv V OH eceiver Output High Voltage I O = 4m, V ID = 2mV 3.5 V V OL eceiver Output Low Voltage I O = 4m, V ID = 2mV.4 V I OZ Three-State (High Impedance) Output = Max,.4V V O 2.4V ±1 µ Current at eceiver IN eceiver Input esistance 7V V CM 12V 12 kω I CC Supply Current No Load, Output Enabled 3 5 µ No Load, Output Disabled 8 12 µ I SHDN Supply Current in Shutdown Mode DE =, E = 1 1 µ I OSD1 Driver Short-Circuit Current, V OT = HIGH 7V V O 12V m I OSD2 Driver Short-Circuit Current, V OT = LOW 7V V O 12V m I OS eceiver Short-Circuit Current V V O 7 85 m 2

3 SWITCHI G CHCTEISTICS The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at T = 25 C. = 5V (Notes 2, 3) unless otherwise noted. LTC1481 SYMOL PMETE CONDITIONS MIN TYP MX NITS t PLH Driver Input to Output DIFF = 54Ω, C L1 = C L2 = 1pF, ns t PHL Driver Input to Output (Figures 3, 5) ns t SKEW Driver Output to Output 5 1 ns t r, t f Driver ise or Fall Time ns t ZH Driver Enable to Output High C L = 1pF (Figures 4, 6), S2 Closed 4 7 ns t ZL Driver Enable to Output Low C L = 1pF (Figures 4, 6), S1 Closed 4 7 ns t LZ Driver Disable Time from Low C L = 15pF (Figures 4, 6), S1 Closed 4 7 ns t HZ Driver Disable Time from High C L = 15pF (Figures 4, 6), S2 Closed 4 7 ns t PLH eceiver Input to Output DIFF = 54Ω, C L1 = C L2 = 1pF, ns t PHL eceiver Input to Output (Figures 3, 7) ns t SKD t PLH t PHL Differential eceiver Skew 13 ns t ZL eceiver Enable to Output Low C L = 15pF (Figures 2, 8), S1 Closed 2 5 ns t ZH eceiver Enable to Output High C L = 15pF (Figures 2, 8), S2 Closed 2 5 ns t LZ eceiver Disable from Low C L = 15pF (Figures 2, 8), S1 Closed 2 5 ns t HZ eceiver Disable from High C L = 15pF (Figures 2, 8), S2 Closed 2 5 ns f MX Maximum Data ate 2.5 Mbits/s t SHDN Time to Shutdown DE =, E = ns t ZH(SHDN) Driver Enable from Shutdown to Output High C L = 1pF (Figures 4, 6), S2 Closed 4 1 ns t ZL(SHDN) Driver Enable from Shutdown to Output Low C L = 1pF (Figures 4, 6), S1 Closed 4 1 ns t ZH(SHDN) eceiver Enable from Shutdown to Output High C L = 15pF (Figures 2, 8), S2 Closed 35 ns t ZL(SHDN) eceiver Enable from Shutdown to Output Low C L = 15pF (Figures 2, 8), S1 Closed 35 ns Note 1: bsolute Maximum atings are those values beyond which the life of the device may be impaired. Note 2: ll currents into device pins are positive; all currents out of device pins are negative. ll voltages are referenced to device ground unless otherwise specified. Note 3: ll typicals are given for = 5V and T = 25 C. TYPICL PEFO CE CHCTEISTICS W OTPT CENT (m) Driver Differential Output Voltage vs Output Current T = 25 C OTPT VOLTGE (V) DIFFEENTIL VOLTGE (V) Driver Differential Output Voltage vs Temperature L = 54Ω TEMPETE ( C) 1481 G G2 OTPT CENT (m) Driver Output Low Voltage vs Output Current T = 25 C OTPT VOLTGE (V) G3 3

4 TYPICL PEFO CE CHCTEISTICS W OTPT CENT (m) Driver Output High Voltage vs Output Current T = 25 C TIME (ns) eceiver t PLH t PHL vs Temperature TIME (ns) Driver Skew vs Temperature OTPT VOLTGE (V) TEMPETE ( C) TEMPETE ( C) 1481 G G G5 PI F CTIO S O (Pin 1): eceiver Output. If the receiver output is enabled (E low), then if > by 2mV, O will be high. If < by 2mV, then O will be low. E (Pin 2): eceiver Output Enable. low enables the receiver output, O. high input forces the receiver output into a high impedance state. DE (Pin 3): Driver Outputs Enable. high on DE enables the driver output., and the chip will function as a line driver. low input will force the driver outputs into a high impedance state and the chip will function as a line receiver. If E is high and DE is low, the part will enter a low power (1µ) shutdown state. DI (Pin 4): Driver Input. If the driver outputs are enabled (DE high) then a low on DI forces the outputs low and high. high on DI with the driver outputs enabled will force high and low. GND (Pin 5): Ground. (Pin 6): Driver Output/eceiver Input. (Pin 7): Driver Output/eceiver Input. (Pin 8): Positive Supply. 4.75V < < 5.25V. F CTIO TLES LTC1481 Transmitting INPTS OTPTS E DE DI X X 1 1 X Z Z 1 X Z* Z* *Shutdown mode for LTC1481 LTC1481 eceiving INPTS OTPTS E DE O.2V 1.2V Inputs Open 1 1 X Z* *Shutdown mode for LTC1481 4

5 TEST CICITS V OD LTC1481 F1 V OC ECEIVE OTPT TEST POINT C L 1k S1 S2 1k LTC1481 F2 Figure 1. Driver DC Test Load Figure 2. eceiver Timing Test Load 3V DI DE DIFF C L1 C L2 E O 15pF OTPT NDE TEST 5Ω C L S1 S2 Figure 3. Driver/eceiver Timing Test Circuit LTC1481 F3 LTC1481 F4 Figure 4. Driver Timing Test Load W W SWITCHI G TI E WVEFO S DI 3V V f = 1MHz, t r 1ns, t f 1ns t PLH t PHL 1/2 V O V O V V O V O 1/2 VO 1% t r t SKEW 9% V DIFF = V() V() t f t SKEW 9% 1% LTC1481 F5 Figure 5. Driver Propagation Delays DE 3V V f = 1MHz, t r 1ns, t f 1ns 5V, V OL t ZL(SHDN), t ZL 2.3V OTPT NOMLLY LOW t LZ.5V V OH, V 2.3V t ZH(SHDN), t ZH OTPT NOMLLY HIGH t HZ.5V LTC1481 F6 Figure 6. Driver Enable and Disable Times 5

6 W W SWITCHI G TI E WVEFO S V OH O OTPT V OL t PHL f = 1MHz, t r 1ns, t f 1ns t PLH V OD2 V INPT V V OD2 LTC1481 F7 Figure 7. eceiver Propagation Delays E 3V V f = 1MHz, t r 1ns, t f 1ns O 5V t ZL(SHDN), t ZL OTPT NOMLLY LOW t LZ.5V O V t ZH(SHDN), t ZH OTPT NOMLLY HIGH t HZ.5V LTC1481 F8 Figure 8. eceiver Enable and Disable Times PPLICTIO S I FO TIO asic Theory of Operation Traditionally, S485 transceivers have been designed using bipolar technology because the common mode range of the device must extend beyond the supplies and the device must be immune to ESD damage and latch-up. nfortunately, most bipolar devices draw a large amount of supply current, which is unacceptable for the numerous applications that require low power consumption. The LTC1481 is a CMOS S485/S422 transceiver which features ultralow power consumption without sacrificing ESD and latch-up immunity. The LTC1481 uses a proprietary driver output stage, which allows a common mode range that extends beyond the power supplies while virtually eliminating latch-up and providing excellent ESD protection. Figure 9 shows the LTC1481 output stage while Figure 1 shows a conventional CMOS output stage. When the conventional CMOS output stage of Figure 1 enters a high impedance state, both the P-channel (P1) and the N-channel (N1) are turned off. If the output is then driven above or below ground, the P+/N-well diode 6 W (D1) or the N+/P-substrate diode (D2) respectively will turn on and clamp the output to the supply. Thus, the output stage is no longer in a high impedance state and is not able to meet the S485 common mode range requirement. In addition, the large amount of current flowing through either diode will induce the well-known CMOS latch-up condition, which could destroy the device. The LTC1481 output stage of Figure 9 eliminates these problems by adding two Schottky diodes, SD3 and SD4. The Schottky diodes are fabricated by a proprietary modification to the standard N-well CMOS process. When the output stage is operating normally, the Schottky diodes are forward biased and have a small voltage drop across them. When the output is in the high impedance state and is driven above or below ground, the parasitic diode D1 or D2 still turns on, but SD3 or SD4 will reverse bias and prevent current from flowing into the N-well or the substrate. Thus the high impedance state is maintained even with the output voltage beyond the supplies. With no minority carrier current flowing into the N-well or substrate, latch-up is virtually eliminated under power-up or power-down conditions.

7 PPLICTIO S I FO TIO LOGIC LOGIC W P1 N1 SD3 SD4 D1 D2 ESD Figure 9. LTC1481 Output Stage P1 N1 D1 OTPT D2 LTC1481 F1 OTPT LTC1481 F9 Figure 1. Conventional CMOS Output Stage The LTC1481 output stage will maintain a high impedance state until the breakdown of the N-channel or P-channel is reached when going positive or negative respectively. The output will be clamped to either or ground by a Zener voltage plus a Schottky diode drop, but this voltage is well beyond the S485 operating range. ecause the ESD injected current in the N-well or substrate consists of majority carriers, latch-up is prevented by careful layout techniques. n ESD cell protects output against multiple 1kV human body model ESD strikes. Low Power Operation The LTC1481 is designed to operate with a quiescent current of 12µ max. With the driver in three-state, I CC will drop to this 12µ level. With the driver enabled there will be additional current drawn by the internal 12k resistor. nder normal operating conditions this additional current is overshadowed by the current drawn by the external bus impedance. Shutdown Mode oth the receiver output (O) and the driver outputs (, ) can be placed in three-state mode by bringing E high and DE low respectively. In addition, the LTC1481 will enter shutdown mode when E is high and DE is low. In shutdown the LTC1481 typically draws only 1µ of supply current. In order to guarantee that the part goes into shutdown, DE must be low and E must be high for at least 6ns simultaneously. If this time duration is less than 5ns the part will not enter shutdown mode. Toggling either E or DE will wake the LTC1481 back up within 3.5µs. Propagation Delay Many digital encoding schemes are dependent upon the difference in the propagation delay times of the driver and receiver. Figure 11 shows the test circuit for the LTC1481 propagation delay. The receiver delay times are: t PLH t PHL = 13ns Typ, = 5V The drivers skew times are: Skew = 5ns Typ, = 5V 1ns Max, = 5V, T = 4 C to 85 C TTL IN t r, t f < 6ns D 1pF 54Ω 1pF ECEIVE OT LTC1481 F11 Figure 11. eceiver Propagation Delay Test Circuit Information furnished by Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Technology Corporation makes no representation that the interconnection of circuits as described herein will not infringe on existing patent rights. 7

8 PCKGE DESCIPTIO N8 Package 8-Lead PDIP (Narrow.3 Inch) (eference LTC DWG # ) ( ) ( ).13 ±.5 (3.32 ±.127).4* (1.16) MX ( ) ( ).65 (1.651) TYP.1 (2.54) SC.12 (3.48) MIN.18 ±.3 (.457 ±.76).2 (.58) MIN.255 ±.15* (6.477 ±.381) N8 12 NOTE: INCHES 1. DIMENSIONS E MILLIMETES *THESE DIMENSIONS DO NOT INCLDE MOLD FLSH O POTSIONS. MOLD FLSH O POTSIONS SHLL NOT EXCEED.1 INCH (.254mm) S8 Package 8-Lead Plastic Small Outline (Narrow.15 Inch) (eference LTC DWG # ).8.1 ( ).1.2 ( ) 45 8 TYP ( ).4.1 ( ) ( ) NOTE N N.5 SC.45 ± ( ) ( ) NOTE: INCHES TYP 1. DIMENSIONS IN (MILLIMETES) 2. DWING NOT TO SCLE 3. THESE DIMENSIONS DO NOT INCLDE MOLD FLSH O POTSIONS. MOLD FLSH O POTSIONS SHLL NOT EXCEED.6" (.15mm).5 (1.27) SC ( ) 1 N/ ( ) NOTE 3 SO MIN.3 ±.5 TYP N/2 ECOMMENDED SOLDE PD LYOT.16 ±.5 ELTED PTS PT NME DESCIPTION COMMENTS LTC486 Quad S485 Driver Fits Pinout, Only 11µ I Q LTC488 Quad S485 eceiver Fits Pinout, Only 7µ I Q LTC49 Full Duplex S485 Transceiver Fits Pinout, Only 3µ I Q LTC1485 Differential us Transceiver Fits Pinout, Only 1.7m I Q 8 LT/TP 33 1K EV PINTED IN S LINE TECHNOLOGY COPOTION 1994 Linear Technology Corporation 163 McCarthy lvd., Milpitas, C (48) FX: (48)

APPLICATIO S. LTC485 Low Power RS485 Interface Transceiver FEATURES DESCRIPTIO TYPICAL APPLICATIO

APPLICATIO S. LTC485 Low Power RS485 Interface Transceiver FEATURES DESCRIPTIO TYPICAL APPLICATIO Low Power S85 Interface Transceiver FETES Low Power: I CC = 3µ Typ Designed for S85 Interface pplications Single 5V supply 7V to 12V us Common Mode ange Permits ±7V Ground Difference etween Devices on