5 V Low Power EIA RS-485 Transceiver ADM485

Transcription

1 a FETUES Meets EI S-485 Standard 5 Mbps Data ate Single 5 V Supply 7 V to +12 V us Common-Mode ange High Speed, Low Power icmos Thermal Shutdown Protection Short-Circuit Protection Driver Propagation Delay: 1 ns eceiver Propagation Delay: 15 ns High Z Outputs with Power Off Superior Upgrade for LTC485 PPLICTIONS Low Power S-485 Systems DTE-DCE Interface Packet Switching Local rea Networks Data Concentration Data Multiplexers Integrated Services Digital Network (ISDN) 5 V Low Power EI S-485 Transceiver DM485 FUNCTIONL LOCK DIGM DM485 O E DE V CC DI D GND GENEL DESCIPTION The DM485 is a differential line transceiver suitable for high speed bidirectional data communication on multipoint bus transmission lines. It is designed for balanced data transmission and complies with EI Standards S-485 and S-422. The part contains a differential line driver and a differential line receiver. oth the driver and the receiver may be enabled independently. When disabled, the outputs are three-stated. The DM485 operates from a single 5 V power supply. Excessive power dissipation caused by bus contention or by output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if during fault conditions a significant temperature increase is detected in the internal driver circuitry. Up to 32 transceivers may be connected simultaneously on a bus, but only one driver should be enabled at any time. It is important, therefore, that the remaining disabled drivers do not load the bus. To ensure this, the DM485 driver features high output impedance when disabled and when powered down. This minimizes the loading effect when the transceiver is not being used. The high impedance driver output is maintained over the entire common-mode voltage range from 7 V to +12 V. The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The DM485 is fabricated on icmos, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. ll inputs and outputs contain protection against ESD; all driver outputs feature high source and sink current capability. n epitaxial layer is used to guard against latch-up. The DM485 features extremely fast switching speeds. Minimal driver propagation delays permit transmission at data rates up to 5 Mbps while low skew minimizes EMI interference. The part is fully specified over the commercial and industrial temperature range and is available in PDIP, SOIC, and small footprint MSOP packages. Information furnished by nalog Devices is believed to be accurate and reliable. However, no responsibility is assumed by nalog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of nalog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. ox 916, Norwood, M , U.S.. Tel: 781/ Fax: 781/ nalog Devices, Inc. ll rights reserved.

2 DM485 SPECIFICTIONS (V CC = 5 V 5%. ll specifications T MIN to T MX, unless otherwise noted.) Parameter Min Typ Max Unit Test Conditions/Comments DIVE Differential Output Voltage, V OD 5. V =, Test Circuit V V CC = 5 V, = 5 Ω (S-422), Test Circuit V = 27 Ω (S-485), Test Circuit 1 V OD V V TST = 7 V to +12 V, Test Circuit 2 V OD for Complementary Output States.2 V = 27 Ω or 5 Ω, Test Circuit 1 Common-Mode Output Voltage, V OC 3 V = 27 Ω or 5 Ω, Test Circuit 1 V OD for Complementary Output States.2 V = 27 Ω or 5 Ω Output Short-Circuit Current (V OUT = High) m 7 V V O +12 V Output Short-Circuit Current (V OUT = Low) m 7 V V O +12 V CMOS Input Logic Threshold Low, V INL.8 V CMOS Input Logic Threshold High, V INH 2. V Logic Input Current (DE, DI) ±1. µ ECEIVE Differential Input Threshold Voltage, V TH V 7 V V CM +12 V Input Voltage Hysteresis, V TH 7 mv V CM = V Input esistance 12 kω 7 V V CM +12 V Input Current (, ) 1 m V IN = 12 V.8 m V IN = 7 V CMOS Input Logic Threshold Low, V INL.8 V CMOS Input Logic Threshold High, V INH 2. V Logic Enable Input Current (E) ± 1 µ CMOS Output Voltage Low, V OL.4 V I OUT = +4. m CMOS Output Voltage High, V OH 4. V I OUT = 4. m Short-Circuit Output Current 7 85 m V OUT = GND or V CC Three-State Output Leakage Current ±1. µ.4 V V OUT 2.4 V POWE SUPPLY CUENT I CC (Outputs Enabled) m Digital Inputs = GND or V CC I CC (Outputs Disabled).6 1 m Digital Inputs = GND or V CC Specifications subject to change without notice. TIMING SPECIFICTIONS Parameter Min Typ Max Unit Test Conditions/Comments DIVE Propagation Delay Input to Output t PLH, t PHL ns LDIFF = 54 Ω, C L1 = C L2 = 1 pf, Test Circuit 3 Driver O/P to O/P, t SKEW 1 5 ns LDIFF = 54 Ω, C L1 = C L2 = 1 pf, Test Circuit 3 Driver ise/fall Time, t, t F 8 15 ns LDIFF = 54 Ω, C L1 = C L2 = 1 pf, Test Circuit 3 Driver Enable to Output Valid 1 25 ns L = 11 Ω, C L = 5 pf, Test Circuit 4 Driver Disable Timing 1 25 ns L = 11 Ω, C L = 5 pf, Test Circuit 4 Matched Enable Switching 2 ns L = 11 Ω, C L = 5 pf, Test Circuit 4* t ZH t ZL, t ZH t ZL Matched Disable Switching 2 ns L = 11 Ω, C L = 5 pf, Test Circuit 4* t HZ t LZ, t HZ t LZ ECEIVE Propagation Delay Input to Output, t PLH, t PHL ns C L = 15 pf, Test Circuit 5 Skew t PLH t PHL 5 ns C L = 15 pf, Test Circuit 5 eceiver Enable, t EN1 5 2 ns C L = 15 pf, L = 1 kω, Test Circuit 6 eceiver Disable, t EN2 5 2 ns C L = 15 pf, L = 1 kω, Test Circuit 6 Tx Pulse Width Distortion 1 ns x Pulse Width Distortion 1 ns *Guaranteed by characterization. Specifications subject to change without notice. (V CC = 5 V 5%. ll specifications T MIN to T MX, unless otherwise noted.) 2

3 DM485 SOLUTE MXIMUM TINGS* (T = 25 C, unless otherwise noted.) V CC V to +7 V Inputs Driver Input (DI) V to V CC +.3 V Control Inputs (DE, E) V to V CC +.3 V eceiver Inputs (, ) V to +14 V Outputs Driver Outputs (, ) V to +14 V eceiver Output V to V CC +.5 V Power Dissipation 8-Lead MSOP mw θ J, Thermal Impedance C/W Power Dissipation 8-Lead PDIP mw θ J, Thermal Impedance C/W Power Dissipation 8-Lead SOIC mw θ J, Thermal Impedance C/W Operating Temperature ange Commercial (J Version) C to 7 C Industrial ( Version) C to +85 C Storage Temperature ange C to +15 C Lead Temperature (Soldering, 1 sec) C Vapor Phase (6 sec) C Infrared (15 sec) C *Stresses above those listed under bsolute Maximum atings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum ratings for extended periods of time may affect device reliability. Inputs Table I. Transmitting Outputs DE DI X Z Z Table II. eceiving Inputs Output E O +.2 V 1.2 V Inputs Open 1 1 X Z ODEING GUIDE Model Temperature ange Package Option randing DM485N 4 C to +85 C N-8 DM485 4 C to +85 C -8 DM485-EEL 4 C to +85 C -8 DM485Z* 4 C to +85 C -8 DM485Z-EEL* 4 C to +85 C -8 DM485M 4 C to +85 C M-8 M41 DM485M-EEL 4 C to +85 C M-8 M41 DM485M-EEL7 4 C to +85 C M-8 M41 DM485JN C to 7 C N-8 DM485J C to 7 C -8 DM485J-EEL C to 7 C -8 DM485J-EEL7 C to 7 C -8 DM485JZ* C to 7 C -8 DM485JZ-EEL* C to 7 C -8 DM485JZ-EEL7* C to 7 C -8 *Z = Lead Free. CUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4 V readily accumulate on the human body and test equipment and can discharge without detection. lthough the DM485 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. 3

4 DM485 PIN CONFIGUTION O E DE DI DM485 7 TOP VIEW (Not to Scale) 6 5 V CC GND PIN FUNCTION DESCIPTIONS Pin No. Mnemonic Function 1 O eceiver Output. When enabled, if > by 2 mv, then O = High. If < by 2 mv, then O = Low. 2 E eceiver Output Enable. low level enables the receiver output, O. high level places it in a high impedance state. 3 DE Driver Output Enable. high level enables the driver differential outputs, and. low level places it in a high impedance state. 4 DI Driver Input. When the driver is enabled, a Logic Low on DI forces low and high while a Logic High on DI forces high and low. 5 GND Ground Connection, V. 6 Noninverting eceiver Input /Driver Output. 7 Inverting eceiver Input /Driver Output. 8 V CC Power Supply, 5 V ± 5%. 4

5 DM485 Test Circuits V CC V OD V OC V O 3V DE S1 C L L V OUT S2 DE IN Test Circuit 1. Driver Voltage Measurement Test Circuit 4. Driver Enable/Disable 375 V OD3 6 V TST E V OUT 375 C L Test Circuit 2. Driver Voltage Measurement Test Circuit 5. eceiver Propagation Delay LDIFF C L1 C L2 + S1 E C L L V OUT V CC S2 E IN Test Circuit 3. Driver Propagation Delay Test Circuit 6. eceiver Enable/Disable Switching Characteristics 3V V 1/2VO t PLH t PHL, V V V O V O V V O 9% POINT 1% POINT t t SKEW = t PLH t PHL 9% POINT t F 1% POINT O t PLH t SKEW = t PLH t PHL t PHL V OH V OL Figure 1. Driver Propagation Delay, ise/fall Timing Figure 3. eceiver Propagation Delay 3V 3V DE E V V t ZL t LZ t ZL t LZ,, t ZH 2.3V 2.3V t HZ V OL +.5V V OH.5V V OL V OH V t ZH O/P LOW O/P HIGH t HZ V OL +.5V V OH.5V V OL V OH V Figure 2. Driver Enable/Disable Timing 5 Figure 4. eceiver Enable/Disable Timing

6 DM485 Typical Performance Characteristics I = 8m OUTPUT CUENT m OUTPUT VOLTGE V OUTPUT VOLTGE V TEMPETUE C TPC 1. Output Current vs. eceiver Output Low Voltage TPC 4. eceiver Output Low Voltage vs. Temperature OUTPUT CUENT m OUTPUT CUENT m OUTPUT VOLTGE V TPC 2. Output Current vs. eceiver Output High Voltage OUTPUT VOLTGE V TPC 5. Output Current vs. Driver Differential Output Voltage OUTPUT VOLTGE V I = 8m DIFFEENTIL VOLTGE V TEMPETUE C TEMPETUE C TPC 3. eceiver Output High Voltage vs. Temperature TPC 6. Driver Differential Output Voltage vs. Temperature, L = 26.8 Ω 6

7 DM OUTPUT CUENT m TIME ns t PLH t PHL OUTPUT VOLTGE V TPC 7. Output Current vs. Driver Output Low Voltage TEMPETUE C TPC 1. x Skew vs. Temperature OUTPUT CUENT m OUTPUT VOLTGE V TPC 8. Output Current vs. Driver Output High Voltage TIME ns t PHL t PHL t PLH t PLH TEMPETUE C TPC 11. Tx Skew vs. Temperature SUPPLY CUENT m DIVE ENLED DIVE DISLED PWD t PLH t PHL TEMPETUE C TEMPETUE C 15 TPC 9. Supply Current vs. Temperature TPC 12. Tx Pulse Width Distortion 7

8 DM485 4 DI 1, 2 1, 2 3 O TPC 13. Unloaded Driver Differential Outputs TPC 16. Driver/eceiver Propagation Delays High to Low 1, 2 1, 2 TPC 14. Loaded Driver Differential Outputs TPC 17. Driver Output at 3 Mbps DI 4 1, 2 O 3 TPC 15. Driver/eceiver Propagation Delays Low to High 8

9 DM485 PPLICTION INFOMTION Differential Data Transmission Differential data transmission is used to reliably transmit data at high rates over long distances and through noisy environments. Differential transmission nullifies the effects of ground shifts and noise signals that appear as common-mode voltages on the line. There are two main standards approved by the Electronics Industries ssociation (EI) that specify the electrical characteristics of transceivers used in differential data transmission. The S-422 standard specifies data rates up to 1 Maud and line lengths up to 4 ft. single driver can drive a transmission line with up to 1 receivers. In order to cater for true multipoint communications, the S-485 standard was defined. This standard meets or exceeds all the requirements of S-422 but also allows for up to 32 drivers and 32 receivers to be connected to a single bus. n extended common-mode range of 7 V to +12 V is defined. The most significant difference between S-422 and S-485 is the fact that the drivers may be disabled, thereby allowing more than one (32 in fact) to be connected to a single line. Only one driver should be enabled at a time, but the S-485 standard contains additional specifications to guarantee device safety in the event of line contention. Table III. Comparison of S-422 and S-485 Interface Standards Specification S-422 S-485 Transmission Type Differential Differential Maximum Cable Length 4 ft. 4 ft. Minimum Driver Output Voltage 2 V 1.5 V Driver Load Impedance 1 Ω 54 Ω eceiver Input esistance 4 kω min 12 kω min eceiver Input Sensitivity 2 mv 2 mv eceiver Input Voltage ange 7 V to +7 V 7 V to +12 V No. of Drivers/eceivers per Line 1/1 32/32 Cable and Data ate The transmission line of choice for S-485 communications is a twisted pair. Twisted pair cable tends to cancel commonmode noise and causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair. The DM485 is designed for bidirectional data communications on multipoint transmission lines. typical application showing a multipoint transmission network is illustrated in Figure 5. n S-485 transmission line can have as many as 32 transceivers on the bus. Only one driver can transmit at a particular time, but multiple receivers may be enabled simultaneously. s with any transmission line, it is important that reflections be minimized. This can be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. Stub lengths of the main line should also be kept as short as possible. properly terminated transmission line appears purely resistive to the driver. D T D Figure 5. Typical S-485 Network Thermal Shutdown The DM485 contains thermal shutdown circuitry that protects the part from excessive power dissipation during fault conditions. Shorting the driver outputs to a low impedance source can result in high driver currents. The thermal sensing circuitry detects the increase in die temperature and disables the driver outputs. The thermal sensing circuitry is designed to disable the driver outputs when a die temperature of 15 C is reached. s the device cools, the drivers are re-enabled at 14 C. Propagation Delay The DM485 features very low propagation delay, ensuring maximum baud rate operation. The driver is well balanced, ensuring distortion free transmission. nother important specification is a measure of the skew between the complementary outputs. Excessive skew impairs the noise immunity of the system and increases the amount of electromagnetic interference (EMI). eceiver Open-Circuit Fail-Safe The receiver input includes a fail-safe feature that guarantees a Logic High on the receiver when the inputs are open circuit or floating. D T D 9

10 DM485 OUTLINE DIMENSIONS 8-Lead Standard Small Outline Package [SOIC] (-8) Dimensions shown in millimeters and (inches) 5. (.1968) 4.8 (.189) 4. (.1574) 3.8 (.1497) (.244) 5.8 (.2284).25 (.98).1 (.4) COPLNITY (.5) SC SETING PLNE 1.75 (.688) 1.35 (.532).51 (.21).31 (.122).25 (.98).17 (.67) 8.5 (.196) (.99) 1.27 (.5).4 (.157) COMPLINT TO JEDEC STNDDS MS-12 CONTOLLING DIMENSIONS E IN MILLIMETES; INCH DIMENSIONS (IN PENTHESES) E OUNDED-OFF MILLIMETE EQUIVLENTS FO EFEENCE ONLY ND E NOT PPOPITE FO USE IN DESIGN 8-Lead Mini Small Outline Package [MSOP] (M-8) Dimensions shown in millimeters 3. SC 3. SC SC PIN 1.65 SC COPLNITY MX SETING PLNE COMPLINT TO JEDEC STNDDS MO

11 DM485 OUTLINE DIMENSIONS 8-Lead Plastic Dual In-Line Package [PDIP] (N-8) Dimensions shown in inches and (millimeters).375 (9.53).365 (9.27).355 (9.2).18 (4.57) MX (7.49).285 (7.24) (6.98).1 (2.54) SC.15 (.38) MIN.15 (3.81).13 (3.3) SETING PLNE.11 (2.79).6 (1.52).22 (.56).5 (1.27).18 (.46).45 (1.14).14 (.36).325 (8.26).31 (7.87).3 (7.62).15 (3.81).135 (3.43).12 (3.5).15 (.38).1 (.25).8 (.2) COMPLINT TO JEDEC STNDDS MO-95 CONTOLLING DIMENSIONS E IN INCHES; MILLIMETE DIMENSIONS (IN PENTHESES) E OUNDED-OFF INCH EQUIVLENTS FO EFEENCE ONLY ND E NOT PPOPITE FO USE IN DESIGN 11

12 DM485 evision History Location Page 1/3 Data Sheet changed from EV. D to. Changes to TIMING SPECIFICTIONS Updated ODEING GUIDE /3 Data Sheet changed from EV. C to EV. D. Changes to SOLUTE MXIMUM TINGS Changes to ODEING GUIDE Update to OUTLINE DIMENSIONS /3 Data Sheet changed from EV. to EV. C. Change to SPECIFICTIONS Change to ODEING GUIDE /2 Data Sheet changed from EV. to EV.. Deleted Q-8 Package Universal Edits to FETUES Edits to GENEL DESCIPTION Edits, additions to SPECIFICTIONS Edits, additions to SOLUTE MXIMUM TINGS dditions to ODEING GUIDE TPCs updated and reformatted ddition of 8-Lead MSOP Package Update to OUTLINE DIMENSIONS C78 1/3(E) 12