ADM488A/ADM489A. Full-Duplex, Low Power, Slew Rate Limited, EIA RS-485 Transceivers FUNCTIONAL BLOCK DIAGRAMS FEATURES APPLICATIONS

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1 Full-uplex, Low Power, Slew ate Limited, EI S-485 Transceivers M488/M489 FETUES Complies with NSI TI/EI and ISO 8482: 1987(E) 250 kbps data rate Single 5 V ± 10% supply 7 V to +12 V bus common-mode range Connect up to 32 nodes on the bus educed slew rate for low EM interference Short-circuit protection 30 µ supply current PPLICTIONS Low power S-485 and S-422 systems TE-CE interface Packet switching Local area networks ata concentration ata multiplexers Integrated services digital network (ISN) GENEL ESCIPTION The M488 and M489 are low power, differential line transceivers suitable for communication on multipoint bus transmission lines. They are intended for balanced data transmission and comply with both S-485 and S-422 standards of the Electronics Industries ssociation (EI). oth products contain a single differential line driver and a single differential line receiver, making them suitable for full-duplex data transfer. The M489 contains an additional receiver and driver enable control. The input impedance is 12 kω, allowing 32 transceivers to be connected on the bus. The M488/M489 operate from a single 5 V ± 10% power supply. FUNCTIONL LOCK IGMS O I O E E I M488 Figure 1. M488 M489 Figure 2. M489 Excessive power dissipation that is caused by bus contention or output shorting is prevented by a thermal shutdown circuit. This feature forces the driver output into a high impedance state if, during fault conditions, a significant temperature increase is detected in the internal driver circuitry. The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The M488/M489 are fabricated on icmos, an advanced mixed technology process combining low power CMOS with fast switching bipolar technology. The M488/M489 are fully specified over the industrial temperature range and are available in SOIC and MSOP packages ev. Information furnished by nalog evices is believed to be accurate and reliable. However, no responsibility is assumed by nalog evices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of nalog evices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. ox 9106, Norwood, M , U.S.. Tel: Fax: nalog evices, Inc. ll rights reserved.

2 TLE OF CONTENTS Features... 1 pplications... 1 General escription... 1 Functional lock iagrams... 1 evision History... 2 Specifications... 3 Timing Specifications... 4 bsolute Maximum atings... 5 ES Caution... 5 Pin Configurations and Function escriptions... 6 Typical Performance Characteristics...8 Test Circuits...9 Switching Characteristics Theory of Operation pplications Information ifferential ata Transmission Cable and ata ate Outline imensions Ordering Guide EVISION HISTO 11/10 ev. 0 to ev. Changes to Table Changes to Figure Changes to Figure dded New Figure 23, enumbered Subsequent Figures, Moved Old Figure 23 to New Figure Changes to Ordering Guide /09 evision 0: Initial Version ev. Page 2 of 16

3 SPECIFICTIONS VCC = 5 V ± 10%; all specifications TMIN to TMX, unless otherwise noted. Table 1. Parameter Symbol Min Typ Max Unit Test Conditions/Comments IVE ifferential Output Voltage VO 5.0 V =, see Figure V VCC = 5 V, = 50 Ω (S-422), see Figure V = 27 Ω (S-485), see Figure V VTST = 7 V to +12 V, see Figure 12, VCC = 5 V ± 5% Δ VO for Complementary Output States 0.2 V = 27 Ω or 50 Ω, see Figure 11 Common-Mode Output Voltage VOC 3.0 V = 27 Ω or 50 Ω, see Figure 11 Δ VOC for Complementary Output States 0.2 V = 27 Ω or 50 Ω Output Short-Circuit Current VOUT 250 m 7 V VO +12 V CMOS Input Logic Threshold Low VINL V CMOS Input Logic Threshold High VINH V Logic Input Current (E, I) ±1.0 µ ECEIVE ifferential Input Threshold Voltage VTH V 7 V VCM +12 V Input Voltage Hysteresis ΔVTH 70 mv VCM = 0 V Input esistance 12 kω 7 V VCM +12 V Input Current (, ) 1 m VIN = 12 V 0.8 m VIN = 7 V Logic Enable Input Current (E) ±1 µ CMOS Output Voltage Low VOL 0.4 V IOUT = +4.0 m CMOS Output Voltage High VOH 4.0 V IOUT = 4.0 m Short-Circuit Output Current 7 85 m VOUT = GN or VCC Three-State Output Leakage Current ±1.0 µ 0.4 V VOUT 2.4 V POWE SUPPL CUENT ICC Outputs unloaded, receivers enabled µ E = 0 V (disabled) µ E = 5 V (enabled) ev. Page 3 of 16

4 TIMING SPECIFICTIONS VCC = 5 V ± 10%. ll specifications TMIN to TMX, unless otherwise noted. Table 2. Parameter Symbol Min Typ Max Unit Test Conditions/Comments IVE Propagation elay Input to Output tplh, tphl ns L differential = 54 Ω, CL1 = CL2 = 100 pf, see Figure 15, Figure 16 river Output Skew tskew ns L differential = 54 Ω, CL1 = CL2 = 100 pf, see Figure 15 river ise/fall Time t, tf ns L differential = 54 Ω, CL1 = CL2 = 100 pf, see Figure 15, Figure 16 river Enable to Output Valid tl, th ns L = 500 Ω, CL = 100 pf, see Figure 12, Figure 18 river isable Timing tl, th ns L = 500 Ω, CL = 15 pf, see Figure 12, Figure 18 Maximum ata ate 250 kbps ECEIVE Propagation elay Input to Output tplh, tphl ns CL = 15 pf, see Figure 15, Figure 17 Skew tplh tphl 100 ns eceiver Enable ten ns L = 1 kω, CL = 15 pf, see Figure 14, Figure 19 eceiver isable ten ns L = 1 kω, CL = 15 pf, see Figure 14, Figure 19 Maximum ata ate 250 kbps ev. Page 4 of 16

5 SOLUTE MXIMUM TINGS T = 25 C, unless otherwise noted. Table 3. Parameter VCC Inputs river Input (I) Control Inputs (E, E) ating 7 V 0.3 V to VCC V 0.3 V to VCC V eceiver Inputs (, ) 14 V to +14 V Outputs river Outputs 14 V to V eceiver Output 0.5 V to VCC V Power issipation 8-Lead SOIC 520 mw θj, Thermal Impedance 110 C/W Power issipation 14-Lead SOIC 800 mw θj, Thermal Impedance 120 C/W Operating Temperature ange Industrial ( Version) 40 C to +85 C Storage Temperature ange 65 C to +150 C Lead Temperature (Soldering, 10 sec) 300 C Vapor Phase (60 sec) 215 C Infrared (15 sec) 220 C Stresses above those listed under bsolute Maximum atings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ES CUTION ev. Page 5 of 16

6 PIN CONFIGUTIONS N FUNCTION ESCIPTIONS 1 O 2 I 3 GN 4 M488 TOP VIEW (Not to Scale) Figure 3. M488 SOIC_N and MSOP Pin Configuration Table 4. M488 Pin Function escriptions Pin No. Mnemonic escription 1 VCC Power Supply, 5 V ± 10%. 2 O eceiver Output. When > by 200 mv, O = high. If < by 200 mv, O = low. 3 I river Input. logic low on I forces low and high, whereas a logic high on I forces high and low. 4 GN Ground Connection, 0 V. 5 Noninverting river, ifferential Output. 6 Inverting river, ifferential Output. 7 Inverting eceiver, Input. 8 Noninverting eceiver, Input ev. Page 6 of 16

7 NC 1 O 2 E 3 E 4 I 5 GN 6 GN 7 M489 TOP VIEW (Not to Scale) NC = NO CONNECT NC NC Figure 4. M489 SOIC_N Pin Configuration O 1 E 2 E 3 I 4 GN 5 M489 TOP VIEW (Not to Scale) Figure 5. M489 MSOP Pin Configuration Table 5. M489 Pin Function escriptions Pin No. SOIC_N MSOP Mnemonic escription 1, 8, 13 N/ 1 NC No Connect. No connections are required to this pin. 2 1 O eceiver Output. When enabled, if > by 200 mv, O = high. If < by 200 mv, O = low. 3 2 E eceiver Output Enable. low level enables the receiver output, O. high level places the M489 in a high impedance state. 4 3 E river Output Enable. high level enables the driver differential outputs ( and ). low level places the M489 in a high impedance state. 5 4 I river Input. When the driver is enabled, a logic low on I forces low and high, whereas a logic high on I forces high and low. 6, 7 5 GN Ground Connection, 0 V. 9 6 Noninverting river, ifferential Output Inverting river, ifferential Output Inverting eceiver, Input Noninverting eceiver, Input VCC Power Supply, 5 V ± 10%. 1 N/ means not applicable. ev. Page 7 of 16

8 TPICL PEFOMNCE CHCTEISTICS OUTPUT CUENT (m) OUTPUT CUENT (m) OUTPUT VOLTGE (V) OUTPUT VOLTGE (V) Figure 6. Output Current vs. eceiver Output Low Voltage Figure 9. Output Current vs. river Output High Voltage OUTPUT CUENT (m) OUTPUT CUENT (m) OUTPUT VOLTGE (V) Figure 7. Output Current vs. eceiver Output High Voltage OUTPUT VOLTGE (V) Figure 10. Output Current vs. river ifferential Output Voltage OUTPUT CUENT (m) OUTPUT VOLTGE (V) Figure 8. Output Current vs. river Output Low Voltage ev. Page 8 of 16

9 TEST CICUITS +1.5V V O V OC Figure 11. river Voltage Measurement Test Circuit V S1 L S2 E IN E C L V OUT Figure 14. eceiver Enable/isable Test Circuit V 375Ω V O3 60Ω V TST 375Ω Figure 12. river Enable/isable Test Circuit E C L1 I O L IFF C L2 E Figure 15. river/eceiver Propagation elay Test Circuit V O 3V E IN E S1 L C L V OUT Figure 13. river Voltage Measurement Test Circuit S ev. Page 9 of 16

10 SWITCHING CHCTEISTICS /2 /2 0V V O 1/2V O t PLH t PHL E t L 2.3V t L 0V, V OL + 0.5V V OL +V O V IFF V O 90% POINT V IFF = V () V () 90% POINT 10% POINT 10% POINT t t F Figure 16. river Propagation elay, ise/fall Timing , t H 2.3V t H V OH 0.5V Figure 18. river Enable/isable Timing V OH 0V E V 0V t L t L 0.3 O t PLH t PHL t SKEW = t PLH t PHL 1.5V 1.5V Figure 17. eceiver Propagation elay V OH V OL O O 0V 1.5V V OUTPUT LOW OL + 0.5V t H t H OUTPUT HIGH V OH 0.5V 1.5V Figure 19. eceiver Enable/isable Timing V OL V OH ev. Page 10 of 16

11 THEO OF OPETION The M488/M489 are ruggedized S-485 transceivers that operate from a single 5 V supply. They contain protection against radiated and conducted interference and are ideally suited for operation in electrically harsh environments or where cables can be plugged/unplugged. They are also immune to high F field strengths without special shielding precautions. The M488/M489 are intended for balanced data transmission and comply with both EI S-485 and S-422 standards. They contain a differential line driver and a differential line receiver, and are suitable for full-duplex data transmission. The input impedance on the M488/M489 is 12 kω, allowing up to 32 transceivers on the differential bus. The M488/M489 operate from a single 5 V ± 10% power supply. thermal shutdown circuit prevents excessive power dissipation caused by bus contention or by output shorting. This feature forces the driver output into a high impedance state if, during fault conditions, a significant temperature increase is detected in the internal driver circuitry. The receiver contains a fail-safe feature that results in a logic high output state if the inputs are unconnected (floating). The M488/M489 can transmit at data rates up to 250 kbps. Figure 20 shows a typical application for the M488/M489, a full-duplex link where data transfers at rates of up to 250 kbps. terminating resistor is shown at both ends of the link. This termination is not critical because the slew rate is controlled by the M488/M489 and reflections are minimized. The communications network can be extended to include multipoint connections, as shown in Figure 22. s many as 32 transceivers can be connected to the bus. Table 6 and Table 7 show the truth tables for transmitting and receiving. Table 6. Transmitting Truth Table Inputs Outputs E E I X X X 1 High- High- 1 0 X 1 Hgh- High- 1 X is don t care. Table 7. eceiving Truth Table Inputs Output E E to O V V Inputs open circuit X 1 High- 1 X is don t care. M488 M488 O T I I T O GN NOTES 1. MXIMUM NUME OF NOES = 32. Figure 20. M488/M489 Full-uplex ata Link GN ev. Page 11 of 16

12 MXIMUM NUME OF NOES = 32 MSTE SLVE O E T I E E E I T O M488 M488 SLVE SLVE M488 M488 O E E I O E E I NOTES 1. T IS EQUL TO THE CHCTEISTIC IMPENCE OF THE CLE. Figure 21. Typical S-485 Full-uplex pplication ev. Page 12 of 16

13 PPLICTIONS INFOMTION IFFEENTIL T TNSMISSION ifferential data transmission reliably transmits data at high rates over long distances and through noisy environments. ifferential transmission nullifies the effects of ground shifts and noise signals, which appear as common-mode voltages on the line. Two main standards that specify the electrical characteristics of transceivers used in differential data transmission are approved by the EI. The S-422 standard specifies data rates up to 10 Mbps and line lengths up to 4000 ft. single driver can drive a transmission line with up to 10 receivers. To cater to true multipoint communications, the S-485 standard was defined to meet or exceed the requirements of S-422. It also allows up to 32 drivers and 32 receivers to be connected to a single bus. n extended common-mode range of 7 V to +12 V is defined. The most significant difference between the S-422 and S-485 is that the S-485 drivers can be disabled, thereby allowing up to 32 receivers to be connected to a single line. Only one driver should be enabled at a time, but the S-485 standard contains additional specifications to guarantee device safety in the event of line contention. CLE N T TE The transmission line of choice for S-485 communications is a twisted pair. Twisted pair cable tends to cancel common-mode noise and causes cancellation of the magnetic fields generated by the current flowing through each wire, thereby reducing the effective inductance of the pair. The M488/M489 are designed for bidirectional data communications on multipoint transmission lines. typical application with a multipoint transmission network is illustrated in Figure 22. n S-485 transmission line can have up to 32 transceivers on the bus. Only one driver can transmit at a particular time, but multiple receivers can be simultaneously enabled. s with any transmission line, it is important to minimize reflections. This can be achieved by terminating the extreme ends of the line using resistors equal to the characteristic impedance of the line. Keep stub lengths of the main line as short as possible. properly terminated transmission line appears purely resistive to the driver. Table 8. Comparison of S-422 and S-485 Interface Standards Specification S-422 S-485 Transmission Type ifferential ifferential Maximum ata ate 10 Mbps 10 Mbps Maximum Cable Length 4000 ft ft. Minimum river Output Voltage ±2 V ±1.5 V river Load Impedance 100 Ω 54 Ω eceiver Input esistance 4 kω minimum 12 kω minimum eceiver Input Sensitivity ±200 mv ±200 mv eceiver Input Voltage ange 7 V to +7 V 7 V to +12 V Number of rivers/eceivers per Line 1/10 32/32 T T Figure 22. Typical S-485 Network ev. Page 13 of 16

14 OUTLINE IMENSIONS PIN 1 IENTIFIE 0.65 SC COPLNIT MX MX COMPLINT TO JEEC STNS MO-187- Figure Lead Mini Small Outline Package [MSOP] (M-8) imensions shown in millimeters (0.1968) 4.80 (0.1890) 4.00 (0.1574) 3.80 (0.1497) (0.2441) 5.80 (0.2284) 0.25 (0.0098) 0.10 (0.0040) COPLNIT 0.10 SETING PLNE 1.27 (0.0500) SC 1.75 (0.0688) 1.35 (0.0532) 0.51 (0.0201) 0.31 (0.0122) (0.0098) 0.17 (0.0067) 0.50 (0.0196) 0.25 (0.0099) 1.27 (0.0500) 0.40 (0.0157) 45 COMPLINT TO JEEC STNS MS-012- CONTOLLING IMENSIONS E IN MILLIMETES; INCH IMENSIONS (IN PENTHESES) E OUNE-OFF MILLIMETE EQUIVLENTS FO EFEENCE ONL N E NOT PPOPITE FO USE IN ESIGN. Figure Lead Standard Small Outline Package [SOIC_N] Narrow ody (-8) imensions shown in millimeters and (inches) ev. Page 14 of 16

15 PIN 1 IENTIFIE 0.50 SC COPLNIT MX MX COMPLINT TO JEEC STNS MO-187- Figure Lead Mini Small Outline Package [MSOP] (M-10) imensions shown in millimeters (0.3445) 8.55 (0.3366) 4.00 (0.1575) 3.80 (0.1496) (0.2441) 5.80 (0.2283) 0.25 (0.0098) 0.10 (0.0039) COPLNIT (0.0500) SC 0.51 (0.0201) 0.31 (0.0122) 1.75 (0.0689) 1.35 (0.0531) SETING PLNE (0.0098) 0.17 (0.0067) 0.50 (0.0197) 0.25 (0.0098) 1.27 (0.0500) 0.40 (0.0157) 45 COMPLINT TO JEEC STNS MS-012- CONTOLLING IMENSIONS E IN MILLIMETES; INCH IMENSIONS (IN PENTHESES) E OUNE-OFF MILLIMETE EQUIVLENTS FO EFEENCE ONL N E NOT PPOPITE FO USE IN ESIGN. Figure Lead Standard Small Outline Package [SOIC_N] Narrow ody (-14) imensions shown in millimeters and (inches) OEING GUIE Model 1 Temperature ange Package escription Package Option randing M488M 40 C to +85 C 8-Lead Mini Small Outline Package [MSOP] M-8 F0F M488M-EEL7 40 C to +85 C 8-Lead Mini Small Outline Package [MSOP] M-8 F0F M C to +85 C 8-Lead Standard Small Outline Package, Narrow ody -8 [SOIC_N] M488-EEL7 40 C to +85 C 8-Lead Standard Small Outline Package, Narrow ody -8 [SOIC_N] M489M 40 C to +85 C 10-Lead Mini Small Outline Package [MSOP] M-10 F0G M489M-EEL7 40 C to +85 C 10-Lead Mini Small Outline Package [MSOP] M-10 F0G M C to +85 C 14-Lead Standard Small Outline Package, Narrow ody -14 [SOIC_N] M489-EEL7 40 C to +85 C 14-Lead Standard Small Outline Package, Narrow ody [SOIC_N] = ohs Compliant Part. ev. Page 15 of 16

16 NOTES nalog evices, Inc. ll rights reserved. Trademarks and registered trademarks are the property of their respective owners /10() ev. Page 16 of 16