MC34085BP HIGH PERFORMANCE JFET INPUT OPERATIONAL AMPLIFIERS

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Kathlyn Marian Randall
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1 t These devices are a new generation of high speed JFET input monolithic operational amplifiers. Innovative design concepts along with JFET technology provide wide gain bandwidth product and high slew rate. Wellmatched JFET input devices and advanced trim techniques ensure low input offset errors and bias currents. The all NPN output stage features large output voltage swing, no deadband crossover distortion, high capacitive drive capability, excellent phase and gain margins, low open loop output impedance, and symmetrical source/sink AC frequency response. This series of devices is available in fully compensated or decompensated (AVCL 2) and is specified over a commercial temperature range. They are pin compatible with existing Industry standard operational amplifiers, and allow the designer to easily upgrade the performance of existing designs. Wide Gain Bandwidth: 8. MHz for Fully Compensated Devices Wide Gain Bandwidth: 6 MHz for Decompensated Devices High Slew Rate: 25 V/µs for Fully Compensated Devices High Slew Rate: 5 V/µs for Decompensated Devices High Input Impedance: 2Ω Input Offset Voltage:.5 mv Maximum (Single Amplifier) Large Output Voltage Swing: 4.7 V to 4 V for Large Output Voltage Swing: Low Open Loop Output Impedance: 3 MHz Low THD Distortion:.% Excellent Phase/Gain Margins: 55 /7.6 db for Fully Compensated Devices Op Amp Function Single Fully Compensated ORDERING INFORMATION AVCL 2 Compensated Operating Temperature Range Package MC348BD MC348BD SO8 MC348BP MC348BP TA = to 7 C Plastic DIP Dual MC3482P MC3483BP Plastic DIP Quad MC3484DW MC3484P MC3485BDW MC3485BP TA = to 7 C SO6L Plastic DIP PIN CONNECTIONS Order this document by MC348/D HIGH PERFORMANCE JFET INPUT OPERATIONAL AMPLIFIERS 8 P SUFFIX PLASTIC PACKAGE CASE Offset Null Inv. Input 2 Noninv. Input 3 VEE 4 P SUFFIX PLASTIC PACKAGE CASE 646 PIN CONNECTIONS Output Inputs VEE (Single, Top View) (Dual, Top View) D SUFFIX PLASTIC PACKAGE CASE 75 (SO8) NC 7 VCC 6 Output 5 Offset Null VCC Output 2 Inputs 2 DW SUFFIX PLASTIC PACKAGE CASE 75G (SO6L) Output Inputs VCC Inputs 2 Output 2 NC 6 Output Inputs VEE Inputs 3 7 Output NC Output 4 Output Inputs Inputs VCC 4 VEE 5 Inputs Inputs Output Output 3 (Quad, Top View) MOTOROLA ANALOG IC DEVICE DATA Motorola, Inc. 996 Rev

2 MC348 thru MC3485 MAXIMUM RATINGS Rating Symbol Value Unit Supply Voltage (from VCC to VEE) VS 44 V Input Differential Voltage Range VIDR (Note ) V Input Voltage Range VIR (Note ) V Output Short Circuit Duration (Note 2) tsc Indefinite sec Operating Ambient Temperature Range TA to 7 C Operating Junction Temperature TJ 25 C Storage Temperature Range Tstg 65 to 65 C NOTES:. Either or both input voltages must not exceed the magnitude of V CC or V EE. 2. Power dissipation must be considered to ensure maximum junction temperature (T J ) is not exceeded. Representative Schematic Diagram (Each Amplifier) VCC 2 µa 5 µa 85 µa Q Inputs J Q8 J2 CC CF 5. pf 2 pf D R 24 8 D2 CM 3. pf RSC Q7 Q6 7 R2 Output Q9 Q R3. k Q5 R4. k Q2 Q3 Q4 5 5 µa 5 Ω R6 Q D4 D3 µa 3 µa R7 66 k Null Adjust 5 (MC348, 8)* RM VEE *Pins & 5 (MC348,8) should not be directly grounded or connected to VCC. 2 MOTOROLA ANALOG IC DEVICE DATA

3 MC348 thru MC3485 DC ELECTRICAL CHARACTERISTICS (VCC = 5 V, VEE = 5 V, TA = Tlow to Thigh [Note 3], unless otherwise noted.) Characteristics Symbol Min Typ Max Unit Input Offset Voltage (Note 4) Single TA = 25 C TA = to 7 C (MC348B, MC348B) Dual TA = 25 C TA = to 7 C (MC3482, MC3483) Quad TA = 25 C TA = to 7 C (MC3484, MC3485) Average Temperature Coefficient of Offset Voltage VIO/ T µv/ C Input Bias Current (VCM = Note 5) TA = 25 C TA = to 7 C Input Offset Current (VCM = Note 5) TA = 25 C TA = to 7 C Large Signal Voltage Gain (VO = ± V, RL = 2. k) TA = 25 C TA = Tlow to Thigh Output Voltage Swing RL = 2. k, TA = 25 C RL = k, TA = 25 C RL = k, TA = Tlow to Thigh RL = 2. k, TA = 25 C RL = k, TA = 25 C RL = k, TA = Tlow to Thigh Output Short Circuit Current (TA = 25 C) Input Overdrive =. V, Output to Ground Source Sink Input Common Mode Voltage Range TA = 25 C VIO IIB IIO AVOL VOH VOL ISC VICR (VEE 4.) to (VCC 2.) Common Mode Rejection Ratio (RS k, TA = 25 C) CMRR 7 9 db Power Supply Rejection Ratio (RS = Ω, ) PSRR 7 86 db mv na na V/mV V ma V Power Supply Current Single TA = 25 C TA = Tlow to Thigh Dual TA = 25 C TA = Tlow to Thigh Quad TA = 25 C TA = Tlow to Thigh ID ma NOTES: (continued) 3. T low = C for MC348B T high = 7 C for MC348B C for MC348B 7 C for MC348B C for MC C for MC3484 C for MC C for MC See application information for typical changes in input offset voltage due to solderability and temperature cycling. 5. Limits at T A = 25 C are guaranteed by high temperature (T high ) testing. MOTOROLA ANALOG IC DEVICE DATA 3

4 MC348 thru MC3485 AC ELECTRICAL CHARACTERISTICS (VCC = 5 V, VEE = 5 V, TA = 25 C, unless otherwise noted.) Characteristics Symbol Min Typ Max Unit Slew Rate (Vin = V to V, RL = 2. kω, CL = pf) Compensated AV =. AV =. Decompensated AV = 2. AV =. Settling Time ( V Step, AV =.) To.% (±/2 LSB of 9Bits) To.% (±/2 LSB of 2Bits) Gain Bandwidth Product (f = 2 khz) Compensated Decompensated Power Bandwidth (RL = 2. k, VO = 2 Vpp, THD = 5.%) Compensated AV =. Decompensated AV =. Phase Margin (Compensated) RL = 2. k RL = 2. k, CL = pf Gain Margin (Compensated) RL = 2. k RL = 2. k, CL = pf Equivalent Input Noise Voltage RS = Ω, f =. khz SR ts GBW BWp φm Am V/µs µs MHz khz Degrees db en 3 nv/ Hz Equivalent Input Noise Current (f =. khz) In. pa/ Hz Input Capacitance Ci 5. pf Input Resistance ri 2 Ω Total Harmonic Distortion AV =, RL = 2. k, 2. VO 2 Vpp, f = khz THD.5 % Channel Separation (f = khz) 2 db Open Loop Output Impedance (f =. MHz) Zo 35 Ω V ICR, INPUT COMMON MODE VOLTAGE RANGE (V) Figure. Input Common Mode Voltage Range versus Temperature VCC/VEE = ±3. V to ±22 V VIO = 5. ma VCC. VEE I IB, INPUT BIAS CURRENT (pa) k k. k VCM = V Figure 2. Input Bias Current versus Temperature MOTOROLA ANALOG IC DEVICE DATA

5 MC348 thru MC Figure 3. Input Bias Current versus Input Common Mode Voltage 5 Figure 4. Output Voltage Swing versus Supply Voltage, INPUT BIAS CURRENT (pa) I IB VIC, INPUT COMMON MODE VOLTAGE (V) VO, OUTPUT VOLTAGE SWING (Vpp) RL Connected to Ground RL = k RL = 2. k ±5. ± ±5 ±2 ±25 VCC VEE, SUPPLY VOLTAGE (V), OUTPUT SATURATION VOLTAGE (V) Vsat Figure 5. Output Saturation versus Load Current VCC/VEE = 5 V to 22 V Sink VCC Source VEE IL, LOAD CURRENT (±ma) V sat, OUTPUT SATURATION VOLTAGE (V) Figure 6. Output Saturation vesus Load Resistance to Ground VCC VEE 3 3. k 3 k 3 k RL, LOAD RESISTANCE TO GROUND (Ω) Figure 7. Output Saturation versus Load Resistance to VCC Figure 8. Output Short Circuit Current versus Temperature Vsat, OUTPUT SATURATION VOLTAGE (V) VCC VCC/VEE = 5 V RL to VCC VEE 3 3. k 3 k 3 k RL, LOAD RESISTANCE TO VCC (Ω) I SC, OUTPUT SHORT CIRCUIT CURRENT (ma) Sink Source RL. Ω Vin =. V MOTOROLA ANALOG IC DEVICE DATA 5

6 MC348 thru MC3485 Z O, OUTPUT IMPEDANCE ( Ω ) Figure 9. Output Impedance versus Frequency VCM = VO = IO = ±.5 ma Compensated Units Only AV = AV =. k k k. M M AV = AV =. Z O, OUTPUT IMPEDANCE ( Ω ) Figure. Output Impedance versus Frequency VCM = VO = IO = ±.5 ma Decompensated Units Only AV = AV = AV = AV = 2.. k k k. M M VO, OUTPUT VOLTAGE SWING (Vpp) Figure. Output Voltage Swing versus Frequency Compensated Units AV =. RL = 2. k THD =.% Decompensated Units AV =. k k. M M THD, OUTPUT DISTORTION (%) Figure 2. Output Distortion versus Frequency AV = AV = AV = AV =.*. k k k VO = 2. Vpp RL = 2. k *Compensated Units Only Figure 3. Open Loop Voltage Gain versus Temperature A VOL, OPEN LOOP VOLTAGE GAIN (db NORMALIZED) VO = V to V RL = k f Hz MOTOROLA ANALOG IC DEVICE DATA

7 MC348 thru MC3485 A VOL, OPEN LOOP VOLTAGE GAIN (db) Figure 4. Open Loop Voltage Gain and Phase versus Frequency 8 VO = V RL = 2. k 45 6 Phase Gain Solid Line Curves Compensated Units Dashed Line Curves Decompensated Units 8.. k k k. M M M, EXCESS PHASE (DEGREES) φ A VOL, OPEN LOOP VOLTAGE GAIN (db) 2 Figure 5. Open Loop Voltage Gain and Phase versus Frequency 2 Gain VO = V Margin Phase = 7.6 db 4 Margin = Gain, RL = 2. k 2 2 Gain, RL = 2. k, CL = pf Phase, RL = 2. k 4 Phase, RL = 2. k, CL = pf 3 2 Compensated Units Only φ, EXCESS PHASE (DEGREES) A VOL, OPEN LOOP VOLTAGE GAIN (db) 2 Figure 6. Open Loop Voltage Gain and Phase versus Frequency VO = V Gain Margin = 5.5 db Phase 4 Margin = Gain, RL = 2. k 2 Gain, RL = 2. k, CL = pf Phase, RL = 2. k 4 Phase, RL = 2. k, CL = pf 2 Decompensated Units Only , EXCESS PHASE (DEGREES) φ GBW, GAIN BANDWIDTH PRODUCT (NORMALIZED) Figure 7. Normalized Gain Bandwidth Product versus Temperature RL = 2. k PERCENT OVERSHOOT Figure 8. Percent Overshoot versus Load Capacitance Decompensated Units AV = 2. Compensated Units AV =. RL = 2. k 2 VO = mvpp VO = V to V.k CL, LOAD CAPACITANCE (pf) φ M, PHASE MARGIN (DEGREES) Figure 9. Phase Margin versus Load Capacitance Compensated Units AV =. Decompensated Units AV = 2. RL = 2. k to VO = mvpp VO = V to V.k CL, LOAD CAPACITANCE (pf) MOTOROLA ANALOG IC DEVICE DATA 7

8 MC348 thru MC3485 A m, GAIN MARGIN (db) Figure 2. Gain Margin versus Load Capacitance Compensated Units AV =. Decompensated Units AV = 2. RL = 2. k to VO = mvpp VO = V to V k CL, LOAD CAPACITANCE (pf) φ m, PHASE MARGIN (DEGREES) 6 Figure 2. Phase Margin versus Temperature 5 Solid Line CurvesCompensated Units AV =. CL = pf Dashed Line CurvesDecompensated Units AV = CL = pf CL = 36 pf VO = mvpp CL = 2 pf RL = 2. k to VO = V to V Figure 22. Gain Margin versus Temperature Figure 23. Normalized Slew Rate versus Temperature A m, GAIN MARGIN (db) Solid Line CurvesCompensated Units AV =. Dashed Line CurvesDecompensated Units AV = 2. CL = pf CL = pf RL = 2. k to VO = mvpp VO = V to V CL = 2 pf SR, SLEW RATE (NORMALIZED) AV =. for Compensated Units AV =. for Decompensated Units RL = 2. k CL = pf VO = V to V CL = 36 pf MOTOROLA ANALOG IC DEVICE DATA

9 MC348 thru MC3485 MC3484 Transient Response AV =., RL = 2. k,, Figure 24. Small Signal Figure 25. Large Signal CL = pf CL = pf 5 mv/div 5. mv/div.2 µs/div.5 µs/div MC3485 Transient Response AV = 2., RL = 2. k,, Figure 26. Small Signal Figure 27. Large Signal CL = pf CL = pf 5 mv/div 5. mv/div.2 µs/div.5 µs/div MOTOROLA ANALOG IC DEVICE DATA 9

10 MC348 thru MC3485 CMRR, COMMON MODE REJECTION RATIO (db) Figure 28. Common Mode Rejection Ratio versus Frequency TA = 25 C V CC ± V CC TA = 55 C V O 2 Compensated Units AV =. V EE ± V EE Decompensated Units AV = k k k. M M VS = 3. V VO = V PSSR, POWER SUPPLY REJECTION RATIO (db) Figure 29. Power Supply Rejection Ratio versus Frequency V CC ± V CC V O VS = 3. V VO = V Positive Supply 2 Negative Supply V EE ± V EE... k k k. M M PSSR, POWER SUPPLY REJECTION RATION (db) 9 8 Figure 3. Power Supply Rejection Ratio versus Temperature V CC ± V CC V O Negative Supply Positive Supply VS = 3. V VO = V f Hz Compensated Units AV =. V EE ± V EE Decompensated Units AV = I CC, SUPPLY CURRENT (NORMALIZED) Figure 3. Normalized Supply Current versus Supply Voltage TA = 25 C Supply Current Normalized to, RL = VO = TA = 55 C.7 ±5. ± ±5 ±2 ±25 VS, SUPPLY VOLTAGE (V) CHANNEL SEPERATION (db) Figure 32. Channel Separation versus Frequency k k. M M nv/ Hz ) e, INPUT NOISE VOLTAGE ( n Figure 33. Spectral Noise Density. k VCM = k k MOTOROLA ANALOG IC DEVICE DATA

11 MC348 thru MC3485 APPLICATIONS INFORMATION The bandwidth and slew rate of the MC348 series is nearly double that of currently available general purpose JFET opamps. This improvement in AC performance is due to the Pchannel JFET differential input stage driving a compensated miller integration amplifier in conjunction with an all NPN output stage. The all NPN output stage offers unique advantages over the more conventional NPN/PNP transistor Class AB output stage. With a k load resistance, the op amp can typically swing within. V of the positive rail (VCC), and within.3 V of the negative rail (VEE), providing a 28.7 pp swing from ±5 V supplies. This large output swing becomes most noticeable at lower supply voltages. If the load resistance is referenced to VCC instead of ground, the maximum possible output swing can be achieved for a given supply voltage. For light load currents, the load resistance will pull the output to VCC during the positive swing and the NPN output transistor will pull the output very near VEE during the negative swing. The load resistance value should be much less than that of the feedback resistance to maximize pullup capability. The all NPN transistor output stage is also inherently fast, contributing to the operation amplifier s high gainbandwidth product and fast settling time. The associated high frequency output impedance is 5 Ω (typical) at 8. MHz. This allows driving capacitive loads from pf to 3 pf without oscillations over the military temperature range, and over the full range of output swing. The 55 C phase margin and 7.6 db gain margin as well as the general gain and phase characteristics are virtually independent of the sink/source output swing conditions. The high frequency characteristics of the MC348 series is especially useful for active filter applications. The common mode input range is from 2. V below the positive rail (VCC) to 4. V above the negative rail (VEE). The amplifier remains active if the inputs are biased at the positive rail. This may be useful for some applications in that single supply operation is possible with a single negative supply. However, a degradation of offset voltage and voltage gain may result. Phase reversal does not occur if either the inverting or noninverting input (or both) exceeds the positive common mode limit. If either input (or both) exceeds the negative common mode limit, the output will be in the high state. The input stage also allows a differential up to ±44 V, provided the maximum input voltage range is not exceeded. The supply voltage operating range is from ±5. V to ±22 V. For optimum frequency performance and stability, careful component placement and printed circuit board layout should be exercised. For example, long unshielded input or output leads may result in unwanted inputoutput coupling. In order to reduce the input capacitance, resistors connected to the input pins should be physically close to these pins. This not only minimizes the input pole for optimum frequency response, but also minimizes extraneous pickup at this node. Supply decoupling with adequate capacitance close to the supply pin is also important, particularly over temperature, since many types of decoupling capacitors exhibit large impedance changes over temperature. Primarily due to the JFET inputs of the op amp, the input offset voltage may change due to temperature cycling and board soldering. After 2 temperature cycles ( 55 to 65 C), the typical standard deviation for input offset voltage is 559 µv in the plastic packages. With respect to board soldering (26 C, seconds), the typical standard deviation for input offset voltage is 525 µv in the plastic package. Socketed devices should be used over a minimal temperature range for optimum input offset voltage performance. Figure 34. Offset Nulling Circuit VEE VCC k MOTOROLA ANALOG IC DEVICE DATA

12 MC348 thru MC3485 OUTLINE DIMENSIONS P SUFFIX PLASTIC PACKAGE CASE 6265 ISSUE K NOTE 2 T SEATING PLANE H 8 5 B 4 F A L C J N M D K G.3 (.5) M T A M B M NOTES:. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 2. PACKAGE CONTOUR OPTIONAL (ROUND OR SQUARE CORNERS). 3. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, 982. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G 2.54 BSC. BSC H J K L 7.62 BSC.3 BSC M N D SUFFIX PLASTIC PACKAGE CASE 755 (SO8) ISSUE R A E B C A 8 e D B 5 4 H A.25 M C B S A S.25 M B M SEATING PLANE. h X 45 C L NOTES:. DIMENSIONING AND TOLERANCING PER ASME Y4.5M, DIMENSIONS ARE IN MILLIMETERS. 3. DIMENSION D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION.5 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE MOLD PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.27 TOTAL IN EXCESS OF THE B DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS DIM MIN MAX A A..25 B C.8.25 D E e.27 BSC H h.25.5 L MOTOROLA ANALOG IC DEVICE DATA

13 MC348 thru MC3485 OUTLINE DIMENSIONS A F H G D N B SEATING PLANE C K P SUFFIX PLASTIC PACKAGE CASE 6466 ISSUE L L M J NOTES:. LEADS WITHIN.3 (.5) RADIUS OF TRUE POSITION AT SEATING PLANE AT MAXIMUM MATERIAL CONDITION. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 4. ROUNDED CORNERS OPTIONAL. INCHES MILLIMETERS DIM MIN MAX MIN MAX A B C D F G. BSC 2.54 BSC H J K L.3 BSC 7.62 BSC M N A 6 9 6X D 4X G B. (.25) M T A S B S 8 K C 8X P T SEATING PLANE. (.25) M J DW SUFFIX PLASTIC PACKAGE CASE 75G2 (SO6L) ISSUE A F M B M R X 45 NOTES:. DIMENSIONING AND TOLERANCING PER ANSI Y4.5M, CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION.5 (.6) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE.3 (.5) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. MILLIMETERS INCHES DIM MIN MAX MIN MAX A B C D F G.27 BSC.5 BSC J K M 7 7 P R MOTOROLA ANALOG IC DEVICE DATA 3

14 MC348 thru MC3485 NOTES 4 MOTOROLA ANALOG IC DEVICE DATA

15 MC348 thru MC3485 NOTES MOTOROLA ANALOG IC DEVICE DATA 5

16 MC348 thru MC3485 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Typical parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including Typicals must be validated for each customer application by customer s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; TatsumiSPDJLDC, 6F SeibuButsuryuCenter, P.O. Box 292; Phoenix, Arizona or Tatsumi KotoKu, Tokyo 35, Japan MFAX: RMFAX@ .sps.mot.com TOUCHTONE ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, INTERNET: 5 Ting Kok Road, Tai Po, N.T., Hong Kong MOTOROLA ANALOG IC DEVICE DATA MC348/D

MC34085BP HIGH PERFORMANCE JFET INPUT OPERATIONAL AMPLIFIERS

MC34085BP HIGH PERFORMANCE JFET INPUT OPERATIONAL AMPLIFIERS These devices are a new generation of high speed JFET input monolithic operational amplifiers. Innovative design concepts along with JFET technology provide wide gain bandwidth product and high slew rate.