RF- Communication Circuits

Transcription

1 RF- Communication Circuits Chap.5, Power and Nonlinear RF-Amplifiers Class Notes 345 NB33

2 ii, RF-Communication Circuits

3 CONTENTS iii CONTENTS Chap.5 Power and Nonlinear RF-Amplifiers 5 - RF-Power Amplifier Basics A Parallel-Tuned Prototype Amplifier High Efficiency Prototype Amplifiers Saturation Limitations in Parallel-Tuned Amplifiers Square-Law FET s in Parallel-Tuned Amplifiers, Bipolar Transistors in Parallel-Tuned Amplifiers RF Power Amplifier Design and Operation Power Amplifiers in Practice Series-Tuned RF-power Amplifiers... 3 Example 5 -- A Series Tuned Narrowband Power Amplifier Design Nonlinear Amplifiers and Limiters Limiting Amplifiers with Bipolar Transistors... 5 Example 5-3- Limiting BJT Amplifier Limiting with Bipolar Differential Amplifiers Chap.5, References and Supplementary Literature Chap.5, Problems INDEX 69 iii

4 iv, RF-Communication Circuits

5 Chap.5 Power and Nonlinear RF-Amplifiers Objectives in the design of power amplifiers, which makes the difference to other amplifier considerations, are typically to get most power out of the relatively expensive power-transistors and to maximize the efficiency by which DC-supplower is converted to RF-output power. The last criterion might be of importance to save battery in hand-held equipment or to avoid bulky cooling arrangements. We shall see below that a single transistor stage cannot be operated to more than 5% efficiency with linear amplification. To go beyond this limit, the transistors must be biased and driven into nonlinear operation. Nonlinear operation clearly limits the type of signals that can be handled without compromising the integrity of the messages being amplified. Shortly, all single signals of the constant envelope types, where the information is modulated on phase or frequency, may be processed directly. Multiple signals or signals with modulations in amplitude are distorted in a single stage nonlinear amplifier. To achieve linear amplification with high efficiency more stages may be combined or other measures may be taken. These so-called linearization techniques are, however, not the scope of the presentation below and you should consult the literature like ref s [5- ],[5-] for details. A series of other signal conditioning circuits in RF-communications are based on the same nonlinear device characteristics that provide high-efficiencower amplification. Examples are frequency multipliers, oscillator amplifiers, limiters, and classes of mixers. In these cases some of the applied signals are large enough to enforce nonlinear operations. The presentation below includes nonlinear amplification for such applications too, where the functional properties rather than power capability and efficiency are the prime concerns.

6 Chap.5, Power and Nonlinear RF-Amplifiers 5 - RF-Power Amplifier Basics The large-signal operation of transistors in power amplifiers means that complicated transistor models are required to get precise results whether we use traditional analysis or resort to simulations. However, such models are not easily achieved and even if they are available, it is not certain that therovide interpretable results. To provide a basic understanding of nonlinear amplification and guide the design process, a few prototype power amplifiers are considered below. They are simplified too much for practical applications, but they focus attention on some very basic properties of the nonlinear characteristics that control the operation of the circuits A Parallel-Tuned Prototype Amplifier. The prototype power amplifier to be considered first is shown in Figure 5-. It uses an idealized transistor model like the one in Figure 5- with a piecewise-linear input characteristic. The model resembles a power MOSFET with break-point at the pinch or threshold voltage V P, where the input, output, and feed-back capacitances are ignored. At the input side of the amplifier circuit, the transistor presents no load to the driving and biasing voltage sources, V g cos t and V g respectively. The transistor is supposed to be biased and driven so it neither becomes inverted nor saturated. The assumption simplifies the transistor model considerably, but it is required that its output stays within the region < V ds < V dmax and < I d < I dmax. At the output side of the amplifier, the RF-choke L chk separates the drain current I d into the DC component I d, which comes from the battery, and harmonic components, I d, I d etc., which flow through the coupling capacitor C cpl. The parallel tuning by L,C to the operating frequency is supposed to short-circuit all but the fundamental current component, which remains the only one to drive the load R. Consequently, the drain voltage V ds is dominated by the fundamental frequency component in addition to its DC-value. In stationary situations there can be no DC voltage across the choke L chk, so the DC component of V ds equals the battery voltage V DD. It should be realized that biasing through an inductor implies a drain voltage, which swings symmetrically below and above the battery voltage. + VDD V d L chk I d C cpl I d cosω t V g cosω t I d V ds V L -V d cosω t V gs C L R V g tuned to ω Figure 5- Prototype power amplifier. Parallel tuning short-circuits nd and higher harmonic drain current components. The transistor has the idealized characteristics in Figure 5-. RF-Communication Circuits

7 5 - RF-Power Amplifier Basics 3 g d s g V gs I d (V gs ) d V ds I dmax I d slope G m I dmax I d V gs >V P s (a) s (b) V P V gs V gs V P (c) V ds V dmax Figure 5- Simplified large-signal break-point model of a power MOSFET. The transistor is biased and operated to stay inside the region in (c) where < V ds < V dmax and < I d < I dmax. Choosing time origin to provide symmetric drain current and drain-source voltage wave shapes, the Fourier expansions hold cosine terms only. They are expressed I d + I d cos o t + I d cos o t + I d3 cos3 o t +, I d (5-) V ds V d V d cos o t V d cos o t V d3 cos3 o t V d V d cos o t ( parallel tuning ) (5-) The fundamental frequency components of the current and the voltage are 8 o out of phase in the circuit, which is the reason for the sign convention of the voltage expansion. The last simplified voltage expression includes parallel tuning and the assumption of keeping the drainsource voltage in the assumed range < V ds < V dmax. Expressed by Fourier coefficients the amplifier output power and the corresponding batterower are I d P out V d I d V d P bat I d V d. (5-3) The efficiency is defined as the ratio of output power over batterower Efficiency (simple) : P out P bat -- I d V d I d V d (5-4) Batterower not transferred to the load is lost in the transistor. It is given by P trans P bat P out P bat. (5-5). The simplified voltage driven amplifier requires no input power, so the efficiency definition is indisputable. If input power contributes significantly to the power budget, the present definition is sometimes emphasized by terms like simple drain (collector) or battery efficiency. An alternative is here the socalled power added efficiency, which expresses the difference between output and input powers over the batterower.

8 4 Chap.5, Power and Nonlinear RF-Amplifiers I d (b) slope G m I dmax I d I (c) d I d I dmax I d I d slope (d) -/R L V gs >V P V P V gs I dmax ωt V d V ds V dmax V G m g V g V gs V ds V d V ds V d V d ωt (a) (f) ωt ωt (e) Figure 5-3 Driving and loading the prototype amplifier to give maximum output power in linear, class A operation. Figures (b) and (d) are the transistor characteristics from Figure 5-. In traditional linear amplifications, both the drain current and the drain voltage are sinusoidal and proportional to a sinusoidal gate drive voltage V g. Staying in the region <Vds, <Id, amplitudes of sinusoidal currents and voltages must be less than or equal to the corresponding DC-values, V d < V d and I d < I d. According to Eq.(5-4), simultaneous equality in both conditions implies maximum efficiency. To get maximum output power from the transistor, it should be driven to its maximum voltage and current limits like the conditions that are shown in Figure 5-3.The input bias V g and drive amplitude V g are chosen in (a) and (b) to let the input voltage swing across the whole active input range of the transistor, which starts from the pinch voltage V P and goes up to the voltage that provides the maximum drain current I dmax. If the transistor is specified barameters V P, G m, I dmax, and V dmax, the input drive and bias voltage become V g V g V g V P I + V dmax P V g G m I V g dmax G m I V g V dmax P G m (5-6) By that, the DC drain current becomes half the maximum current I dmax and the drain current remains sinusoidal with amplitude equal to the DC-value, I d I d, as indicated by (c) in the figure. To get maximum output voltage swing, (d) and (e) show that the battery voltage and the load resistance must be chosen by V V DD V d V dmax d R L V dmax I dmax (5-7) RF-Communication Circuits

9 5 - RF-Power Amplifier Basics 5 Output power and batterower corresponding to these selections are P out Amax I dmax V dmax I dmax V dmax P 8 bat Amax I dmax V dmax (5-8) The "A" in the subscript refers to a common convention of calling a linearly driven power amplifier a class A amplifier. The output power is half the batterower so we get a maximum efficiency of Amax P out Amax P bat Amax --. (5-9) The other half of the batterower is lost by heating up the transistor. In practical situations it must be checked that the transistor may withstand this heating High Efficiency Prototype Amplifiers Efficiency greater than 5% in the prototype amplifier requires, as indicated by Eq.(5-4), that either the voltage or the current fundamental frequency over mean value ratio must exceed one. With a single-polarity voltage or current, the maximum possible ratio is two which is approached if the waveshape becomes a train of pulses. To see this, consider the train of symmetrical pulses in Figure 5-4, which has the Fourier expansion yt y + y cost + y cost + (5-) By definition, the mean value and the st harmonic component are y ytdt y -- ytcost d. (5-) If the pulse-width shrinks and differs from zero only in intervals where the cosine factor is approximately one, the fundamental frequency component becomes twice the mean value of the signal, y -- yt dt y. (5-) y(ωt) Figure 5-4 θ Pulse train. If reduces towards zero, the fundamental frequency component approaches twice the mean value regardless of the pulse-shape θ ωt

10 6 Chap.5, Power and Nonlinear RF-Amplifiers It should be mentioned that the result above also applies to unsymmetric pulses. Symmetry was introduced only to ease the calculation. Due to the parallel tuning, current pulsing is the natural choice in the prototype amplifier. To get a train of current pulses, the transistor must be driven nonlinearly which causes higher harmonic current components in addition to the fundamental frequency component. Barallel tuning, however, higher harmonic components may be removed from the output voltage. Table 5- holds mean values and harmonic components when a simple break-point characteristics is driven to produce a sequence of sine-tips as shown in Figure 5-5. The free argument is called the conduction angle. For a given device, i.e. a fixed break-point X k, the angle is determined by input bias X and amplitude X. To be defined it requires that the range of inputs includes X k. From Figure 5-5 we get X k X X cos -- X k X X k X or acos X X (5-3) Introducing the conduction angle simplifies expressions for the output signal, where yt X cost + X X k X cost cos-- t + p otherwise. -- (5-4) The results in the table are all normalized with respect to the peak-value of the pulses X cos--. (5-5) The mean value and harmonic components are evaluated as Fourier coefficients through X y cos t cos-- dt X sin-- -- cos--, (5-6) X y cos t cos-- cost dt X cos -- sin --, (5-7) X y n cos t cos-- cosnt dt X nn cos-- sin----- n nsin-- cos----- n n. (5-8) Besides table entries the normalized harmonic components and mean-value are shown in Fig.6. The ratio of two between harmonic components and the mean value is readily observed at small conduction angles. In the other end of the scale a conduction angle of 36 o corresponds to the linear class-a driven amplifier and no higher harmonic components are present.. Note, some authors designate half the conduction angle to the independent variable in order to simplify expressions for the Fourier coefficients. RF-Communication Circuits

11 5 - RF-Power Amplifier Basics 7 y y(ωt) slope α x ωt X X k θ θ θ X cosωt x y / y / y / y 3 / Figure 5-5 ωt Sinusoidal driving of a breakpoint characteristic Table 5- Normalized Fourier Coefficients for Train of Sine Tip Pulses. y /, normalized mean (DC) value y /, normalized fundamental frequency component y /, normalized nd harmonic component y 3 /, normalized 3rd harmonic component Normalizations are made with respect to the pulse peak value,

12 8 Chap.5, Power and Nonlinear RF-Amplifiers.6.5 y.4.3 y. y. y 4 y 3. y θ Figure 5-6 Plot of Table 5- showing normalized mean-values and harmonic components for a train of sine tip pulses. Note, all components are twice the mean-value in the limit Broper adjustment of the voltage bias, the input drive voltage, and the load resistance, all conduction angles between zero and 36 o are obtainable with the prototype amplifier in Figure 5-. For a given choice, we get maximum output power if the transistor is again driven to its maximum ratings with respect to the drain current and voltage. One such situation is sketched in Figure 5-7. Suppose the conduction angle is given. Then part (a) and (b) in this figure indicate that the input bias and drive voltage must provide a total gate-source voltage V gs, which equals the pinch voltage V P at the beginning and the end of the current pulses at t +/. Furthermore, at t, the gate drive must imply maximum current. These two requirements give V g + V g cos-- V P, V g I dmax + V P , V g G m I dmax G m V g , cos-- I cos-- dmax V g V P G m cos-- (5-9) With known conduction angle and maximum current I dmax, the drain current mean value I d and the fundamental frequency component I d follows from the Fourier coefficients, which are given by either Table 5- or Figure 5-6. Maximum sinusoidal output voltage requires still that the battery voltage and the output amplitude are both half the maximum voltage V dmax. The load resistor must be chosen to provide this amplitude with the known current amplitude I d. In summary y y I d ---- V I dmax I d ---- I dmax V d V DD V dmax d R L V d I d V dmax I d (5-) RF-Communication Circuits

13 5 - RF-Power Amplifier Basics 9 I d (b) I (c) d I (d) d I dmax I dmax slope G m V gs >V P θ V P V gs I dmax G m I d V g V g V gs ωt θ θ V ds V d V d V ds V dmax V ds ωt V d ωt (a) (f) ωt (e) V d Figure 5-7 Driving and loading the prototype amplifier from Figure 5- for maximum output power in nonlinear operation. It should be observed, that the operating trajectory in the output characteristic of Figure 5-7(d) contains the effect of all harmonic current components, so the slope that differs from zero is not inverselroportional to -R L like the situation of the linearly driven class A case. Adjusted to provide maximum undistorted output power at every conduction angel, the powers and the amplifier efficiency from Eqs.(5-3) and (5-4) now become P out vmx I d V d -- y I dmax V dmax, (5-) I d V d -- y ---- P bat vmx I dmax V dmax, (5-) P out vmx P bat vmx -- y y. (5-3) Using the batterower in maximum linear output from Eq.(5-8) as a reference, which relates to the current and voltage ratings of the transistor through P ref P bat Amax I dmax V dmax , 4 (5-4)

14 Chap.5, Power and Nonlinear RF-Amplifiers the results above are normalized to yield p out P out vmx P ref y P ---- p bat vmx bat y ---- P ref. (5-5) The relative power that is lost in the transistor becomes similarly p trans p bat p out y ---- y (5-6) All the normalized powers and the amplifier efficiency are plotted in Figure 5-8 as function of the conduction angle. The figure indicates a common amplifier classification based on the angle. Class A, which stands for linear operation, has already been introduced, class B refer to the situation where the transistor conducts current in exactly half the period time. The corresponding efficiency is 75%. Between these two bounds the operation of the amplifier is called class AB. It is seen in the figure that inside this region at 45 o, we get most output power from a given transistor with an efficiency around 65%. If the transistor conducts current in less than half the period time, which means <8 o, the amplifier is said to operate in class C. It is in this mode of operation that really high efficiencies are obtainable in the idealized prototype amplifier. However, in class C the output power drops significantly below the maximum power capability of the transistor. In the limit when is approaching zero and efficiency goes towards %, the amplifier delivers no output power. The reason is that the current pulses are bounded in peak-value to I dmax, so their impetus to resultant current terms - both the mean value and the harmonic components - follow towards zero η p bat.5.4 p out.3. p trans θ class C class B class AB class A Figure 5-8 Efficiency and normalized powers as function of the conduction angle in the parallel-tuned prototype amplifier from Figure 5-. RF-Communication Circuits

15 5 - RF-Power Amplifier Basics I d I d I d I dmax V gs >V P I dmax slope R dd V gs >V P ωt θ (a) V V V ds dmin dmax V dmin V dmax V d V ds V d V ds V ds V d V d ωt (b) ωt (c) Figure 5-9 Limitation of the minimum output voltage due to saturation (b) or to a significant series resistance R dd (c). In both cases V ds must stay above V dmin to ensure a sinusoidal output voltage Saturation Limitations in Parallel-Tuned Amplifiers With physical transistors the full voltage range from zero and up to the maximum rating is not available for the output swing in parallel tuning. If the simple diagram in Figure 5-(a) shall apply and the output remains an undistorted sinusoidal voltage, the transistor must not be driven harder than saturation is avoided. Figure 5-9 (b) and (c) show two typical output characteristics with saturation. In either case we may set a minimum value V dmin for the drain-source voltage. Introducing the ratio w of the minimum voltage over the maximum voltage will ease comparisons with the previous results. Using V dmin w , V dmax (5-7) the maximum voltage amplitude and the pertinent mean and battery voltages now become V V dmax V dmin d w V dmax V V d V dmax + V dmin DD w V dmax (5-8) Compared to the similar voltage expressions in Eq.(5-), it is seen that the two parentheses containing w make the differences to former results. Limiting the output voltage swing gets no influence on the currents through the transistor, so we get w y w I 4 dmax V dmax P bat vmx y ---- P out vmx I dmax V dmax, (5-9) P out vmx P bat vmx w y w y. (5-3)

16 Chap.5, Power and Nonlinear RF-Amplifiers The parentheses holding w are also the only changes to the results in Eqs.(5-) to (5-3), which were derived using V dmin. We shall again normalize relative to the maximum batterower in class A operation, which now is expressed P ref + w P bat Amax I dmax V dmax. (5-3) This leaves the normalize batterower unaffected from the one in Eq.(5-5), while the normalized output and transistor powers become p out P out vmx P ref w y ---- p + w trans p bat p out y w y w. (5-3). W η p bat.4 p out.3. p trans W. θ η p bat p out p trans Figure 5- Normalized performance of the parallel-tuned power amplifier if the minimum voltage is bounded by saturation using w.5 and w. respectively. The dotted curves are from Figure 5-8 and correspond to w. θ RF-Communication Circuits

17 5 - RF-Power Amplifier Basics 3 Effects of a minimum drain-source voltage, which is greater than zero, are demonstrated in Figure 5- for w.5 and w. respectively. In both cases, the results are compared with the similar curves from Figure 5-8 that had the lower voltage bound set to zero corresponding to w. As seen, even modest V dmin values substantially lower both the efficiency and the maximum output power from the promises of the ideal prototype amplifier Square-Law FET s in Parallel-Tuned Amplifiers, g d s g I d (V gs ) d I dmax I d I dmax I d V gs V ds V gs >V P s (a) s V P Details on how amplifier powers and efficiency depend upon the conduction angle are governed by the shape of the current pulses through the transistors. They again are determined by the driving characteristics of the device. The piecewise linear break-point characteristics in the prototype amplifier above is a reasonable first approximation to a power MOSFET. However, the uniformly doped junction FET, which is presented in most text-books to exemplify the whole FET family of transistors, has a square-law driving characteristics. This is indicated by Figure 5-(b) where V P is the pinch-off of threshold voltage. To make comparisons, we develop the corresponding mean values and harmonic components following the scheme from Eqs.(5-3) through (5-8), again introducing the conduction angle as a measure for period where the transistor conducts current. Expressed in the neutral variables of Fig.3 we get (b) V gs (c) V gs V P V ds V dmax Figure 5- Simplified large-signal square-law model of a JFET. The transistor is biased and operated to stay inside the region in (c) where < V ds < V dmax and < I d < I dmax. X p X X cos-- X p X or cos X X p X X. (5-33) yt cx cost + X X k cx cost cos-- t + p otherwise. -- (5-34) Mean value and harmonic components are now evaluated through cx y cos t cos-- dt cx y cos t cos-- costdt cx sin + -- cos, 4 4 cx sin sin cos --, 6 (5-35) (5-36)

18 4 Chap.5, Power and Nonlinear RF-Amplifiers The expressions for normalized powers in Eqs.(5-5) and (5-6) apply still if the harmonic components now are taken from Table 5- and the normalization is made with respect to the power reference P ref in Eq.(5-4). With a square-law device, the efficiency and normalized bat- cx y cos t cos-- cost dt cx sin sin 4 3 4, (5-37) cx y n cos t cos-- cosnt dt 4 n sin n n n sin n cos + 3nsin n cx nn n n. 4 (5-38) Numerical values of the Fourier coefficients are given in Table 5-, where they are normalized with respect to the peak-value of the pulses. In the square-law case it is given by cx cos--. (5-39) The table entries are plotted in Figure 5-. Also here the ratio of two between harmonic components and the mean value is observed at small conduction angles. In contrast to the previous break-point case in Figure 5-5, a conduction angle of 36 o still implies nonlinear operation. This is seen from the fact that a second harmonic component remains in this limit. The square-law characteristic implies that no components at orders higher than two are present when the device conducts all the time y.3 y. y. y 4 y 3. y θ Figure 5- Plot of Table 5- showing normalized mean-values and harmonic components for a train of squarelaw pulses. Note, all harmonic components are twice the mean-values from y / in the limit RF-Communication Circuits

19 5 - RF-Power Amplifier Basics 5 y y c(x-x P ) y(ωt) x ωt X X P x θ y / y / y / y 3 / θ θ X cosωt ωt Figure 5-3 Sinusoidal driving of a square-law characteristic Table 5- Normalized Fourier Coefficients for Train of Square-Law Pulses. y /, normalized mean (DC) value y /, normalized fundamental frequency component y /, normalized nd harmonic component y 3 /, normalized 3rd harmonic component Normalizations are made with respect to the pulse peak value,

20 6 Chap.5, Power and Nonlinear RF-Amplifiers η p bat.5.4 p out.3. p trans θ class C class B class AB cotinous conduction Figure 5-4 Efficiency and normalized powers as function of the conduction angle in a square-law device parallel-tuned prototype amplifier. tery, output, and transistor powers get the shapes in Figure 5-4. Formerly, with the piecewiselinear results in Figure 5-8, the normalizing power P ref had an additional interpretation as the batterower consumption in the class-a limit, where the transistor was conducting continuously. As seen in the new figure, this amount of power cannot be consumed in the amplifier with a square-law device so in the square-law context, P ref should be considered as no more than way to include transistor ratings. The nonlinear operation persists also in continuous conduction, and in consequence this amplifier operates with higher efficiency than the piecewise linear prototype amplifier at equal conduction angles. In the continuous limit of 36 o we shall here avoid the class-a term, since this is mostly connected with the property of linear amplification Bipolar Transistors in Parallel-Tuned Amplifiers Bipolar transistors have an exponential characteristics, which is caused by the base emitter diode. A simple large signal model of a npn transistor is shown in Figure 5-5, where again capacitive components are left out. Most of the current through the base-emitter diode current b c e b V be e α f I e I e (V be ) c V ce e (a) (b) (c) I e V be I cmax I c V be V ce V cemax Figure 5-5 Simplified large-signal model of a bipolar junction transistor, BJT. The transistor is biased and operated to stay inside the normal forward active region in (c) where < V ce < V cemax and < I c < I cmax. RF-Communication Circuits

21 5 - RF-Power Amplifier Basics 7 + VCC V c L chk I c C cpl I c cosω t V b cosω t I b I c V ce V L -V c cosω t V b V be I e C L R tuned to ω Figure 5-6 Parallel-tuned prototype power amplifier with a bipolar transistor. The transistor model, which idealized exponential characteristics, is shown in Figure 5-5. is injected across the base to the collector. This fraction, f, is assumed constant and slightly below one. The remaining fraction, - f, is the base current, so in contrast to the FET models above, the simplified BJT model includes an finite input impedance. In the amplifier of Figure 5-6, the BJT has directly replaced the MOSFET in the initial prototype amplifier from Figure 5-. The new amplifier is still voltage controlled, so the input impedance will not influence the output properties, which we are going to consider here. Like the foregoing cases, the primary assumption for the model is that the transistor is biased and operated to stay within the voltage and current bounds for active operation as indicated by Figure 5-5(c). The emitter current is described by the expression for an ideal diode I e I ES e V be V t I ES e V be V t V t kt mV q T 3K. (5-4) The saturation current I ES is rather small in modern transistors, - A to -5 A, so the last approximation is usable in most of the situations we shall consider. In the assumed region of operation, both the collector and the base currents are taken proportional to I e and - in consequence - proportional to each other with the forward current gain ß f as the factor of proportionality, I c I f I e I b f I c e --- where f f f f (5-4) With sinusoidal driving, the emitter current is approximated V be V b + V b cos t I e I ES e V bo V t e V bcos t V t. (5-4) The two exponential factors in the current expression separate the effect of the input bias voltage, V b, and the driving amplitude, V b. The current factor I ES exp(v bo /V t ) is common for all DC and harmonic current components, which further include the Fourier expansion of a sinu-

22 8 Chap.5, Power and Nonlinear RF-Amplifiers soidally driven exponential function. Choosing a time origin that makes the current wave-shape symmetrical, its Fourier expansion is given through e x cos t I ˆ n x y n xcosn t + I ˆ xcos t + I ˆ xcos t + I nˆ xcosn t +. (5-43) The coefficients are not expressible in simple terms, but are developed through the so-called modified Bessel functions of st kind with orders corresponding to the particular harmonic component. Conventionally, the functions are denoted by capital I's, but to avoid confusion with harmonic current components, hatted I's are used to indicate modified Bessel functions in the normalized expansion of Eq.(5-43) and below. The shape of the modified Bessel functions are shown in Figure 5-7. In terms of the Fourier coefficients, the emitter current in the transistor may be written I e I en cosn t where n I en I ES e V bo V t y n x I ES e V bo V t I ˆ x n, I ˆ n x n, x V b V t (5-44) The zero-order modified Bessel function is distinct in the sense that it is the only one not having a leading factor of two in the Fourier expansion from Eq.(5-43) and, furthermore, the only function that does not vanish when the argument goes towards zero. Instead it approaches one, so the common constant current I ES exp(v bo /V t ) maintains its interpretation of being the DC current at a given voltage bias V b under small-signal excursions where xv b /V t «. In this limit, the modified Bessel functions may be approximated by, ref.[5-3] Eq. 9.6., I nˆ x x -- x n -- x k! k+ n! k k I ˆ I nˆ x x x x x , x n! -- n. (5-45) Under large signal conditions with x>>, the emitter DC current is no longer kept constant but increases in proportion to Î (x) while the harmonic components increase as twice the correspondingly ordered modified Bessel function. They have the asymptotic approximations, ref.[5-3] Eq.9.7., I nˆ x x e x» n x 8x I ˆ I ˆ x x x x e x» e x» x , 8x x x (5-46) RF-Communication Circuits

23 5 - RF-Power Amplifier Basics 9, ^I ^I ^I 75 ^I 3 ^I ^I 4 ^I 5 5 ^I 5 ^I 4 ^I 3 5 ^I ^I x x. Figure 5-7 Modified Bessel functions of the first kind. The hats are introduced to avoid confusion with current component symbols. The current peak value, which corresponds to instants where all the harmonic y n components are in phase, is e x. (5-47) Taken relative to this peak value, the harmonic components get shapes as shown by Figure 5-8, where xv b /V t is the independent argument. The larger x, the more heavily is the transistor driven into pulsed nonlinear operation as seen from the first harmonic component, which approaches twice the mean value in the high x end, say from x5 or V b 5 mv and up. The xv b /V t argument has no counterpart in the previous FET transistor models, which have conduction angles as arguments. The exponential characteristic in the present approximation has no direct bounds for distinguishing between conduction and cut-off as the function value stays above zero for any finite argument. To make comparisons with previous characteristics, we shall define a conduction angle as the phase range of the sinusoidal input signal, where the emitter current is greater that % of the peak current. We get, e xcos ex x log cos-- or cos log x (5-48)

24 Chap.5, Power and Nonlinear RF-Amplifiers y y y yp y3 y 4 y Figure 5-8 Normalized mean-value and harmonic components for a train of pulses from a sinusoidally driven exponential characteristic, where xv b /V t is the normalized driving amplitude. This relationship is included in Table 5-, which gives the normalized mean values up to the third harmonic components of the exponential characteristic. It is worth noticing that with this conduction angle limit, class C operation starts when the normalized input voltage x exceeds approximately five. A few more harmonic components are included in Figure 5-, where they are normalized with respect to the peak value from Eq.(5-47). As the current gain in the transistor is taken constant, there are no reasons to distinguish between emitter and collector currents in the normalized curves of Figure 5-. They are directly usable at the output side of the transistor by Eqs.(5-5) and (5-6) to provide the amplifier performance curves that are shown in x y.3 y.. y 4 y 3 y. y θ Figure 5-9 Normalized mean-value and harmonic components for a train of pulses from a sinusoidally driven exponential characteristic. The conduction angle is approximated by Eq.(5-48). RF-Communication Circuits

25 5 - RF-Power Amplifier Basics y ye x y(ωt) x ωt X θ θ θ X cosωt x x y / y / y / y 3 / inf ωt Figure 5- Sinusoidal driving of an exponential characteristic. Table 5- Normalized Fourier Coefficients for Train of Exponential Pulses. x, normalized input-drive y /, normalized mean (DC) value y /, normalized fundamental frequency component y /, normalized nd harmonic component y 3 /, normalized 3rd harmonic component Normalizations are made with respect to the pulse peak value,. The conduction angles is defined as the distance between arguments that output % of the peak value

26 Chap.5, Power and Nonlinear RF-Amplifiers Figure 5-. At the output side, battery, output, and transistor powers are normalized with respect to voltage and current ratings through the quantity P rat ¼V cemax I emax. The exponential characteristic produces sharper pulses than we have seen before. At a given conduction angle, the content of higher harmonic components compared to the fundamental frequency component is greater than the contents in both the piecewise linear and the squarelaw pulses from Figure 5-6 and Figure 5- respectively η.7.6 p bat p out. p trans θ class C class B class AB cotinous conduction Figure 5- Efficiency and normalized powers of a BJT parallel-tuned prototype amplifier as function of the approximated conduction angle, Eq.(5-48). RF-Communication Circuits

27 5 - RF Power Amplifier Design and Operation RF Power Amplifier Design and Operation The preceding section is focused on how the nonlinear transfer characteristics of transistors are used to enhance amplifier efficiencies compared to the figures, which we may get from linearly driven circuits. Below we shall consider a few practical aspects of power amplifier design. However, it should still be kept in mind that due to the heavily nonlinear operation of the transistors, it is difficult to get precise analytical results that directly suits the needs in the design process. Nevertheless, approximated results and qualitative descriptions may be useful for setting up design goals and interpreting experimental or simulated results Power Amplifiers in Practice In this section we take outset in the data-sheet specifications for a MOSFET power transistor. It is reproduced in Figure 5- to Figure 5-6 on the following pages. 3 We shall refer to figures inside the specification by an additional slash, so the Gate Voltage versus Drain Current characteristics is found in Figure 5-4/6. There are two main observations from this figure, first the broad uncertainty range in pinch voltage and, consequently, in the horizontal position of the curve. Second, the shape of the characteristic lies between the cases we have considered above since it is linear at high current levels but at low levels it resembles an ideal square-law FET characteristic. Skimming through the data sheets from the beginning, the first page, Figure 5-, contains transistor rating and a general description, which states that this transistor is intended for linear applications at power levels to 5 W and frequencies to 5 MHz. The following page, Figure 5-, holds electrical characteristics, first the off and on characteristics, i.e. a type of data that are common for power transistors. The subsequent section shows the low-frequency capacitances of the transistor. Their interpretations are described in Figure 5-6. Next follows functional test data. They hold information that is important for evaluating the RF performance of the transistor, especially with respect to linearity at high output power levels. There are manractical applications that assumes linearity, but where also high efficiency of nonlinear operation is required. One such situation occurs if two RF channels must be amplified simultaneously. We know from section IV-4 that the nonlinearities provide intermodulation between the channels, so the question is whether or not the intermodulation levels are tolerable in the given application. Test circuits are here the amplifiers in Figure 5-3/ and Figure 5-5/8 at 3 MHz and 5 MHz respectively. The functional tests are called SSB, single sideband, which in this case means, that intermodulation data refer to one set of sidebands in a two-tone test. The test setup is equal to the one used for finding intercept points, which was discussed in section IV-4, pp Instead of specifying intercept points, the intermodulation distortions IMD (d3), IMD (d5) etc. in the data-sheets approximate the intermodulation ratios of the type that was exemplified for third order by im3 in Eq.IV-(48). These measures are functions of the power level and the approximations are accurate as far as the input output relationships follow their linear asymptotes in db-scaled plots like Fig.IV-47. This is the case until compression effects become significant. 3. The MFR5 transistor is no longer produced by Freescale, which formerly was the semiconductor part of Motorola. The transistor is still produced by other suppliers, but the original data-sheet, which we use here, remains the most informative one.

28 4 Chap.5, Power and Nonlinear RF-Amplifiers SEMICONDUCTOR TECHNICA L DATA Order this document by MRF5/D The RF MOSFET Line N-Channel Enhancement-Mode Designed primarily for linear large-s ignal output stages up to 5 MHz frequency range. Specified 5 Volts, 3 MHz Characteristics Output Power 5 Watts Power Gain 7 db (Typ) Efficiency 45% (Typ) Superior High Order IMD IMD (d3) (5 W PEP) - 3 db (Typ) IMD (d) (5 W PEP) - 6 db (Typ) % Tested For Load Mismatch At All Phase Angles With 3: VSWR S-Parameters Available for Download into Frequency Domain Simulators. See 5 W, to 5 MHz N-CHANNEL MOS LINEAR RF POWER FET D G S CASE -, STYLE MAXIMUM RATINGS Rating Symbol Value Unit Drain-Sourc e Voltage V DSS 5 Vdc Drain-Gate Voltage V DGO 5 Vdc Gate-Source Voltage V GS +4 Vdc Drain Current - Continuous I D 6 Adc Total Device T C 5 deg C Derate above 5 deg C P D 3.7 Watts W/ degc Storage Temperature Range T stg - 65 to +5 degc Operating Junction Temperature T J degc THERMAL CHARACTERISTICS Characteristic Symbol Max Unit Thermal Resistance, Junction to Case R θjc.6 degc/w NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed REV 9 Ω MOTOROLA Motorola, Inc. 998 RF DEVICE DATA MRF5 Figure 5- Extracts from the MRF5 transistor data-sheet. RF-Communication Circuits

29 5 - RF Power Amplifier Design and Operation 5 ELECTRICAL CHARACTERISTICS (T C 5 deg C unless otherwise noted.) OFF CHARACTERISTICS Characteristic Symbol Min Typ Max Unit Drain-Source Breakdown Voltage (V GS, I D ma) V (BR)DSS Vdc Zero Gate Voltage Drain Current (V DS 5 V, V GS ) I DSS madc Gate-Body Leakage Current (V GS V, V DS ) I GSS - -. μadc ON CHARACTERISTICS Gate Threshold Voltage (V DS V, I D ma) V GS(th) Vdc Drain-Source On-Voltage (V GS V, I D A) V DS(on) Vdc Forward Transconductance (V DS V, I D 5. A) g fs mhos DYNAMIC CHARACTERISTICS Input Capacitance (V DS 5 V, V GS, f. MHz) C iss pf Output Capacitance (V DS 5 V, V GS, f. MHz) C oss pf Reverse Transfer Capacitance (V DS 5 V, V GS, f. MHz) C rss pf FUNCTIONAL TESTS (SSB) Common Source Amplifier Power Gain f 3 MHz (V DD 5 V, P out 5 W (PEP), I DQ 5 ma) f 5 MHz Drain Efficiency (V DD 5 V, P out 5 W (PEP), f 3; 3. MHz, I D (Max) 3.75 A) Intermodulation Distortion () (V DD 5 V, P out 5 W (PEP), f 3 MHz, f 3. MHz, I DQ 5 ma) Load Mismatch (V DD 5 V, P out 5 W (PEP), f 3; 3. MHz, I DQ 5 ma, VSWR 3: at all Phase Angles) CLASS A PERFORMANCE Intermodulation Distortion () and Power Gain (V DD 5 V, P out 5 W (PEP), f 3 MHz, f 3. MHz, I DQ 3. A) G ps η % IMD (d3) - IMD (d) - ψ G PS IMD (d3) IMD (d9-3) NOTE:. To MIL-STD-3 Version A, Test Method 4B, Two Tone, Reference Each Tone No Degradation in Output Power L L BIAS V V C5 C6 C7 C8 C9 C - ± R DUT T RF R3 C OUTPUT RF T C4 INPUT C C3 R db db db C - 47 pf Dipped Mica C, C5, C6, C7, C8, C9 Ð. μf Ceramic Chip or Monolythic with Short Leads C3 - pf Unencapsulated Mica or Dipped Mica with Short Leads C4-5 pf Unencapsulated Mica or Dipped Mica with Short Leads C - μf/ V Electrolytic L - VK/4B Ferrite Choke or Equivalent, 3. μh L - Ferrite Bead(s),. μh R, R - 5 Ω/. W Carbon R3-3.3 Ω/. W Carbon (or. x 6.8 Ω// W in Parallel T - 9: Broadband T ransformer T - :9 Broadband T ransformer Figure. 3 MHz Test Circuit (Class AB) MRF5 MOTOROLA RF DEVICE DATA Figure 5-3 Extracts from the MRF5 transistor data-sheet.

30 6 Chap.5, Power and Nonlinear RF-Amplifiers POWER GAIN (db) V DD 5 V I DQ 5 ma P out 5 W (PEP) 5 5 f, FREQUENCY (MHz) P out, OUTPUT POWER (WATTS) 5 5 V DD 5 V 5 4 V I DQ 5 ma 5 5 V DD 5 V 4 5 V I DQ 5 ma P in, INPUT POWER (WATTS) 5 MHz 3 3 MHz 6 Figure. Power Gain versus Frequency Figure 3. Output Power versus Input Power IMD, INTERMODULATION DISTORTION (db) MHz d d 5-5 V DD 5 V, I DQ 5 ma, TONE SEPARATION khz MHz -4 d 3-45 d f T, UNITY GAIN FREQUENCY (MHz) 8 V DS 3 V 6 5 V P out, OUTPUT POWER (WATTS PEP) I D, DRAIN CURRENT (AMPS) Figure 4. IMD versus P out Figure 5. Common Source Unity Gain Frequency versus Drain Current I DS, DRAIN CURRENT (AMPS) V GS, GATE±SOURCE VOLTAGE (VOLTS) V DS V g fs 5 mhos Figure 6. Gate Voltage versus Drain Current MOTOROLA RF DEVICE DATA MRF5 3 Figure 5-4 Extracts from the MRF5 transistor data-sheet. RF-Communication Circuits

31 5 - RF Power Amplifier Design and Operation f 75 MHz 3 Z in Z OL * f 75 MHz Z o Ω V DD 5 V I DQ 5 ma P out 5 W PEP. Z OL * Conjugate of the optimum load impedance Z OL * into which the device output operates at a Z OL * given output power, voltage and frequency. NOTE: Gate Shunted by 5 Ohms. Figure 7. Series Equivalent Impedance RFC +5 Vdc BIAS - V RF INPUT C R C4 L + C5 R3 DUT L4 C6 L3 C L C7 + C C9 C8 RF OUTPUT C C3 R C, C, C8 - Arco 463 or equivalent C3-5 pf, Unelco C4 -. μf, Ceramic C5 -. μf, 5 WV Tantalum C6-5 pf, Unelco J C7-5 pf, Unelco J C9 - Arco 6 or equivalent C -.5 μf, Ceramic C - 5 μf, 6 WV Electrolytic L - 3/4" 8 A WG into Hairpin L - Printed Line,., x.5, L3 - " #6 A WG into Hairpin L4 - Turns #6 AWG, 5/6 ID RFC μh, Choke RFC - VK-4B R - 5 Ω,. W Carbon R - kω, / W Carbon R3 - Ω, / W Carbon Figure 8. 5 MHz Test Circuit (Class AB) MRF5 4 MOTOROLA RF DEVICE DATA Figure 5-5 Extracts from the MRF5 transistor data-sheet.

32 8 Chap.5, Power and Nonlinear RF-Amplifiers RF POWER MOSFET CONSIDERATIONS MOSFET CAPACITANCES The physical structure of a MOSFET results in capacitors between the terminals. The metal oxide gate structure determines the capacitors from gate-to-drain (C gd ), and gate±to±source (C gs ). The PN junction formed during the fabrication of the RF MOSFET results in a junction capacitance from drain-to-source (C ds ). These capacitances are characterized as input (C iss ), output (C oss ) and reverse transfer (C rss ) capacitances on data sheets. The relationships between the inter±terminal capacitances and those given on data sheets are shown below. The C iss can be specified in two ways:. Drain shorted to source and positive voltage at the gate.. Positive voltage of the drain in respect to source and zero volts at the gate. In the latter case the numbers are lower. However, neither method represents the actual operating conditions in RF applications. GATE C gd C gs DRAIN C ds SOURCE C iss C gd + C gs C oss C gd + C ds C rss C gd LINEARITY AND GAIN CHARACTERISTICS In addition to the typical IMD and power gain data presented, Figure 5 may give the designer additional information on the capabilities of this device. The graph represents the small signal unity current gain frequency at a given drain current level. This is equivalent to f T for bipolar transistors. Since this test is performed at a fast sweep speed, heating of the device does not occur. Thus, in normal use, the higher temperatures may degrade these characteristics to some extent. DRAIN CHARACTERISTICS One figure of merit for a FET is its static resistance in the full-on condition. This on±resistance, V DS(on), occurs in the linear region of the output characteristic and is specified under specific test conditions for gate-source voltage and drain current. For MOSFETs, V DS(on) has a positive temperature coefficient and constitutes an important design consideration at high temperatures, because it contributes to the power dissipation within the device. GATE CHARACTERISTICS The gate of the RF MOSFET is a polysilicon material, and is electrically isolated from the source by a layer of oxide. The input resistance is very high -- on the order of 9 ohms -- resulting in a leakage current of a few nanoamperes. Gate control is achieved by applying a positive voltage slightly in excess of the gate-to-source threshold voltage, V GS(th). Gate Voltage Rating --- Never exceed the gate voltage rating. Exceeding the rated V GS can result in permanent damage to the oxide layer in the gate region. Gate Termination --- The gates of these devices are essentially capacitors. Circuits that leave the gate open-circuited or floating should be avoided. These conditions can result in turn±on of the devices due to voltage build±up on the input capacitor due to leakage currents or pickup. Gate Protection ---These devices do not have an internal monolithic zener diode from gate-to-source. If gate protection is required, an external zener diode is recommended. Figure 5-6 Extracts from the MRF5 transistor data-sheet. The power conditions for the MRF5 transistor are given by a so-called peak envelope power, P PEP 5 W. To understand this specification, we consider the output spectrum that is actually measured in the two-tone test. It is a single-sided spectrum as sketched in Figure 5-7, where the amplified tones from the input and the intermodulation components are depicted in dbw scale, i.e powers are taken relative to one Watt. Since the amplifier is driven for nearly linear operation, the output power is dominated by the two original tones signals that are khz apart. Calling their equal output amplitudes across the load V ot and supposing that the load has the real part R L in parallel form, the average output power from the amplifier, P oav, becomes twice the power in one tone, P ot, V P ot V ot ot P R oav P ot L R L (5-49) By the trigonometric identity cosa + cosb a b a b cos cos, (5-5) RF-Communication Circuits

33 5 - RF Power Amplifier Design and Operation 9 [dbw] P PEP P oav P ot 3dB 3dB d 5 d 3 d 3 d 5 noise and spurious level 3f -f f -f f f f -f 3f -f Figure 5-7 Single-sided output power spectrum in a two-tone intermodulation distortion test. Note that the ratios d 3 and d 5 from the MRF5 Data sheets here play the same roles as the intermodulation ratios im3 and similarly im5 did in section IV by Figure IV-46(c) and Eq.IV-48. f[hz] the output voltage V out corresponding to two tones may be viewed upon as a carrier of twice the single tone amplitude, which is amplitude modulated by half the difference frequency. As illustrated by Figure 5-8 below, we have where V out V ot cos t + V ot cos t V ot cos tcost, (5-5) (5-5) The peak envelope power in the data sheets refers to the maximum instantaneous power in this expression. It is related to the average and single tone powers through P PEP V ot P R oav 4P ot, L (5-53) which in db scale, as indicated in Figure 5-6, reads P PEP dbw 3 + P oav dbw 6+ P ot dbw. (5-54) The functional tests part of the data sheets, still in Figure 5-3, shows that the typical drain efficiency is no more than 45%. It is a low value since the transistor is biased and driven in class AB. Without any signals applied, the gate bias is adjusted to give a non-zero drain DC current called I DQ equal to 5 ma. With 45% efficiency and 5 V battery voltage, the DC current at 5 W P PEP, correspondingly 75 W P oav, is I D P oav A,.45 5 V DD (5-55) a figure that is less than the promised maximum of 3.75A. The distinct rise in DC supply current when signals are applied indicates a nonlinear class AB operation of the type that is sketched in

34 3 Chap.5, Power and Nonlinear RF-Amplifiers I d I d V P V GG V gs I D I DQ ωt V out ωt ωt Figure 5-8 Class AB driving conditions in a two-tone intermodulation test of a power MOSFET. The output voltage V o corresponds to a parallel-tuned loading circuit with Q-factor equal to. Figure 5-8. If we suppose for a moment that the average operating of the transistor is halfway between class B and class A, then the ideal theoretical drain efficiencies of the break-point or the square-law characteristics from Figure 5-8 and Figure 5-3 are 6% and 7% respectively. so there is seemingly a considerable discrepancy to actual performance. On the other hand it should be kept in mind that we cannot compare the two results directly as the output power is not constant but varies between zero and the peak envelope power with the beat frequency. The transistor operates between low-efficiency class A and high-efficiency class AB to B with the same frequency, so we cannot achieve single-tone high efficiency results in a two-tone test. If the intermodulation distortion in class AB operation is intolerably high in a specific application, the last section of the functional test data shows rather low distortions if the transistor is driven in class A. This is done by increasing the DC current prior to applying signals, I DQ, to 3A and by reducing the signal power levels. Clearly this change lowers the efficiency further. If we suppose that the DC current stays at 3 A when signals are introduced, as it should in an ideal linear class A amplifier, the new peak envelope power of P PEP 5W implies an efficiency of two-tone P oav %, V DD I DD 5 3 (5-56) which is again much lower than the ideal, linear class A figure of 5%. Like the situation above, this comparison is not fair when two signal are applied. If we assume that the DC current remains unaffected if we apply on single tone to the amplifier, which provides the peak envelope RF-Communication Circuits

35 5 - RF Power Amplifier Design and Operation 3 power level of P oav, the single tone efficiency would be twice the figure above, and then we are much closer to the theoretical 5% limit. More details on amplifier performance with two tones in class AB driven test circuits are shown by the curves in Figure 5-4/-4. Although the relationships in Figure 5-4/3 are not completely linear at low power levels, it is first at drive levels that give outputs with P PEP around 5 W that distinct bendings of the output power versus input power curves are seen. A corresponding rise in the intermodulation products is shown by Figure 5-4/4. Keeping in mind, that the driving of the transistor in all cases follows the class AB scheme from Fig.9, the nearly linear performance of the test amplifiers below P PEP 5 W is remarkable The Smith chart in Figure 5-5/7 is the main data source for designing amplifiers with the MRF5 transistor. Notice that the Smith chart is normalized with respect to Ohm to get readable plots and taking the low impedance levels of the transistor into account. The data in the chart - especially their limitations - should be carefully considered and understood, [5-4],[5-5]. The transistor is mounted in a tunable test fixture and driven by a two-tone signal to provide the 5 W peak envelope power output or, equivalently, 75 W average output power. At the selected frequencies, the input tones are adjusted and the fixture is tuned to provide minimum input reflection and, simultaneously, maximum efficiency at the specified power level. The transistor is subsequently removed from the fixture and replaced by a probe for measuring reflections or impedances. Data towards the input and output ports of the amplifier are recorded and plotted in complex conjugated form. Note that the data includes a 5 Ohm shunting impedance across the gate terminal. It is probably required to keep the fixture setup stable in the whole frequency band in agreement with the stabilizing technique that was presented in section III-. At the input side, tuning to minimum reflection implies impedance matching. By complex conjugating the corresponding experimental data we get the transistor input impedance. Due to the nonlinear class AB operation, the value applies to the present signal level. At the output side the nonlinear operation of the transistor means that conventional power matching considerations are inadequate. What is recorded directly from the test fixture measurement is the fundamental frequency impedance, which is required for achieving the specified output level. Showing this impedance in complex conjugated form provides data that allows circuit designers C GD G transistor chip C gd D L G R g L D C gs I d C ds R ds C G C G L S Figure 5-9 Transistor equivalent circuit for a MOSFET showing the most important intrinsic components on the transistor chip and the most common parasitic elements from chip bondings and device encapsulation. S

36 3 Chap.5, Power and Nonlinear RF-Amplifiers to conduct the matching procedure like a small-signal linear matching problem. Considering the actual data, it is seen that the loading remains relatively constant. The input, however, exhibits large variations across the useful frequency band. A major reason is that it is particular sensitive to feed-back effects, partly through parasitic components from the transistor house. They were neglected in our simplified analyses, but obviously they must be taken into account when the signal level from the actual generator is transformed to the one required at the input to the ideal intrinsic transistor. Fig.9 shows an example of a transistor equivalent circuit, where encapsulation components in the form of wire bonding and lead inductances are included together with their stray capacitances. Data of the type in the Smith chart are used for constructing the input and output matching networks in amplifiers like the two test circuits from Figure 5-3/ and Figure 5-5/8. However, the Smith chart data are commonly not more than a starting point in a design process, where the circuit is gradually refined to meet particular design goals by simulations and experiments. There are several reasons for this state of affairs. First, the data in the Smith chart apply to one specific output level and one specific supply voltage. The more we depart from these settings, the less accurate are the data in design, but they are the only ones available. Second, the data tell nothing about higher harmonic impedances. The nonlinear driving of the transistors produces harmonic current and voltage components. By the parallel tuning of the output load, which was assumed by the simple prototype circuits in the foregoing section, all harmonic output components were short-circuited. Parallel tuning at both side of the transistor applies to the transformer coupled 3MHz amplifier in Figure 5-3/. It is on the other hand clear that this is not the case with the 5 MHz amplifier in Figure 5-5/8. Here the series inductors L, L, and L 3 imply that the input and output matching circuits behave like series resonance circuits. One reason is that power matching to the very low impedance levels, which are seen in the Smith chart at high frequencies, is much easier to realize in series tuning, if the component values should stay within practical ranges. Unfortunately, series tuned RF power amplifiers are difficult to analyse with the same amount of efforts and the same clarity of results as it was possible with the paralleltuned prototype amplifiers above. The next section, however, illuminates some of the consequences of series tuning. We have seen by this MRF5 example, that there are some distances from the simple theories behind our prototype circuits and practical amplifiers. In view of the success simulation methods have in other areas of circuit design, it is natural to expect that computer methods could bridge this gap. Transistor models, which incorporates device nonlinearites so accurately that they can calculate circuit performance with the precision that is needed in design, are not common, but remarkable improvements are observer during the past two to three years. However, most power amplifier designs still require a considerable amount of experimental work to support a sparse theory Series-Tuned RF-power Amplifiers We saw in the section above that series tuning was preferred over parallel tuning in the high end of the transistor frequency rating due to the low impedance levels. Unfortunately, it is not possible to make a simplified analytical description of the series-tuned case corresponding to the parallel-tuning method in section 5 -. In series tuning we must resort to numerical solutions based on at crude description of the transistor loading. RF-Communication Circuits

37 5 - RF Power Amplifier Design and Operation 33 V DD V DD I d RF-choke Switch operated by V gs. Opening angle θ a I d (t) I d RF-choke V g cosω t I d (t) I d cos(ω t-θ i ) C o I d cos(ω t-θ i ) V gs V d (t) series circuit V d (t) series circuit V g V ON (a) Z L (ω )R L +jx L (b) Z L (ω )R L +jx L Figure 5-3 RF power amplifier with series-tuned load. A simplified circuit description requires that the transistor is operated like a switch as shown in (b). The basic assumptions in the description of series tuning is that the transistor may be considered as a switch that is controlled by the gate voltage V gs 4 as described by the simplified equivalent circuits in Figure 5-3. The switch short-circuits the transistor output capacitance C o periodically. Voltage V ON represents series losses and saturation effects in the transistor. Later, we shall go into more details on how to interpret and establish this condition. Here we proceed investigating the equivalent circuit in Figure 5-3 (b). Series tuning implies that the current variation through the transistor is forced to be sinusoidal, so Fourier expansions of the drain voltage and current get the forms V d V d + V d cos o t v + V d cos o t v + V d3 cos3 o t v3 +, (5-57) I d I d I d o t i + cos + I d cos o t i + V d3 cos3 o t i3 + I d + I d cos o t i ( series tuning ). (5-58) Here, the vn s and in s are in general the individual phases in voltage and currents, but due to the basic series tuning assumption, there are no nd or higher order harmonic current components, and i is used below to represent the phase of the sinusoidal drain current component. To further simplify the following developments the phase t is introduced and the current is expressed in either trigonometric or in phasor forms by I d I d + I d cos i I d Re I d e j + o t. (5-59) 4. We use a MOSFET amplifier for illustration, but a BJT could be used as well. At this level of assumptions there are no difference between the two types seen from the output terminals since no particular nonlinear transfer characteristic is involved.

38 34 Chap.5, Power and Nonlinear RF-Amplifiers I d (ϕ) I dmax V dmax V d (ϕ) θ i V ON θ m zero crossing θ a V csw ϕω t switch open Figure 5-3 Drain current and voltage wave-shapes in the switch operated equivalent circuit from Figure 5-9(b). The switch is open from to a. The DC or mean drain current component I d is supplied from the drain supply V DD through a RF-choke, which ideally represent an infinitely high impedance at all frequencies that differ from zero. When the switch is closed, the voltage across capacitor C o becomes zero and the total drain current I d () goes through the switch. When the switch is open, I d () is charging the capacitor and the voltage across it gives the major contribution to the drain voltage. Taking the instant where the switch opens as phase origin and denoting the phase where the switch is again closed at a, the drain voltage may be expressed through V d I V ON I d d V ON d I d sin i + sin i a (5-6) B c V ON a, B c B c where B c is the susceptance of the output capacitance at the operating frequency B c C o. (5-6) It is seen from the voltage wave-shape in Figure 5-3 that if there the drain current has a zerocrossing towards negative values during the open switch interval, the drain voltage gets a maximum there, because the negative current starts decharging the capacitor. Without zero-crossing, the maximum drain voltage appears at phase a in the end of the open switch interval. The phase for maximum voltage m is therefore expressed, m min i + cos I d I d a. (5-6) In phasor notation, the drain voltage reads V d V d + ReV d e j + ReV d e j +. (5-63) RF-Communication Circuits

39 5 - RF Power Amplifier Design and Operation 35 The mean voltage V d is here given by V d V d I d I d i a B c V ON V ON B c -- I d a V d d + I d a sin i + cos i cos a i,. (5-64) while the fundamental frequency voltage phasor may be expressed in terms of its in-phase and quadrature components, V di and V dq, where V d V di + jv dq, (5-65) V di V di I d I d i a B c -- V d cos d I d I B d cos a + a sin a c 4 asin i cos a i + cos i + 4sin i sin a, (5-66) V dq V dq I d I d i a B c -- V d sin d I d I B d sin a a cos a c 4 a cos i sin a i + 3sin i 4sin i cos a. (5-67) There are three basic condition, denoted C to C3, which always must be fulfilled in the seriestuned circuit of Figure 5-3 (b). First, the drain mean voltage V d from Eq.(5-64) must equal the supply voltage V DD since there can be no mean voltage across the RF-choke, C, dc-bias condition : V d I d I d i a B c V ON V DD. (5-68) Second, the fundamental frequency current and voltage phasors are related through the external loading impedance Z L ( ) R L +jx L, V d Z L I d R L + jx L I d, (5-69) which, by invoking Eqs.(5-66) and (5-67), provides two loading conditions C, in-phase load condition : V di I d I d i a B c I d R L cos i + X L sin i, (5-7) C3, quadrature load condition : V dq I d I d i a B c I d R L sin i X L cos i. (5-7)

40 36 Chap.5, Power and Nonlinear RF-Amplifiers A set of nine unknowns or circuit and transistor parameters was introduced in the conditions C through C3 above, I d I d i a R L X L B c V DD V ON. (5-7) Observe here that frequency is implicitly contained in the B c susceptance from Eq.(5-6). To solve the basic conditions, six of the variables in Eq.(5-7) must be fixed, or further constraints must be introduced. This could be output requirements to power, efficiency, maximum current etc., as listed below as requirement O through O5. I d O, Output Power : R L P out, (5-73) O, Battery Power : I d V DD P bat, (5-74) O3, Efficiency : P out P bat R L I d, I d V DD (5-75) O4, Max.Current : I d + I d I dmax, (5-76) I d I O5, Max.Voltage : V d m V ON d + m sin m i + sin i V dmax. B c B c (5-77) The last requirement is set up by inserting the angle for maximum output voltage from Eq.(5-6) into the voltage expression from Eq.(5-6). Returning to the simplified diagram in Figure 5-3(b), which led to the constraints and requirements introduced so far, it should be realized that two power loss mechanisms in the transistor are included. The obvious one is the loss across the on-voltage source V ON, which represents the dynamic drain-source series losses. They are expressed through the mean value of the current-voltage product, so this power loss becomes P tr series I d V ON. (5-78) The other transistor loss is less self-evident, but it is due to the fact, that immediately before the switch closes, the output capacitor holds an energy of size E Co sw --C o V csw, (5-79) where V csw denotes the corresponding output capacitor voltage as indicated by Figure 5-3. When the switch closes, this energy is lost and since the switch closing is repeated with frequency f, a corresponding power loss due to the switching becomes P tr switching f C B f E Co sw c V csw V 4 csw. (5-8) RF-Communication Circuits

41 5 - RF Power Amplifier Design and Operation 37 In the idealized switching model, short-circuiting a charged capacitor leads to an impulse current through the switch, and we may think at the loss as power being radiated by the associated electromagnetic impulse. Less ideally, with actual transistor switching, the loss is an ohmic loss in a small drain resistance. To express the capacitor voltage at the switching instant we use Eq.(5-6), which yields V csw V csw I d I d i a B c V d a V ON I d I d a sin a i + sin i. (5-8) B c B c Both transistor losses above contribute to the reduction of the efficiency below %. It has long been an idea, that efficiency may be improved if the loading circuit is organized to cancel switching losses by switching at an instant, where there is no voltage across the output capacitor. Using Eq.(5-8), this may be stated as an additional constraints in the form C4, No Switching Loss Condition : V csw I d I d i a B c. (5-8) If this condition is met, the series loss is the only loss in the transistor. In this case, using Eqs.(5-74) and (5-78), the power balance and the corresponding efficiency are expressed P out P NoSwitchingLoss bat P tr series I d V DD V ON, (5-83) NoSwitchingLoss P out P bat V ON V DD (5-84) As seen, the dynamic on-voltage V ON is the only transistor property that limits efficiency below % here. If the no switching loss condition is not fulfilled, it is also clear that both the output power and the efficiency are reduced compared to the expressions above. In such cases the efficiency given by Eq.(5-84) serves as an upper limit on efficiency once the supply voltage has been specified for a transistor with a given on-voltage V ON. Fulfilling the no switching loss requirement is the major idea behind the so-called class E amplifier. For reasons that are not clearly understandable in the literature, the class E concept is commonly associated with an additional, so-called optimal condition, where also the current through the switch must be zero when the switch closes 5, C5, Optimal Class-E Condition : I d a I d + I d cos a i. (5-85) Note that this requirement is equivalent to saying that the slope of the drain voltage V d () is zero at the switching instant. Attempts to solve the series tuning problem with these additional constraints may, however, lead to impractical designs. If, for instance, a given transistor is required operate close to its rated power performance, the class-e solution may often imply maximum drain voltages that exceeds the absolute voltage ratings. 5. See, for instance, ref.[5-] Eq. 6.5.

42 38 Chap.5, Power and Nonlinear RF-Amplifiers Example 5 -- A Series Tuned Narrowband Power Amplifier Design By this example we shall illustrate how the equations above may be utilized to initialize a RF-power amplifier design based on the MRF373A MOSFET from Freescale. As seen from Freescale Semiconductor Technical Data RF Power Field Effect Transistors N- Channel Enhancement- Mode Lateral MOSFETs Designed for broadband commercial and industrial applications with frequencies from 47 to 86 MHz. The high gain and broadband performance of these devices make them ideal for large-signal, common source amplifier applications in 8/3 volt transmitter equipment. Typical CW Performance at 86 MHz, 3 Volts, Narrowband Fixture Output Power 75 Watts Power Gain 8. db Efficiency 6% % Tested for Load Mismatch Stress at All Phase Angles with : 3 Vdc, 86 MHz, 75 Watts CW Integrated ESD Protection Excellent Thermal Stability D Characterized with Series Equivalent Large-Signal Impedance Parameters In Tape and Reel. R 5 units per 3 mm, 3 inch Reel. Low Gold Plating Thickness on Leads. L Suffix Indicates 4μ Nominal. MRF373A Rev. 5, /4 MRF373ALR MRF373ALSR MHz, 75 W, 3 V LATERAL N-CHANNEL BROADBAND RF POWER MOSFETs CASE 36B-5, STYLE NI-36 MRF373ALR G S CASE 36C-5, STYLE NI-36S MRF373ALSR Table. Maximum Ratings Rating Symbol Value Unit Drain-Source Voltage V DSS -.5, +7 Vdc Gate-Source Voltage V GS -.5, +5 Vdc Total Device T C 5 C Derate above 5 C MRF373ALR MRF373ALSR P D Storage Temperature Range T stg -65 to +5 C Operating Junction Temperature T J C Table. Thermal Characteristics Thermal Resistance, Junction to Case Table 3. ESD Protection Characteristics Human Body Model Machine Model W W/ C W W/ C Characteristic Symbol Value Unit Test Conditions MRF373ALR MRF373ALSR MRF373ALR MRF373ALSR R θjc Class (Minimum) M (Minimum) M (Minimum) NOTE - CAUTION - MOS devices are susceptible to damage from electrostatic charge. Reasonable precautions in handling and packaging MOS devices should be observed. C/W Freescale Semiconductor, Inc., 4. All rights reserved. MRF373ALR MRF373ALSR RF Device Data Freescale Semiconductor Figure 5-3 Extracts from the MRF373A transistor data sheet. RF-Communication Circuits

43 5 - RF Power Amplifier Design and Operation 39 Table 4. Electrical Characteristics (T C 5 C unless otherwise noted) Characteristic Symbol Min Typ Max Unit Off Characteristics Drain-Source Breakdown Voltage (V GS Vdc, I D μa) Zero Gate Voltage Drain Current (V DS 3 Vdc, V GS Vdc) Gate-Source Leakage Current (V GS 5 Vdc, V DS Vdc) On Characteristics Gate Threshold Voltage (V DS V, I D μa) Gate Quiescent Voltage (V DS 3 V, I D ma) Drain-Source On-Voltage (V GS V, I D 3 A) Dynamic Characteristics Input Capacitance (V DS 3 V, V GS, f MHz) Output Capacitance (V DS 3 V, V GS, f MHz) Reverse Transfer Capacitance (V DS 3 V, V GS, f MHz) Functional Characteristics (5 ohm system) Common Source Power Gain (V DD 3 V, P out 75 W CW, I DQ ma, f 86 MHz) Drain Efficiency (V DD 3 V, P out 75 W CW, I DQ ma, f 86 MHz) V (BR)DSS 7 Vdc I DSS μadc I GSS μadc V GS(th).9 4 Vdc V GS(Q) Vdc V DS(on).4.45 Vdc C iss 98.5 pf C oss 49 pf C rss pf G ps db η 56 6 % Load Mismatch (V DD 3 V, P out 75 W CW, I DQ ma, f 86 MHz, Load VSWR at : at All Phase Angles) ψ No Degradation in Output Power Figure 5-33 Extracts from the MRF373A transistor data sheet. the data-sheet extracts in Figure 5-3 and Figure 5-3, this transistor is intended for use in the 47 to 86 MHz range where it may give up to 75W output power with an efficiency of 6%. Since the transistor is not internally matched, which here means that is has no distinct lower frequency limit, this transistor is one if the few candidates for a specific radar application around 435MHz using a power supply of 8V. Here, the amplifier must deliver 5W output power in 5 Ohm and the design goal is high efficiency. As the power requirement is below the transistor capability, we may aim upon an efficiency that is higher than the 6% that applies to maximum output power, for instance 75% efficiency. As mentioned in Section 5 -. the major issue in the design of RF-power amplifiers is to establish input and output matching circuits in a way that let the transistor be biased, driven, and loaded to the desired mode of operation. With the present transistor no matching information similar to the Smith chart data in Figure 5-4 is available outside the communication bands around 86 MHz. However, the manufacturer provides a reasonably accurate large signal model for circuit simulations. We shall benefit from that both as a vehicle for illustrating the seriestuned mode of operation and to support the design process. The steps here are first to establish the transistor loading conditions according to the series-tuned switching model above.second, the simulation model and the loading are employed to find the particular transistor input impedance for the design of the input matching network.

44 4 Chap.5, Power and Nonlinear RF-Amplifiers Regarding the set of unknowns and parameters to be used in the output design equations, the data-sheet provides the susceptance specification B c C oss f S. (5-86) The given supply voltage and the dynamic on-voltage parameters are, V DD 8 V V ON 4.5 V, (5-87) where the V ON voltage is substantially higher than the.4 V in the data sheet. However, the data-sheet specification apply to DC conditions with a much higher gate voltage and a much lower current than the peak current that occurs under RF operation. The choice above is a first guess that later may be verified. With a specified efficiency of 75%, which is below the limit from Eq.(5-84), Limit %, 8 (5-88) the DC current is implicitly fixed through I d P out A V DD (5-89) With four parameters fixed and one, the switch opening angle a, taken as the independent variable, there are four unknowns left in the list from Eq.(5-7). The four equation that are required to solve for the remaining unknowns, I d, i, R L, and X L are the basic equations C to 5 Amp 4 θº 5 Ω 4 X L 3 θ i 3 3 R L I d θ a ~ max R L 4 θ a ~ max R L θ a º ( a ) ( b ) Figure 5-34 Solution to series tuning conditions C, C, C3, and O for 5W output power with 75% efficiency as function of the opening angle a. The particular solution to be used in the amplifier design is a 34, which gives maximum load resistance R L. θ a º RF-Communication Circuits

45 5 - RF Power Amplifier Design and Operation 4 4 Volt 5 Amp 4 V dmax 3 8 voltage rating 6 4 I dmax θ a ~ max R L 5 5 θ a º 3 Figure 5-35 Maximum drain currents and voltages corresponding to the solutions in Figure Only solutions where the maximum voltage falls below the transistor voltage rating are useful. C3 in Eqs.(5-68) to (5-7) together with the output power requirement O in Eq.(5-73). Sweeping the opening angle a, the numerical solution process 6 provides the results that are shown in Figure 5-34 (a) and (b). Among the possible loading conditions, the solutions with highest R L s are preferable since they have the smallest impedance transformation ratio compared to an external load of 5 Ohm. This way we may get a low Q-factor and, in consequence, it becomes easier to realise the output matching circuit using standard components. Figure 5-35 shows the maximum drain currents and voltages along the solutions. They are calculated by Eqs.(5-76) and (5-77). It is seen that solutions around the opening angle, which implies high resistive loading, are solutions that also place least stress on the transistor with respect to both peak drain currents and voltages.the drain-source voltage rating is 7V according to the data-sheet, but there are a no direct maximum current specifications. Implicitly, the current is bounded by the maximum power and temperature ratings. Selecting maximum resistive loading R L, the solution a 34 R L 3.7 X L 3.9 I d 5.9A i 8.38, (5-9) is used in this design. It has a corresponding maximum drain current and voltage of I dmax 7.57A V dmax 57.5V. (5-9) Before leaving the transistor load determination, it is illuminating to compare the foundation for the decision above with the results that would appear, had we aimed upon an efficiency corresponding to the 84% limit of Eq.(5-88) in the design. This would require that the no switching loss condition in Eq.(5-8) was fulfilled. Enforcing the requirement 7, we get the solutions and maximum voltage and current values that are shown in Figure It is readily observed that this solution comes so close to the voltage rating of the transistor that there would be no margins in a practical realization for uncertainties that stem from, for instance, parameter 6. The solution is found by the equation solver function fsolve in the optimization toolbox of MAT- LAB. 7. One more condition means that one more variable must remain unknown. Here, the DC current I do is released from the binding in Eq.(5-88) to participate in solution process. However, its solution value is a known constant due to the implicit constraining by Eq.(5-83).

46 4 Chap.5, Power and Nonlinear RF-Amplifiers 5 Amp 4 θº 5 Ω 4 3 θ i 3 X L 3 I d optimum class E 4 I d θ a º 3 ( a ) 4 Volt 5 5 θ a º 3 ( b ) 5 Amp 4 R L optimum class E 8 V dmax 3 voltage rating 6 optimum I dmax class E θ a º 3 ( c ) Figure 5-36 Discarded solutions to the series tuning problem with no series losses are given in (a) and (b) while (c) holds the corresponding voltage and current maxima. The solutions are shown as function of the opening angle a. They meet conditions C, C, C3, C4 and O on pp 35 to 37, with 5W output power. The optimal class E indication refers to the particular a where also condition C5 on p.37 applies. and tuning variations. It is also seen that the resistive part R L of the load impedance has practically halved compared to the solution in Figure 5-33 (b). This doubles the impedance transformation ratio to the external 5 Ohm and make the output matching network even more sensitive to tuning and parameter variation. Therefore, the class E design not a feasible approach to the design problem at hand. Returning to a design based upon the load parameter settings from Eq.(5-9), the next step in the design process is to apply the parameter settings above in a circuit simulation with an accurate model of the MRF373 transistor. The purpose is two-fold. First we shall verify the usefulness of the simplified switching model. Second, the simulation shall give us the remaining data for completing the design, which most importantly is the fundamental frequency input impedance of the transistor corresponding to the required output power of 5W. Figure 5-37 shows the diagram and simulation set-up that is used for the task using the ADS program 8. Without going into many details, the simulation is conducted by an initial DC analysis followed by a so-called harmonic balance analysis. This is a large-signal search for the steady-state solution with a given single frequency sinusoidal input signal. The input signal lev- 8. ADS, Advanced Simulation System from Agilent. RF-Communication Circuits

47 5 - RF Power Amplifier Design and Operation 43 el, variable, pav in Figure 5-37, is iteratively adjusted until the desired output power is obtained. The transistor model is taken from the manufacturers home-page and it is here extended by a small source inductor Ls.4nH. Experience with several amplifier circuits using the MRF373 transistor have shown that this improves simulation results in the 4-5 MHz frequency range with our method of mounting the device. At the output side of the transistor, the impedance transformation circuit Lo, Co, and Co transforms the external 5 Ohm load to the transistor load impedance from Eq. (5-9). Component values are here found from Smith chart constructions of the type discussed in section II-8. As a check, the actual load impedance is simulated by taking the ratio of the fundamental frequency components in the drain voltage Vd and the drain current I_d. Drain bias is supplied from the battery through an ideal RF choke, which behaves like an infinitely lage inductor. To anticipate future practical circuit realisations using finite valued and less ideal inductors, a parallel resistor for damping possible resonance around the choke is added. This should not influence the output loading condition of the transistor if the parallel impedance of the bias choke and the damping resistance is kept high compared to the required load impedance RL jxl. At the input side of the transistor, the ratio of the gate voltage Vg over the gate current I_g provides us with the desired large signal, fundamental frequency transistor input impedance. This impedance is supposed to be significantly smaller in magnitude than the generator impedance of 5 Ohm so the gate is driven by a sinusoidal signal current in accordance with the subsequent full amplifier design, where also the gate will become series tuned. Finally, gate bias is supplied through a resistance since no DC current is required into the gate. Again, if the resistor value is high compared to the input impedance of the transistor itself, there should be no influence from bias circuit on the input matching conditions. HarmonicBalance G Freq[]Frq Order[]5 Var Eqn VAR VAR Tsnk5 Frq435 MHz pav37.3 {t} VGG3.39 V VDD8.V HARMONIC BALANCE DC DC DC P_Tone PORT Num Z5 Ohm Ppolar(dbmtow(pav),) FreqFrq DC_Block DC_Block Narrowband MRF373A Power Amplifier R R R39 Ohm I_Probe I_g Vg FSL_MRF_MET_MODEL MRF4 MODELMRF373A TSNKTsnk RTH- CTH- V_DC G VdcVGG DC_Feed DC_Feed Vd I_Probe I_d Vs L Ls L.4 nh L Lo L3.7 nh C Co C8. pf Design: amplifier_ R R3 R4 Ohm C Co C3.3 pf FSL_TECH_INCLUDE FSL_TECH_INCLUDE FTI V_DC SRC VdcVDD Vout Term Term Num Z5 Ohm Figure 5-37 Setup for simulation of series tuning conditions for the 435MHz, 5W RF-power amplifier in ADS.

48 44 Chap.5, Power and Nonlinear RF-Amplifiers Narrowband MRF373A Power Amplifier Design: amplifier_ Bias and drive conditions DC.I_d.i pav VGG VDD Eqn Ploadabs(HB.Vout[])**/(*5) 3.5 ma Eqn Pbatre(HB.I_d.i[]*HB.Vd[]) Powers, Effifiency, and DC consumption Eqn Eff_dPload/Pbat Pload Pbat Eff_d re(hb.i_d.i[]) Eqn ZgateHB.Vg/HB.I_g.i Gate and Load Impedances Eqn ZL-HB.Vd/HB.I_d.i Zgate[].6 - j.47 ZL[] j3.967 HB.freq[] 435. MHz db(hb.vd) 4 m5 3 Vd, drain voltage components in db over V m6 m5 freq.hz db(hb.vd)8.943 m6 freq 435.MHz db(hb.vd)9.95 db(hb.i_d.i) m I_d, drain current components in db over A m8 m7 freq.hz db(hb.i_d.i)7.354 m8 freq 435.MHz db(hb.i_d.i)4.47 dbm(hb.vout) V_out, output voltage components in dbm m7 m7 freq 435.MHz dbm(hb.vout) m freq, GHz freq, GHz Vd and I_d in time-domain m3 time.99nsec ts(hb.vd)3.54 V m4 time.6nsec ts(hb.vd)5.67 V m freq, GHz Corresponding markers in Vd, I_d time-domain and trajectorlots m m time 965.5psec indep(m) ts(hb.vd)6.588 V plot_vs(ts(hb.i_d.i), ts(hb.vd))7.474 m m time.7nsec indep(m3) ts(hb.vd)58.4 V plot_vs(ts(hb.i_d.i), ts(hb.vd))-.76 m3 indep(m4) plot_vs(ts(hb.i_d.i), ts(hb.vd))-.736 m4 indep(m5) 5.67 plot_vs(ts(hb.i_d.i), ts(hb.vd)).33 I_d versus Vd trajectory on transistor DC characteristics ts(hb.vd), V 4 3 m m3 m4 4 - ts(hb.i_d.i), A ts(hb.i_d.i) 5 m4 m3 m 5 dc_char..ids.i time, nsec ts(hb.vd) dc_char..vds Figure 5-38 Results from a simulation of the setup in Figure Simulation results from the setup in Figure 5-37 are summarized in Figure The three upper tables show the basic design goals and settings. It is seen here that the bias is adjusted to give a dc-current of ma before a signal is applied, and that an input drive level of 37.7dBm RF-Communication Circuits

49 5 - RF Power Amplifier Design and Operation 45 is required to get the desired output The second table shows that we get the desired output of 5W with an efficiency of 76.6% corresponding to a dc-current consumption of.33 A. Differences in efficiency from the expected 75% may be ascribed to the fact, that the wave-shapes in drain voltage and current are not completely the ideal shapes that were assumed by the simplified switch model. The third and last table holds first the important result of the low fundamental frequency input impedance. It is also seen here that the loading impedance in the simulations is very close to the requirement from Eq.(5-9). Frequency spectra and other plots are included in Figure 5-38 to verify the switching model assumption in the present series-tuned amplified. The two upper plots give the harmonic components in the drain voltage and the drain current respectively. While the first show significant nd and 3rd harmonic components, the higher harmonic components in current are small, more than 4dB below the fundamental frequency component. This proves that the model assumption of a pure sinusoidal current is met. One practical consequence is that also the output voltage get small harmonic components, as seen in the separate V out plot. Transforming the primary frequency domain result of a harmonic balance simulations to time-domain gives the corresponding steady-state wave shapes. This way we get the time-domain Vd and I_d curve in the lower left plot of Figure As expected, the current is nearly a perfect sine-wave while the voltage is pulsed. We may compare waveforms with the corresponding results from the switching model as it is done in Figure Clearly, the instant switching is not seen in the simulations based on a real transistor model, where the corresponding function is undertaken by a controlled current source like I d in Figure 5-9. The source differs from zero if the transistor is its forward active or saturated state while the switching model only accounts for the saturated state. However, the maker indications in the time-domain plots and especially the corresponding I_d versus Vd trajectory show that the transistor switches from a cut-off state, marker m3 or m3, to saturation, marker m4 or m4, without entering the active state significantly. After the period where the transistor is saturated with a low, nearly constant voltage around V ON 4.5 V, the active state may again be traversed when the switch opens at markers m or m and up to the instant where maximum voltage is reached at markers m or m. Since there is coincidence between the two type of model responses in this region, the implicit assumption of the switching model must be met here. 6 V 5 4 V d instant switching A 8 A 7.5 I d ADS simulation I d 4.5. instant switching ADS simulation - 5 ωt ( a ) ( b ) V d V 6 Figure 5-39 Comparison between drain voltage and drain current wave-shapes from the instant switching model (heavy lines) using parameters from Eqs.(5-87) to (5-9) and the simulated time-domain responses based on a complete nonlinear transistor model (thin lines. copied Figure 5-37).

50 46 Chap.5, Power and Nonlinear RF-Amplifiers In summary, the major difference between the two models appears in the switching details. If the switching time is short compared to the period time, it gets no serious consequences for the usefulness of the simplified instant switching model in a design process 9. The difference between the two models causes more higher harmonic components in the drain voltage with instant switching, but due to the series tuning this has no influence on the amplifier output. It must finally be observed that the simulations supports our setting of the dynamic on-voltage, V ON. It is a sad fact, that there are no direct ways of getting this value for the real, physical transistor. But we have at least established agreement between the simplified switching description and data from the suppliers computer model. Before closing the output loading discussion, one additional observation about efficiency should be made. When efficiency was introduced with parallel tuning, it was expressed by ratios of fundamental frequency over dc-values in both drain voltage and drain current by Eq. (5-4). In the present series tuning, where the current and voltage are no longer assumed to be exactly in phase but related by the complex load impedance, the similar efficiency expression reads, P out P bat -- I d V d cosz L. I d V d (5-9) Barallel tuning, the voltage was forced to be sinusoidal and the voltage component ratio was kept below or at most equal to one while efficiency was raised by increasing the current component ratio bulsing current. In the present series tuning with sinusoidal currents, it is seen from Figure 5-38 that albeit the voltage is pulsed, the pulse width is so broad that the voltage component ratio in Eq.(5-9) remains close to one. Again it is the current ratio that raises the efficiency, but here the amplitude may exceed the dc-value since the drain current goes negative in part of a period. This happen because the drain current charges and partly decharges the output capacitor. Therefore, the output capacitance is an important parameter in the basic performance of the series-tuned amplifier, and in some situations it may even pay to enlarge it by paralleling an external output capacitor. An example is the amplifier in Figure 5-4/8 where 5pF is added to the transistor output capacitance of 4 pf. With the knowledge about the fundamental frequency gate input impedance from the results in Figure 5-37, we are able to complete the amplifier design by constructing an input circuit, which implies conjugated matching to the gate input impedance, Z gate.6 j.44, 5Wout (5-93) This way we get maximum power transfer from the driving generator to the transistor. Notice, however, that the output was not power matched but adjusted to a load impedance that gave the desired performance with respect to output power and efficiency. Like the output matching circuit, the practical design process of the input matching circuits may follow standard methods, either by Smith charts or series-parallel transformations. This way we reach the amplifier design in Figure 5-4. Note that series tuning at either side of the transistor are enforced by series connection inductors directly to the gate and drain terminals. However, the innermost parts of the required inductors are replaced by short, wide transmission lines, which equal the effects of the physical transistor leads. They are illustrated by the case 36B-5 drawing in Figure Had the goal been to get accurate agreements, more details about the switching process had to be taken into account. An example showing this with bipolar transistor switching was given in ref.[5-6]. RF-Communication Circuits

51 5 - RF Power Amplifier Design and Operation 47 HARMONIC BALANCE HarmonicBalance HB_sweep Freq[]Frq Order[]7 P_Tone PORT Num Z5 Ohm Ppolar(dbmtow(pav),) FreqFrq Vin Vinref DC DC R R R5 Ohm C Ci C.93 pf {t} C P_Tone Ci PORT C8. pf Num Z5 Ohm Ppolar(dbmtow(pav),) FreqFrq DC Meas Eqn Var Eqn VAR VAR Frq435 Mhz pav4. MeasEqn Meas VrefVin-Vinref GaminVref/Vinref C Ci3 C4.5 pf {t} L Li L5 nh {t} Narrowband MRF373A Power Amplifier R R R47 MLIN To3 Subst"MSub" W7.57 mm L7.37 mm FSL_MRF_MET_MODEL MRF4 MODELMRF373A TSNK5 RTH- CTH- V_DC G Vdc3.39 V {t} L L4 L56 nh MLIN To Subst"MSub" W7.57 mm L7.37 mm Vd V_DC SRC R Vdc8 V R3 R4 Ohm Design: amplifier_ I_Probe C I_dd Co L Lo L.5 nh {t} L R L3 C L.4 nh Co R C8. pf {t} FSL_TECH_INCLUDE FTI C3.3 pf {t} Vout Term Term Num Z5 Ohm FSL_TECH_INCLUDE MSub MSUB MSub H.55 mm Er4.6 Cond.E+5 Hu mm T35 um TanD.5 Figure 5-4 ADS setup for simulation of the complete 435MHz, 5W power amplifier. The setup makes large signal harmonic balance simulations in a frequency sweep around the design frequency of 435 MHz. Po_dbm Narrowband MRF373A Power Amplifier Output Power,dBm, and Transducer Gain m Frq 4.35E8 Po_dbm47.9 m m m Frq 4.35E8 Gtr Gtr db(gamin[::,]) Input Reflection m5 m5 Frq 4.35E8 db(gamin[::,]) M 4.M 4.M 44.M 46.M 48.M 5.M Frq M 4.M 4.M 44.M 46.M 48.M 5.M Frq Eff M Efficiency, Eff %, and DC current [A] m3 Frq 4.35E8 Eff78.5 m3 m4 m4 Frq 4.35E8 real(hb.i_dd.i[::,]).98 4.M 4.M 44.M 46.M 48.M 5.M Frq real(hb.i_dd.i[::,]) Drive Power, dbm pav[] 4. Eqn GtrPo_dbm-pav Eqn Po_dbmdbm(HB.Vout[::,],5) Eqn refabs(gamin[::,]) Figure 5-4 Simulation results from the amplifier setup in Figure 5-39 Eqn Pbabs(DC.Vd*HB.I_dd.i[::,]) Eqn Eff***(Po_dbm/-3)/Pb Simulation result from the setup in Figure 5-4 are given in Figure 5-4. It is seen from the small input reflection coefficient that the amplifier is closely matched to 5 Ohm at the design frequency of 435 MHz. The simulation setup demonstrates one method of finding reflec-

52 48 Chap.5, Power and Nonlinear RF-Amplifiers tion coefficients in large signal analysis. The actual input voltage Vin is compared with the input voltage of an ideal matching to the same generator circuit. It is the Vinref voltage in the schematic, and the reflection coefficient may now be calculated by V in V in ref. in V in ref (5-94) It is seen that matching applies only to a narrow bandwidth around the design frequency of 435 MHz. At this frequency we get the desired output power of 5W, which is equivalent to 47. dbm. The corresponding transducer power gain of the amplifier is.8 db. It is clear from the output power curve that the design frequency does not correspond exactly to the output power maximum. However, nothing in the design procedure has addressed a maximum power criterion, but it is seen, that we are close to a maximum in efficiency of 78%. It is a common property of nonlinear power amplifiers that the optima in power and efficiency occur with different tuning conditions. Following the design process above we get an experimental amplifier, which performs as summarized byfigure 5-4. Before recording results, the input driving level and the two matching circuits were tuned to provide 5W output power with the best possible efficiency. As seen, the output power and the input tuning characteristics closely resembles our simulated expectations. However the measured transducer gain is db lower than simulations and efficiency reduces from 78% to 68%. From a practical power amplifier point of view, 68% efficiency with 5W output power at 435MHz is a good result. It is supposed that the discrepancy between the ADS simulations Pout_dBm Narrowband MRF373A Power Amplifier Experimental Performance Output Power,dBm, and Transducer Gain m freq 435.MHz Pout_dBm m m m freq 435.MHz Gtr_dB freq, MHz Gtr_dB Gamin_dB freq, MHz Input Reflection m3 m3 freq 435.MHz Gamin_dB Operating Conditions and Performance data IDD A VDD V Pout W Eff % F MHz Figure 5-4 Experimental data (heavy curves) and practical realization of the designed narrowband power amplifier. Corresponding simulated data are in thin lines. RF-Communication Circuits