VU Meter Driver Simulation and Design

Transcription

1 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION V Meer Driver Simlaion and Design Marin Pospisilik, Milan Adamek Absrac his paper deals wih a design, consrcion and pracical esing of a V meer driver ha incldes an accrae recifier and logarihmical driver of a poiner-ype gage. he logarihm is aken from he recified signal by employing a capacior discharge volage crve. Several sofware simlaions were made in order o proof he circi design. hen a simple recifier and logarihmiser was designed and bil in order hese simlaions were proved and aferwards, based on he gained experience, he more complex design of he V meer driver was creaed. he paper incorporaes mahemaical descripion of he circi, simlaion resls and resls gained when he simple driver circi nderwen several physical ess as well as frher proposiions for pracical exensions of he designed circi. Keywords Hardware logarihm processing, V meer, adio signal recifier, gage driver A I. ODCION NALOG adio signal levels are ofen expressed in decibels compared o one reference level. Analogos V meers are sally eqipped wih a non-linear decibel scale which sem from he definiion of a raio ni [db]. In his case only a simple fron end recifier is sfficien for a saisfacory level indicaion. However, i is more comforable o ake and display direcly he logarihm of he volage level of he signal becase hen we gain an advance of a linear gage scale. In addiion, he gage range is sally exended o a leas 3 db. here are several reqiremens ha shold be me by he accrae V meer: Symmerical processing of he AC signal volage wih low disorion observing he sfficien bandwidh, accrae measring of he peak vale (in adio sysems here is sally a need o display peak vales o preven he signal from clipping he peaks), he peak vale shold be displayed for a period of ime ha is long enogh so he ser cold clearly see i on he scale, Manscrip received Jne 29, 211: evised version received XXXXXXX. his work was sppored by by he Eropean egional Developmen Fnd nder he projec CEBIA-ech No. CZ.1.5/2.1./3.89 and by he Inernal Gran Agency a B in Zlin, projec No. IGA/45/FAI/1/D. Marin Pospisilik is wih he omas Baa niversiy in Zlin, Facly of Applied Informaics, nám..g. Masaryka 5555, 76 1 Zlin, Czech epblic (corresponding ahor o provide phone: ; pospisilik@fai.b.cz). Milan Adamek is is wih he omas Baa niversiy in Zlin, Facly of Applied Informaics, nám..g. Masaryka 5555, 76 1 Zlin, Czech epblic ( adamek@fai.b.cz). he reacion ime of he V meer shold be shor enogh so very shor peaks cold be displayed, i is convenien o ake and display he logarihm of he measred vale becase of he ypical characer of he adio signal. o mee hese reqiremens, he advanced recifier and driver for analog V meer was designed and bil. When designed, many simlaions were processed wih he aid of Mlisim sofware. he performance of he bil circi was physically esed and he resls achieved were comparable o he resls of he simlaions. Based on his experience a more complex 2-channel V meer driver was designed and bil. Primarily, his circi was designed o be sed in a vacm valve amplifier as a power indicaor. herefore, several iniial condiions may seem o be qie nsal, for example he power spply volage of 6.3 V. However, he main principle can be applied o a wider variey of applicaions. II. LOGAIHMICAL PWM MODLAION he basic aim was o employ a qie simple mehod of processing a plse-widh modlaion by a comparaorconneced operaing amplifier. he volage he logarihm is aken of is periodically compared o a reference volage ha can be described by he following eqaion: Where: EF = e n ;, ); n N τ (1) is he amplide of he reference volage [V], is ime flowing hrogho he period [s], is a period of plse widh modlaion [s], n is he order of he appropriae period [-], τ is a ime consan defining he volage slope [s]. o ge he bes resolion we need o obain he highes possible amplide of he reference volage. Ideally, EF lies in he range beween = cc a = and a =. Pracically, we will le he volage o drop o 1 % of which can be well implemened physically. Considering his level ms be achieved in a period of, we can deermine he opimal vale of τ:.1 = e τ = ln(.1) τ (2) Isse 5, Volme 5,

2 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION he behavior of he signal is described in Fig 1. wih a crve called Modlaor reference volage as a resl of comper simlaions applied o he circi he design of which is described in his paper. One can see ha he slope of he volage is exponenial. Comparing his volage o a direc volage of a random level a he inp of he modlaor, he op of he modlaor can be described wih he following eqaion: O N = O < EF EF (3) 1 = ln ln.1 From he eqaion (7) we can see he logarihmic dependence of on he inp volage. Becase he level of signal in [db] is defined as Briggsian logarihm of he raio beween he measred and he reference level and he modlaor, as dedced above, makes he Napierian logarihm, we need o recalclae he op of he modlaor so as o order he proper scale was achieved. According o [1] we can se simple approximaion: log x ln x (7) (8) Where: O is he op volage of he ideal modlaor [V], is he inp volage of he modlaor [V], cc is he spply volage of he ideal modlaor [V], EF is he reference volage of he modlaor described by eqaion (1) [V]. he behavior of a PWM modlaor wih a reference volage according o (1) can be seen in Fig. 1. here are wo inp volages (modlaor inp volage and modlaor reference volage) and he appropriae op of he modlaor displayed. A he op of he modlaor we ge wo-sae signal wih he raio. hrogho he period his signal can be expressed wih he aid of he Heaviside sep fncion: ( 1 ) );, ) O H ( = (9) Inegraing his signal in ime, we ge direc volage corresponding o. We can express he mean vale wih he sccessive eqaion: Fig. 1 Modlaor signals (simlaion resls) Considering a period of plse widh modlaion [s] and a period of ime when he op of he modlaor is in a high sae ( O = cc ) H [s], he raio of he op signal of he modlaor can be simply described as: H = (4) In order o deermine he vale of we ms find sch ime hrogho he period of in which = EF, becase a his poin lies he hreshold of he comparaor. Provided we consider invariable direc volage a he inp of he modlaor, we can describe he dependence of on (sing eqaions 1, 2, 3, 4) as: n τ = cons. = EF = e (5) ln ln.1 = (6) ; = MEAN 1 = 1 = 1 = 1 = 1 = O ( 1 ) H d d + ( ( 1 ) ) ( 1) d d ( ) (1 ) [ ] + [ ] ( 1 ) ( ( 1 ) ) = III. CICI DESCIPION (1) he circi was bil on a single-layer PCB. A high emphasis was placed on ease of he consrcion and low cos of he componens. Before he descripion of he pracical consrcion is provided, le s shorly see how he circi can be pariclarized ino several logical blocks. A. Logical blocks of he circi he circi can be pariclarized ino several blocks ha can be seen in Fig. 2. A he inp of he circi, here is an inp Isse 5, Volme 5,

3 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION bffer ha accommodaes his circi o preceding circis in erms of he volage level and he impedance of he signal. As here are wo recifiers employed in he circi in order o improve he symmery of eiher posiive or he negaive halfwave of he signal, one of he recifiers ms be fron-ended wih an inverer. Ops of boh recifiers are hen smmarized by an analog smmer and a simple peak memory. hese blocks are simply based on a larger capacior. he differeniaor derivaes he volage on he peak memory capacior in ime and when a seep volage peak occrs, i generaes a shor plse ha is added o he volage on he memory capacior. his improves he response of he poiner of he gage as i is pshed by a high crren plse. he proper response of he differeniaor ms be idenified by a pracical experimen wih an appropriae gage so he poiner does no overshoo he proper posiion. Now we come o he modlaor which is based on a comparaor ha processes wo signals he volage of he peak memory capacior wih a shor plse evenally added by he differeniaor and he exponenial volage decay generaed by a non-reciprocal C inegraor according o eqaion (1). he oscillaor generaes periodic plses ha are sed o charge he inegraor capacior very fas while he discharge of he capacior is execed slowly. he op bffer inegraes he op volage according o eqaion (1) and drives he scale. Fig. 2 Circi block diagram B. Deailed descripion he schemaics of he circi can be seen in Fig. 3. here are hree pin erminals in he circi. hese erminals are marked SL1 o SL3. SL1 serves o connec he power spply of 6.3 V. he poiner-ype gage is conneced o SL3 and a SL2 here is he inp of he driver. he aim was o make he circi as simple as possible. his is he reason why only hree ransisors and wo inegraed circis are employed in he schemaics. Le s closely describe individal fncional blocks of he circi. 1. Inp bffer and inveror he inp bffer and he inverer are boh implemened by 2 ransisor. Is operaing poin is se by resisors 2 and 7. heir vales were se according o simlaion of he circi so he op amplides of he invered and non-invered ops were clipped a eqal levels an opimal bias was fond o be se a approx. 4 % of he spply volage. he bias volage is blocked by he capacior C3. he level of he inp signal can be adjsed by he roary rimming resisor 17. he vales of 17 and bondary resisors 1 and 26 were deermined considering he circi o be conneced o he op of 1 W adio amplifier. he signal level behind he rimming resisor 17 is spposed o be arond.3 V ef for he poiner displacemen of db (8 % of he whole scale). he qiescen crren hrogh he ransisor 2 is spposed o be arond 45 µa. A he collecor of 2 we ge he signal wih 18 phase shif while a he emier of he same ransisor we ge he signal wih no phase shif. Collecor and emier resisors 5 and 27 are of eqal vale so he ransisor works wih a negaive feedback of 1 %. Provided he ops of inp bffer / inverer are loaded wih high impedance, he signal amplides a boh ops shold be almos idenical. 2. ecifiers and peak memory capacior here are wo recifiers in he circi, based on operaing amplifiers IC2A and IC2B. his is o improve he symmery of he recifier a high freqencies a which reverse recovery imes of he diodes and limied slew rae of he operaing amplifiers may ake effec. he circi was a sbjec of sofware simlaions ogeher wih he inp bffer and inverer Fig. 3 Deailed circi diagram Isse 5, Volme 5,

4 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION and analogos smmer and he resls acknowledged beer lineariy of AC o peak DC conversion a high freqencies and low amplides. Decopling of recifier inps is realized wih he aid of C4 and C7 capaciors. Each of boh operaing amplifiers is conneced in he way of invering amplifier for a negaive half-wave wih a gain of approximaely 6 db while for he posiive half-waves he ops of operaing amplifiers are blocked by D3 and D5 diodes and heir negaive feedback is ensred by D4 and D6 diodes so he amplifiers are proeced from deep negaive saraion. he ops of hese operaing amplifiers are forified by 1 and 3 ransisors ha deliver he sfficien amon of crren o charge he memory capacior C9 o he proper peak vale in a shor ime. Pracically, some low bias is needed o se he opimal working poins of he operaing amplifiers and ransisors. his bias is se by he roary rimming resisor 14 in sch a way ha he qiescen volage a C9 capacior lies beween.25 and.4 V. Sccessive blocks like differeniaor and PWM modlaor also ake advanage of his bias. he oer effec of seing he bias is ha he poiner of he gage remains a he boom of he scale when he driver is no excied. he vale of he peak memory capacior C9 is seleced in order o ensre he charging ime is fas enogh while he discharge akes approximaely 7.5 s. 3. Differeniaor he differeniaor is based on he IC2D operaing amplifier. A firs glance i seems i is conneced similarly o he differenial amplifier. Considering js he IC2D operaing amplifier wih resisors 13, and 24 and ha here are wo inps of he circi, + and -, boh on he sides of he resisor 18, which is for or prposes omied now, is op volage can be loosely expressed like: O (11) IC 2 D Neglecing he inflence of he resisors 13 and 18 and he capacior C1, we find + = - =. hs, he amplificaion of he circi can be expressed like: A O IC 2 D = = 1 (12) herefore, i is possible o sae ha for signals ha change heir volage slow enogh so here is no delay prodced by he derivaive elemen made of he resisor 18 and he capacior C1, he amplificaion facor is close o 1. On he oher hand, if we sppose ha he volage a he inp of he differeniaor changed a a single jmp from he vale o, he volages + and - ha can be fond on boh ends of he resisor 18, can be hen, when neglecing inflences of oher circi pars, expressed like: + = + ( ) H ( ) (13) = + 1 ( ) 1 e 18 C H ( ) (14) Based on his simplificaion, he reacion of he differeniaor op o his jmp can be esimaed like: OIC 2 D ( + ( ) H( ) ) + ( ) 1 e C1 H( ) 24 (15) In a very shor ime afer he volage jmp ( «18 C 1 ) we can conemplae he volage on he capacior C1 is sill, hs: OIC 2 D = (16) he shor ime amplifying facor can be expressed as a raio of he op volage o he qiescen volage : A IC 2D = OIC 2 D (17) he higher he volage jmp is he higher is is amplificaion, which corresponds well o he reqiremen ha shor and seep plses ms be amplified enogh so he gage cold reac properly on hem. In realiy, seep plses drive he differeniaor o he posiive saraion which cases driving he PWM modlaor o he highes possible raio. Wih respec o Nyqis-Shannon sampling heorem, if he posiive plse a he op of he differeniaor lass enogh ime, we ge a volage plse a he op of he circi ha forces he poiner of he gage. 4. PWM modlaor, reference signal generaor and he op bffer PWM modlaor is in fac very simple, consising of he operaing amplifier IC2C ha compares he volage a he op of he differeniaor o he reference volage. he principle of his operaion has been described above. he reference volage is generaed righ on he iming capacior C2 ha defines how he imer IC1 will oscillae as an asable circi. Imagine ha a he momen he driver is being rned on he capacior C2 is discharged. IGGE volage inp (pin 2) of he imer IC1 is lower han he rigger vale and herefore he op of he imer (pin 3) will reach level H. he capacior C2 is now rapidly charged hrogh he diode D2. When is volage exceeds ⅔ of he spply volage, he HESHOLD inp of he imer (pin 6) will case flipping he imer o he low op level. Now, he capacior C2 discharges hrogh he resisor 4. Becase he CV inp of he imer (pin 5) is now ied low o he imer op (pin 3) by he help of he diode D1 and he resisor 1, he volage on he capacior C2 ms drop lower han o ⅓ of he spply volage Isse 5, Volme 5,

5 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION so he inp IGGE drove he op of he imer high, leading o generae qasi-logarihmical volage decay. I is no crcial how sable he capaciy of he capacior C2 is becase is change affecs only he period, no he shape of he signal. he shape can be affeced by leakage crren hrogh he capacior and he inps of he conneced inegraed circis b in his case hese inflences can be negleced. he op bffer consiss of he resisors 21, 32 and he capacior C5. he vales of 32 and C5 were fond by pracical ess wih he pariclar gage. hey boh damp overshoos of he poiner down. A volage divider made of resisors 16 and 29 serves o bias he gage so he inflence of he bias se by he rimming resisor 14 is neralized. 5. Lis of pars Below here are liss of pars he circi was made of. able 1 esisors Par nmber Vale Specificaion 1, 9, 16, 2, 26 1kΩ M27, meal oxide,.5 W 2, 21 2,2kΩ M27, meal oxide,.5 W 3 68kΩ M27, meal oxide,.5 W 4, 15, 3 47kΩ M27, meal oxide,.5 W 5, 27 4,7kΩ M27, meal oxide,.5 W 6, 12, 19, 25 33kΩ M27, meal oxide,.5 W 7 1,5kΩ M27, meal oxide,.5 W 8, 24 47kΩ M27, meal oxide,.5 W 1, 11, 22 22kΩ M27, meal oxide,.5 W 13 1kΩ M27, meal oxide,.5 W 14, 17 1kΩ oary rimming resisor P1-L (gridr 5x1mm, horizonal) 18, 1kΩ M27, meal oxide,.5 W 28 47Ω M27, meal oxide,.5 W 29 1Ω M27, meal oxide,.5 W 31 1MΩ M27, meal oxide,.5 W 32 33Ω M27, meal oxide,.5 W able 2 Capaciors Par nmber Vale Specificaion C1 22µF Elecrolyic, radial, grid 5mm, 5mm, > 1 V C2 1nF Ceramic, olerance ± 2 % C3, C8 22µF Elecrolyic, radial, grid 5mm, 5mm, > 1 V C4, C7 2,2µF Elecrolyic, radial, grid 5mm, 5mm, > 1 V C5 1µF Elecrolyic, radial, grid 2mm, 5mm, > 1 V C6 1µF Elecrolyic, radial, grid 5mm, 5mm, > 1 V C9 4,7µF Elecrolyic, radial, grid 5mm, 5mm, > 1 V C1 1nF Ceramic, olerance ± 2 % able 3 Semicondcors Par nmber Vale Specificaion D1, D2, D3, D4, D5, D6 1N4148 General diode wih low rr IC1 LM555N Or eqivalen IC2 LC274P OA for low-volage applicaions 1, 2, 3 BC337 General NPN ransisors able 4 Oher SL1, SL2, SL3 Connecors, grid 2,54mm Analogos gage i = 6Ω, I m = 5µA 6. PCB layo he circi was bil on a single-layer PCB 9 x 6 mm. he layos of he PCB are shown below. Fig. 4 Circi pars displacemen Fig. 5 PCB layo (boom) IV. ESLS he above described circi was bil and nderwen several ess he resls of which are discssed below. he poiner-ype gage according o specificaion in ab. 4 was conneced and he circi was spplied wih 6.3 V (as acknowledged above). he air emperare was 2 C. he inp of he circi was driven by an accrae programmable fncion generaor. he sensiiviy was se by he resisor 17 so ha a 1 V 1 khz sinsoidal signal he poiner of he gage sayed a 8 % of he scale (a his poin ypically db mark occrs on he scales). he bias was se by he resisor 14 so ha poiner indicaed % of he scale when no signal was fed ino he circi inp. A. ecifier freqency response he freqency of he sinsoidal signal was changed from 1 Hz o 5 khz a 1 V MS and he corresponding volage was measred by a digial volmeer a he op of he operaing amplifier IC2D (in fron of he PWM modlaor). Op signal level was expressed in db compared o he level of he inp signal and he resls were ploed on he Fig. 6. Isse 5, Volme 5,

6 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION ploed ino a diagram o be seen in Fig. 8. As a nominal vale of db, he level of 1.55 V MS was se and he inp volage was changed from.15 V (- 2 db) o 3.1 V (+ 6 db). he inp volage is shown a he x-axis while a he y-axis here we can see he op volage measred a he analogos gage clamps. Fig.6 ecifier freqency response In he Fig. 6 we can see ha for adible freqencies he op volage of he recifier is no inflenced. he peak a he freqency of approximaely 15 khz is probably cased by effecs of recovery of he diodes D3 D6. If criical, he peak can be eliminaed for example by connecing a 1 nf capacior beween he collecor and he emier of he ransisor 2, which will no affec he circi performance in any oher aspecs. B. Logarihm processing In his sep i was esed how accrae is he logarihm aken from he recified signal by he logarihmical PWM modlaor. he inp of he circi was fed by sinsoidal signal a he freqency of 1 khz. An MS volage was measred a he clamps of he analogos gage by a digial oscilloscope so ha he non-lineariy of he gage was exrded. he resls were Fig. 7 An example of he scale ha wold be applicable o he gage driven by he advanced V meer driver. he scale is samped in decibels and was. here are wo crves in he diagram. he proper Briggsian logarihm is represened by he green line while he op of he logarihmic PWM modlaor is represened by he ble line. As can be seen, a high levels boh crves are almos idenical while a low levels he ble crve becomes qie linear alhogh he difference from he proper logarihm is, if he lineariy of he analogos gage is aken ino accon, qie accepable. Wha he scale wold look like on he appropriae gage can be seen in Fig. 8. I is presmable ha he error a low levels is cased by he low volage range of he reference signal as he spply volage is qie low and he reference volage falls nder he vale he operaing amplifier IC2C can process properly. Fig. 8 Logarihmiser performance (measred) Isse 5, Volme 5,

7 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION C. Checking he differeniaor o check he proper fncion of he differeniaor, he inp of he driver was fed wih shor plses wih a period of 1 s. In Fig. 9 here is an oscillogram showing wha he signal looked like in fron of he differeniaor (lower crve) and wha i looked like behind he differeniaor (a he op of he operaing amplifier IC2D he pper crve). Fig. 9 Differeniaor performance (measred). he lower crve represens he signal a he differeniaor inp while he pper crve represens he signal a he differeniaor op As saed above, seep plses drive he differeniaor o he posiive saraion. he widh of he plse shold be higher han 3 periods of he modlaor reference signal. In his pariclar case, he freqency of he reference signal was approximaely 1.2 khz (measred a he rn of he circi) so he plses ms las a leas 2.5 ms. he draion of he plses can be adjsed by he resisor 18. V. CONEMPOAY DEVELOPMEN Based on he posiive experience gained by pracical ess on he circi shown in Fig. 3, more complex recifier and driver has been designed for pracical sage. Is circi diagram can be seen in Fig. 1. he circi is 2-channel wih he inps a he connecors SL1 and SL3. Analog V meers are o be conneced o he connecor SL2. he circi can be spplied wih 6 V AC crren, becase i is spposed o be ilized in a vacm-be amplifier. he power spply is conneced o he clamps X1 and a simple mliplier made of capaciors and diodes booss he volage o approximaely 3 V. hen he parameric volage reglaor V1 sabilises he volage o 26 V. Increasing he spply volage helps s o prodce smooher and more accrae reference signal (see Fig. 1). he consrcion of he inp bffer and he recifiers sayed nchanged, as well as he memory capacior exciaion. he 555 imer has been replaced wih he operaional amplifier IC1A ha is conneced as asable rigger circi. According o simlaions his rigger circi shold rn a 28 Hz. he qasi-logarihmic reference signal is generaed a he capacior C6. he comparaors made wih he operaional amplifiers IC2A and IC2D share i. Anoher approach was employed a Fig. 1 Complex wo-channel V meers driver Isse 5, Volme 5,

8 ENAIONAL JONAL OF MAHEMAICS AND COMPES SIMLAION gage peak reacion. A he op of he PWM modlaors here are inegraors 14/C2 and 46/C11. he gages are excied via he operaional amplifiers IC2C and IC2B. he vales of he resisors 16 and 19 shold be as low as possible. hen he gage sysems are damped heavily becase of he low op impedance of he operaional amplifiers wih he appropriae feedback loops. he operaional amplifier IC1B delivers bias volage o he gages. he bias of boh channels is o be se by he roary rimming resisor 2. A he presen ime his circi is a sbjec o debgging. A. Simlaions Becase he inp bffers, recifiers and memory capaciors remained nchanged, no more simlaions were made on hese sbcircis. he fncion of he asable rigger circi was proved wih Mlisim sofware as well as he fncion of he poiner gages driver. B. Mechanical consrcion he sample of he complex driver was bil on a single-layer prined circi board he dimensions of which were approximaely 14 x 8 mm. Only cheap and convenional devices were sed, here is no need for special or expensive pars. he layo of he PCB can be seen in he figres below. Fig. 12 Complex V meer PCB layo VI. CONCLSION In his paper a design of he hardware signal logarihmiser and V meer driver is described. According o he heory menioned a he beginning of he paper a simple V meer driver was designed and bil according o he simlaions ha were processed by Mlisim sofware simlaor. he resls of physical measremens made on his circi are also described in he paper. Finally, based on he gained experience, a complex wo-channel logarihmising V meer driver was designed and bil. he main advanages of he proposed consrcion are as follows: symmerical proceeding of he inp signal, almos ideal freqency response a adible freqencies, logarihmical volage op and improved gage response a seep plses. ACKNOWLEDGEMEN his work was sppored by he Eropean egional Developmen Fnd nder he projec CEBIA-ech No. CZ.1.5/2.1./3.89 and by he Inernal Gran Agency a B in Zlin, projec No. IGA/45/FAI/1/D. Fig. 11 Complex V meer driver pars displacemen EFEENCES [1] K. ekorys e al., Prehled zie maemaiky I. Vyd. 6. Praha : Promehes, p. ISBN [2] J. Pncochar., Operacni zesilovace v elekronice. Vyd. 5. Praha : BEN, p. ISBN [3] V. Zahlava, Meodika navrh plosnych spoj. Czech echnical niversiy in Prage, 2 [4] Erdei, Z., Dicso, L., A., Neam, L., Chiver, O., Symbolic eqaion for linear analog elecrical circis sing Malab, WSEAS ransacions on Circis and Sysems, Isse 7, Vol. 9, Jly 21, ISSN: [5] Koon, J., Herencsar, N., Vrba, K., Minimal Configraion Versaile Precision Fll-Wave ecifier sing Crren Conveyors, In WSEAS ransacions on Advances in Commnicaions, Compers, Sysems, Circis and Devices, pp , Sepember 21, ISBN: [6] Pospisilik, M., Adamek, M., Logarihmic V Meer Driver, In WSEAS ransacions on ecen esearches in Aomaic Conrol, pp , May 211, ISBN: Isse 5, Volme 5,