Four-Channel Coil Driver User s Manual

Transcription

1 Fur-Channel Cil Driver User s Manual CldQuanta, Inc. 303 Sterling Cir. Bulder, CO USA Ph: Cpyright 2014, CldQuanta, Inc. All Rights Reserved Revisin 1.0 (April 2014)

2 Table f Cntents 1. Safety Ntices Warnings Symbls Package Cntents Specificatins Descriptin Overview Pwer Requirements Operatin Mnitrs Faults Cnnecting the Inputs Pin Cnnectins The Balanced Interface Balanced Line Drivers Shielding and Grunding the Input Cables Cnnecting the Outputs Pin Cnnectins Output Cable Types Trubleshting References Limited Warranty

3 1. Safety Ntices 1.1 WARNINGS The fllwing warning and cautins are applicable t this device: GROUNDING - The cil driver must be cnnected t AC (mains) pwer using a three-wire pwer crd with a prtective grund cntact. Always use a three-prng utlet that is prperly grunded. D nt perate the device with any tw-cnductr utlet r extensin crd. If using an extensin crd, use a three-cnductr versin. LINE FUSE - Only use line fuses with the required rated current and vltage, and the specified type (nrmal blw, time delay, etc.). D nt use repaired fuses r shrt-circuited fuse hlders; t d s culd cause a shck r fire hazard. INTERNAL ADJUSTMENTS - Internal adjustments shuld be made nly by trained service persnnel. When perfrming internal adjustments, use adequate safety precautins t prevent the risk f electric shck. High vltages frm the AC (mains) pwer line will be present! LINE VOLTAGE SELECTION The cil driver can perate frm an AC (mains) pwer surce with vltage between 90 and 264 VAC and a line frequency between 47 and 63 Hz. There is n line vltage selectin switch - the internal pwer supply will autmatically adjust its peratin fr the applied line vltage. 3

4 1.2 SYMBOLS The fllwing symbls are used in this manual and/r n the cil driver: Symbl Descriptin Cautin! Risk f electric shck Cautin! Risk f damage t equipment Earth Grund Reference Grund (nt necessarily cnnected t earth grund) Vltage Surce Amplifiers (p-amp, line driver, receiver, etc.) Resistr r General Impedance Capacitr Twisted-Pair Cable 4

5 1.3 PACKAGE CONTENTS Upn receiving the fur-channel cil driver, inspect the packaging fr damage. If the packaging shws signs f damage r excessive shck, ntify the shipping cmpany and then cntact CldQuanta. Keep packing materials, per the instructins f the shipping cmpany. The shipment shuld cntain the fllwing items: Fur-channel cil driver Input cables with attached three-pin LEMO plugs, quantity = 4 Three-prng pwer crd User s manual (this dcument) If any f these items are missing, please cntact CldQuanta t btain replacements. 5

6 2. Specificatins Parameter Symbl Cnditins Min Typ Max Unit Output Current 1 I 0 R Lad < 1Ω A Vltage Input Range Differential Cmmn-Mde V I -3 V CM V V Input Impedance Differential Cmmn-Mde Z i Z CM1, Z CM2 DC Resistance DC Resistance MΩ MΩ Accuracy Zer-Pint Offset Slpe V I = % ma A/V Current Mnitr Slpe Bandwidth V/A khz Dynamic Perfrmance 3 Full Pwer Bandwidth (-3 db) Step Respnse A Hz ms Lad Impedance fr Stability DC Resistance Inductance R Lad Ω mh Output Nise Integrated Bradband Peak 10 Hz 1 MHz 10 Hz 10 MHz μa RMS μa RMS Cmmn Mde Rejectin Rati (CMRR) f = 100 Hz f = 1 khz f = 10 khz f = 100 khz Z 0 = 100 Ω db AC Pwer Requirements Vltage Frequency VAC Hz Physical Dimensins Weight h x w x d 5.22 x 8.37 x x 21.3 x inches cm lbs kg 1 Output currents nly specified fr lad resistances R LOAD less than 1 Ω. 2 Each current mnitr utput cnsists f a series 100 Ω resistr and 0.1 μf capacitr t the grund terminal. The bandwidth is nly specified when cnnected t a high-impedance lad, such as an scillscpe input. 3 Dynamic perfrmance, including bandwidth and step respnse, depends n the inductance f the lad. 4 Values frm 10% t 90% f the pulse height. 6

7 3. Descriptin 3.1 OVERVIEW CldQuanta s fur-channel cil driver cnsists f fur bidirectinal vltage-cntrlled current surces that are designed t drive inductive lads. The utput currents are directly prprtinal t the input vltage, i.e. an input vltage f +1.0 V will set the utput current t +1.0 A. Each channel is independently capable f driving up t ±3 A. Each channel has its wn set f cntrls, indicatrs, input, and utput. Balanced, differential inputs islate the cil driver frm cntrl electrnics. Figures 1 and 2 shw the layuts f the frnt and rear panels, respectively. Descriptins f the switches, jacks, and indicatrs appear thrughut this sectin. 3.2 POWER REQUIREMENTS The cil driver is pwered with a standard three-prng pwer crd that inserts int the AC Pwer Mdule n the rear panel (see Figure 2). The unit can perate frm a 90 t 264 VAC and a line frequency between 47 and 63 Hz. The AC pwer mdule cntains the line fuse, which is a medium-blw type rated at 1 A / 250 V and measuring 5 20 mm. HIGH VOLTAGE WARNING! The cil driver must be cnnected t AC (mains) pwer using a threewire pwer crd with a prtective grund cntact. Always use a threeprng utlet that is prperly grunded. D nt perate the device with any tw-cnductr utlet r extensin crd. If using an extensin crd, use a three-cnductr versin. HIGH VOLTAGE WARNING! Only use line fuses with the required rated current and vltage, and the specified type (nrmal blw, time delay, etc.). D nt use repaired fuses r shrt-circuited fuse hlders; t d s culd cause a shck r fire hazard. 7

8 Figure 1: Frnt panel layut f the fur-channel cil driver. Figure 2: Rear panel layut f the fur-channel cil driver. 8

9 3.3 OPERATION T turn n t the cil driver, use the Main Pwer switch n the far left side f the frnt panel. Applying pwer t the cil driver des NOT enable the utputs. The fur black buttns n the frnt panel marked Output On/Off are used t enable and disable the each channel s utput. By pressing this buttn, an internal relay electrically cnnects that channel s utput t the lad; pressing this buttn again unlatches the relay, breaking the electrical cnnectin t the lad. When a channel is enabled, the blue LED n the Output On/Off buttn will be illuminated. When a channel s utput is enabled, a fault cnditin will autmatically disable that utput. The utput can be re-enabled by pressing the Output On/Off buttn again. Pressing this buttn resets all faults cnditins; hwever, if the fault cnditin still exists, the utput will be immediately disabled. 3.4 MONITORS Each channel has a Current Mnitr BNC jack whse utput, in vlts, is equal t the utput current, in amperes. This mnitr utput is referenced t earth grund. 3.5 FAULTS Several prtectin features have been incrprated int the cil driver t prtect bth the lad and the driver. Fault cnditins are indicated with the LEDs n the frnt panel. These faults are: Overtemp The cil driver is designed t perate cntinuusly with all channels simultaneusly utputting currents up t 3 A. Hwever, blcking the air intake and fan n the rear panel (see Figure 2) may cause the internal temperature t exceed the high temperature limit. If this happens, the Overtemp LED will illuminate and the utput will be disabled. High Current Open Circuit This LED indicates ne f several internal circuit faults, including permanent damage t the utput-stage pwer transistr. If the utput is cnnected t earth grund, a high current fault will ccur. This indicatr des nt reflect any kind f current limiting. If n lad is cnnected t the utput, the Open Circuit LED will illuminate when the user tries t enable the utput. If this happens, check the utput cable cnnecting the driver t the lad fr bad cnnectins. 9

10 4. Cnnecting the Inputs The current utputs f the cil driver are cntrlled with input vltages applied t the LEMO jacks at the left side f the rear panel (see Figure 2). The utput current, in amperes, is equal t the differential input vltage, in vlts. Input prtectin prevents either f the input vltages frm exceeding ±10 V (with respect t the driver s grund). T reject grund nise and electrmagnetic interference the inputs are cnfigured as balanced receivers with very high cmmn-mde input impedances. This architecture is particularly useful fr rejecting pick-up at 50/60 Hz and its harmnics. The subject f balanced circuitry and cmmn-mde rejectin is t extensive t be thrughly reviewed here. Fr readers wh want t learn mre abut this tpic, several references are prvided [1-5]. In particular, this subject arises extensively in high-end and prfessinal audi, and many useful discussins can be fund within this cmmunity. 4.1 PIN CONNECTIONS Figure 3 shws the pin diagram fr the input cnnectrs. The cil driver will utput a psitive current when the vltage applied t the + terminal (pin 2) is larger than the vltage applied t the terminal (pin 3). Pin 1, which is clsest t the red ntch, is uncnnected inside f the cil driver. Figure 3: Pin diagram fr the input cnnectrs. Pin 1 is clset t the red ntch. 10

11 Figure 4: The fur-channel cil driver uses balanced receivers t reject grund nise and prvide immunity t electrmagnetic interference. 4.2 THE BALANCED INTERFACE The + and inputs tgether frm a balanced receiver. Here, the cil driver s utput, in amperes, is equal t the vltage difference, in vlts, applied acrss the tw inputs. The DC resistance frm each f these inputs t the internal grund is 10 M. Balanced inputs prvide excellent cmmn-mde rejectin, helping t keep the inputs less susceptible t electrmagnetic interference and grund nise. T better understand hw balanced circuitry prvides cmmn-mde rejectin, Figure 4 shws a schematic f a vltage surce cnnected t ne f the cil driver s inputs. Here, a line driver utputs a differential signal nt tw lines labeled HI and LO. These lines have (cmmn-mde) surce impedances Z 01 and Z 02, and a differential surce impedance f Z 01 + Z 02. At the cil driver, the (cmmnmde) lad impedances t the cil driver s grund are Z CM1 and Z CM2, and the differential lad impedance is Z I. In the cil driver, the receiver is a differential amplifier that prduces an utput nly in respnse t a ptential difference acrss its inputs. As a result, cmmn-mde signals (i.e. signals that appear identically n bth f the inputs) are suppressed via subtractin. Assume that the driver is referenced t a grund that has superimpsed n it a nise vltage, as measured with respect t the receiver s grund. The vltage at each f the receiver s inputs, again measured with respect t the receiver s grund, is the sum f the desired transmitted signal and the unwanted grund nise vltage. The grund nise will appear identically n bth f the inputs, and therefre will be remved by the receiver upn subtractin. 11

12 Figure 5: Balanced drivers: (a) In the single p-amp circuit, setting R2 = R3 apprximately matches the surce impedances fr the HI and LO lines. (b) T accunt fr the rise in p-amp utput impedance as a functin f frequency, the grund reference can als be buffered with an p-amp. (c) Tw DAC channels can als be used. 4.3 BALANCED LINE DRIVERS The cil driver s inputs must be prperly driven t maximize cmmn-mde rejectin. T see this, nte that the vltage n the HI line will be slightly reduced due t the vltage divider frmed by Z 01 and Z CM1. Similarly, the vltage n the LO line will als be reduced, this time by the vltage divider frmed by Z 02 and Z CM2. Fr perfect subtractin f cmmn-mde signals, the vltage dividers shuld be matched as well as pssible. Given the limitatins impsed by the 1% tlerance f typical resistrs, the mismatch between the tw vltage dividers can be minimized by reducing the surce impedances and increasing the lad impedances, i.e. Z 0 «Z CM. T meet this cnditin fr Z CM = 10 M, the driver shuld have a lw utput impedance. Fr example, with Z 0 = 100 the vltage n each line will be reduced by a factr f 10 M / ( M) Assuming that the surce impedances are set with resistrs with a tlerance f 1%, the vltage dividers n the HI and LO lines will be matched t 1 part in 10-7, crrespnding t a cmmn-mde rejectin rati (CMRR) f 20 lg 10-7 = -140 db. The actual CMRR that can be attained will be limited by the perfrmance f the receiver s subtractin circuit. Actual CMRR values typically exceed 90 db fr frequencies up t 1 khz. Figure 5 shws three p-amp circuits recmmended as balanced line drivers. Figure 5a shws the simplest line driver: a single p-amp buffer. Here, the surce impedances fr the HI and LO lines are set by R2 and R3, respectively. The line impedances are balanced when R2 = R3. The circuit in Figure 5a assumes a perfect p-amp, i.e. ne with zer utput impedance. While this is a gd assumptin at lw frequencies, real-wrld p-amps have utput impedances that increase with frequency (usually a result f stray inductance in the p-amp leads). Due t this frequency-dependence, the surce impedances f the tw lines can becme unbalanced at higher frequencies. The circuit in Figure 5b is a slutin: buffer the driver GND with the same p-amp used t buffer the INPUT signal. Fr cnvenience, the tw buffers can be part f a dual p-amp packaged in a single chip. Nw, the frequency dependence f the tw surce impedances will be matched, helping t prevent degradatin f CMRR at higher frequencies. 12

13 Figure 5c shws a circuit that may ffer additinal nise rejectin when used with certain digitalt-analg cnverters (DACs). Here, bth the + and inputs f the cil driver are driven with vltages prduced by independent DACs. Anther cmmn architecture fr balanced drivers is the active flating surce. This circuit is available in a single-chip, including Analg Devices SSM2142 and Texas Instruments DRV134/135. Unlike the circuits in Figure 5, the active flating surce has very high cmmnmde utput impedances that make the circuit s stability strngly dependent n cable capacitance and inductance. Fr this reasn, the active flating surce is nt recmmended. D s SUMMARY Use a balanced line driver t prvide gd cmmn-mde rejectin. Use dual p-amps t keep surce impedances matched with frequency. Minimize utput impedance t reduce the dependency f CMRR n impedance mismatches. Dn ts Use an active flating surce. 13

14 4.4 SHIELDING AND GROUNDING THE INPUT CABLES This sectin shws hw t cnnect the cil driver s inputs t fur types f vltage surces: (1) an earth-grunded balanced line driver (2) a flating balanced line driver (3) an earth-grunded single-ended line driver (4) a flating single-ended line driver These wiring cnfiguratins are shwn schematically in Figure 6. Earth-grunded balanced line drivers are preferred since they are less likely t generate cmmn-mde vltages large enugh t exceed the input range f the receiver. Hwever, flating line drivers may als be used. In additin, single-ended (i.e. unbalanced) line drivers may be used, althugh there will be n rejectin f cmmn-mde nise and pick-up. All f the cil driver s internal circuitry is referenced t AC earth grund. Imprperly referenced and/r grunded vltage surces can generate cmmn-mde vltages n the input lines that can exceed the input range f the cil driver s balanced receivers. Under these cnditins, the cil driver will nt perate. T maximize cmmn-mde rejectin f grund nise and electrmagnetic interference, the use f shielded, twisted-pair cables is strngly recmmended. This sectin shws where t cnnect cable shields s that grund lps and shield current induced nise (SCIN) are avided. In additin, several imprper cnnectins invlve the cable shields are described Prper Wiring f the Cntrl Inputs The cil driver is shipped with fur input cntrl cables. On ne end f each cable, the tw signal wires have been sldered t a LEMO plug that mates with the cntrl inputs n the rear panel f the cil driver. The cable drain wires have nt been sldered t pin 1 f their respective LEMO plugs. In additin, the cable shield has nt been cnnected t the metal husing f the LEMO plug, as described in Sectin The ther ends f the cntrl cables have nt been cnnectrized. The user shuld carefully review the fllwing scenaris t determine the prper way t cnnect the cables shields and signal wires t vltage surces Earth-Grunded Balanced Line Drivers (Preferred) The preferred wiring cnfiguratin t the cil driver s inputs is shwn in Figure 6a. Here, a vltage surce and balanced line driver that are referenced t earth grund drives a shielded, twisted-pair cable. The cable shield shuld be directly cnnected t earth grund nly at the vltage surce. At the receiver (i.e. the cil driver s input), the cable shield shuld nt be cnnected t earth grund r the cil driver s chassis. T btain the best shielding and cmmn-mde rejectin, the electrical cnnectin frm the cable shield t earth grund shuld be made with a wire sldered directly t the internal grund 14

15 f the vltage surce. D nt rely n the electrical cnnectin t earth grund thrugh a metal enclsure! A sldered wire prvides a lwer impedance path t earth grund Flating Balanced Line Drivers The vltage surce may be flating in sme situatins, such as when the circuit is pwered by batteries r transfrmer-islated frm the AC pwer line (see Figure 6b). In this case, the vltage f the flating reference grund, as measured with respect t the receiver s grund, will be a cmmn-mde signal that is rejected by the receiver. Ensure that the utputs f the flating surce have nt drifted ut f the receiver s cmmn-mde input range. Fr a flating vltage surce, the cable shield shuld be cnnected nly t the reference grund f the vltage surce. At the receiver (i.e. the cil driver s input), the cable shield shuld nt be cnnected t earth grund r the cil driver s chassis Earth-Grunded Single-Ended Line Drivers The cil driver can be cntrlled with single-ended vltage surces. Hwever, there will be n rejectin f cmmn-mde nise and pickup. T use an earth-grunded single-ended vltage surce with the supplied input cable, the LO signal line and cable shield shuld be tied t earth grund at the vltage surce (see Figure 6c). At the receiver (i.e. the cil driver s input), the shield shuld nt be cnnected t earth grund r the cil driver s chassis Flating Single-Ended Line Drivers Similar t balanced line drivers, the cil driver may be cntrlled with a single-ended vltage surce that is flating. Again, care must be taken t ensure that the cntrl vltages, as measured with respect t the cil driver s grund, d nt drift ut f the cil driver s cmmn-mde input range. The cable shield shuld be cnnected nly t the reference grund f the vltage surce (see Figure 6d). At the receiver (i.e. the cil driver s input), the shield shuld nt be cnnected t earth grund r the cil driver s chassis. 15

16 Figure 6: Cnnecting the cil driver t vltage surces. (a) The preferred setup uses an earth-grunded balanced line driver and shielded twisted-pair cable t achieve high rejectin f cmmn-nise nise and pick-up. (b) If the vltage surce is flating, the cable shield shuld be cnnected t the flating grund f the line driver. (c) Single-ended vltage surces can be used with the cil driver, althugh there will be n rejectin f cmmnmde signals. (d) Fr a flating single-ended vltage surce, the cable shield and negative signal line shuld bth be cnnected t the flating grund f the vltage surce. 16

17 4.4.2 Imprper Wiring f the Cntrl Inputs Figure 7 shws three imprper techniques fr wiring the cil driver s inputs: a cable shield grunded at bth ends, a cable shield cnnected nly at the receiver, and a cable shield cnnected t the metal husing f the cil driver s input plug. The prblems that arise frm these cnnectins are described belw Shield Earth-Grunded at Tw Pints As indicated by the purple line in Figure 7a, a cable shield grunded at bth f its ends creates a grund lp. Due t this lp, vltage nise n the earth grund will drive a nise current thrugh the cable shield. Imperfectins in cable manufacturing give rise t imbalances in magnetic and capacitive cuplings between the cable s shield and tw signal lines. As a result, currents flwing alng the shield will cuple differentially int the signal lines. The cupled nise will appear as nrmal-mde t the receiver, and will therefre nt be rejected. This effect is knwn as shield current induced nise, r SCIN Cable Shield Cnnected nly at Receiver As mentined in the previus sectin, imperfectins in cable manufacturing give rise t an imbalance in capacitive cupling between the cable s shield and each f tw signal lines. These cable capacitances interact with the line driver s cmmn-mde utput impedances t frm lwpass filters. If the shield is cnnected nly at the cil driver input, as shwn in Figure 7b, then vltage nise n the earth grund will be filtered differently n each f the tw signal lines. The result is a significant degradatin f cmmn-mde rejectin f this grund nise. The prblem can be mitigated by always tying the cable shield t the reference vltage f the line driver Cable Shield Cnnected t Husing f Input Jack The LEMO plug that cnnects t the cil driver s cntrl input has a metal husing that can be internally tied t the cable shield. When this cnnectin is made, the cable shield is directly tied t earth grund thrugh the cil driver s metal enclsure. This creates the same grund lp shwn in Figure 7a. T prevent this grund lp frm frming, the cable shield shuld never be tied t the metal husing f the input plug. 17

18 Figure 7: Imprper wiring f the cil driver's cntrl inputs. 18

19 D s SUMMARY Use shielded twisted-pair cables fr the inputs. Always cnnect the cable shield directly t reference grund at the signal surce. Leave the shield uncnnected at the cil driver s inputs. Make cnnectins t earth grund with a star-grunding technique, i.e. slder a wire directly t the earth grund tab n the AC input pwer mdule. Dn ts Cnnect the cable shield nly at the cil drivers inputs. Grund the cable shield at bth the vltage surce and cil driver. Cnnect the cable shield t the metal husing f the input jack. Rely n electrical cnnectins t earth grund thrugh a metal enclsure. Instead, use a wire sldered directly t the earth grund tab n the AC input pwer mdule. 19

20 5. Cnnecting the Outputs The cil driver s utputs can be cnnected t the lad using a standard DB15 cable. Cil assemblies purchased frm CldQuanta are shipped with a cable that directly cnnects t the cnnectr n the cil driver s rear panel. CAUTION! NEVER cnnect the utput t AC grund, earth grund, r the cil driver enclsure (which is tied t earth grund). Ding this will cause a High Current fault. 5.1 PIN CONNECTIONS Figure 8 shws the pin diagram fr the utput 15-pin D-sub cnnectr. The black text indicates pin numbers accrding t the standard cnventin fr D-sub cnnectrs. The fur channel utputs are indicated by yellw text. Currents flw in the directin f the red arrws, i.e. frm the tp rw f pins (#1 t 8) t the bttm rw f pins (#9 t 15). When CldQuanta s cil assembly is cnnected t the DA-15 cnnectr in Figure 8 using the cable supplied with the assembly, the fur cil driver channels will be cnfigured t prduce bias and quadruple fields alng the x directin, and nly bias fields alng the y and z directins. In this scenari, the Y cils are cnnected in series by tying pins 4 and 11 t each ther inside f the cable husing. Similarly, the Z cils are cnnected in series by tying pins 6 and 13 tgether. The table belw summarizes the cnnectins: Figure 8: Pin diagram fr the DA-15 utput cnnectrs. Currents flw in the directin f the red arrws, with channel numbers indicated in yellw. Currents flw ut f the tp rw f pins (#1 t 8) and return t the bttm rw f pins (#9 t 15). 20

21 Cil Driver Channel # D-sub Pin # Cil Name Field Directin Field Type Value X1 Frnt ( ) Quadruple r X2 Rear ( ) Bias 15.1 G/(cmA) r G/A Y1 + Y2 Left + Right ( ) Bias G/A Z1 + Z2 Tp + Bttm ( ) Bias G/A 5.2 OUTPUT CABLE TYPES Unshielded twisted-pair cables are recmmended fr the cil driver s utputs. The twisted-pair gemetry minimizes cupling f external magnetic fields nt the cables by reducing the area f the magnetic receiver frmed by the cables, lad, and cil driver [2]. Furthermre, since the currents flwing n the tw lines are equal and ppsite in directin, twisted-pair cables prduce a net magnetic field that is zer when averaged ver the distance f ne twist. Minimizing the magnetic fields generated by the chip currents reduces cupling t ther electrnics and cables. The cil driver is NOT designed t perate with shielded utput cables. The use f a shielded utput cable can cuple nise nt the utputs. D s Dn ts SUMMARY Use a twisted-pair utput cable. Never cnnect any f the utputs t earth grund. Use shielded utput cables. 21

22 6. Trubleshting Descriptin Slutin The unit is nt receiving pwer frm the input AC (mains) line: Main Pwer indicatr des nt illuminate when buttn is depressed. Check that the pwer crd is prperly inserted int a three-prng prtective-grunded pwer utput. Check that the pwer crd is prperly plugged int the input pwer mdule n the back f the cil driver. Check that the crrect fuse has been inserted int the fuse hlder n the back f the cil driver. If the fuse is blwn, replace with a fuse f the same current rating, vltage rating, and type (i.e. sl-bl, fast bl, etc.). Output On/Off indicatr des nt illuminate when buttn is depressed. Check that the unit is prperly pwered frm the AC (mains) line. If the unit is prperly pwered frm the AC (mains) line, a fault cnditin may be immediately causing the unit t disable its utput. Check t see if ne f the fault LED indicatrs n the frnt panel is illuminated. If s, refer t the descriptin belw assciated with that fault. N current is utputted when the Output On/Off indicatr is illuminated. Check that the input cntrl line is prperly cnnected t bth the vltage surce and the apprpriate input jack n the rear panel. Output current des nt reach the maximum specificatin f 3 A. Check that the lad resistance R LOAD is less than 1 Ω. If 0.5 Ω < R LOAD < 1 Ω, the maximum utput current specificatin is 3 A. When the cil driver is driven with flating vltage surces, the reference grund may have exceeded the cmmn-mde input vltage range f the cil driver. Switch t earth-grunding f the vltage surces. Overtemp LED indicatr is illuminated. The internal circuitry f the cil driver is t ht. Wait several minutes fr the circuits t cl dwn. If this prblem ccurs repeatedly, mve the unit t an area where there is better air flw. High Current LED indicatr is illuminated. Check that the utput is nt cnnected t earth grund. Check that utputs frm different channels are nt cnnected t each ther. If the unit cannt be brught ut f this fault cnditin, please cntact CldQuanta. Open Circuit LED indicatr is illuminated. The cil driver des nt see a lad. Check that the utput cable is prperly cnnected. If the utput is prperly cnnected, check that the ttal lad resistance R LOAD is less than 1 Ω. 22

23 7. References [1] B. Whitlck, Design f High-Perfrmance Balanced Audi Interfaces, dwnladed frm September 12, [2] A. Rich, Shielding and Guarding, Hw t E clude Interference-Type Nise, What t D and Why t D It A Ratinal Apprach, Analg Dialgue, issue 17-1, Analg Devices, Nrwd, Massachusetts, [3] R. Mrrisn, Grunding and Shielding: Circuits and Interference, 5th Ed., Jhn Wiley & Sns, Hbken, New Jersey, [4] B. Whitlck, Balanced Lines in Audi Systems: Fact, Fictin, and Transfrmers, J. Audi Eng. Sc., vl. 43, n. 6, pp , [5] J. Brwn and B. Whitlck, Cmmn-Mde t Differential-Mde Cnversin in Shielded Twisted-Pair Cables (Shield-Current-Induced Nise), Audi Engineering Sciety 114th Cnventin, Amsterdam, The Netherlands,

24 8. Limited Warranty 1. Definitins a) Delivery means standard CldQuanta shipping t and arrival at the receiving area at the Ship T address specified in Custmer s Order. b) Exhibits means attachments that describe r therwise apply t the sale f Prducts. c) Prducts means hardware, dcumentatin, accessries, supplies, parts and upgrades that are determined by CldQuanta t be available frm CldQuanta upn receipt f Custmer s Order. Custm Prducts means Prducts mdified, designed r manufactured t meet Custmer requirements. d) Specificatins means specific technical infrmatin abut CldQuanta Prducts that has been delivered by CldQuanta t the Custmer with Custmer s Order. e) Supprt means hardware maintenance and repair; training; and ther standard supprt services prvided by CldQuanta. Custm Supprt means any agreed nnstandard supprt, including cnsulting and custm prject services. 2. Limited Warranty a) CldQuanta warrants CldQuanta hardware Prducts against defects in materials and wrkmanship fr a perid f ne year frm the delivery date. b) CldQuanta des nt warrant that the peratin f Prducts will be uninterrupted r errr free. c) If CldQuanta receives ntice f defects, CldQuanta will, at its ptin, repair r replace the affected Prducts. If CldQuanta is unable, within a reasnable time, t repair, replace r crrect a defect r nn-cnfrmance in a Prduct t a cnditin as warranted, Custmer will be entitled t a prrated refund f the purchase price upn prmpt return f the Prduct t CldQuanta. Such refunded amunt will be prrated based n a fur-year straight line depreciatin schedule. Custmer will pay expenses fr return f such Prducts t CldQuanta. CldQuanta will pay expenses fr shipment f repaired r replacement Prducts. d) CldQuanta warrants that CldQuanta Supprt will be prvided in a prfessinal and wrkmanlike manner. Sme newly manufactured CldQuanta Prducts may cntain and CldQuanta Supprt may use remanufactured parts that are equivalent t new in perfrmance. e) The abve warranties d nt apply t defects resulting frm: (i) imprper r inadequate maintenance by Custmer; (ii) custmer r third party supplies; (iii) unauthrized mdificatin; (iv) imprper use r peratin utside f the Specificatins fr the Prduct; (v) abuse, negligence, accident, lss r damage in transit; (vi) imprper site preparatin; r (vii) unauthrized maintenance r repair. f) THE ABOVE WARRANTIES ARE EXCLUSIVE AND NO OTHER WARRANTY, WHETHER WRITTEN OR ORAL, IS EXPRESSED OR IMPLIED. TO THE EXTENT PERMITTED BY LAW, COLDQUANTA SPECIFICALLY DISCLAIMS THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND NONINFRINGEMENT. 24