MC74HC4538A. Dual Precision Monostable Multivibrator (Retriggerable, Resettable)

Transcription

1 Dual Precision Monostable Multivibrator (Retriggerable, Resettable) The is identical in pinout to the MC4538. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This dual monostable multivibrator may be triggered by either the positive or the negative edge of an input pulse, and produces a precision output pulse over a wide range of pulse widths. ecause the device has conditioned trigger inputs, there are no trigger input rise and fall time restrictions. The output pulse width is determined by the external timing components, Rx and Cx. The device has a reset function which forces the output low and the output high, regardless of the state of the output pulse circuitry. Unlimited Rise and Fall Times llowed on the Trigger Inputs Output Pulse is Independent of the Trigger Pulse Width ± 0% Guaranteed Pulse Width Variation from Part to Part (Using the Same Test Jig) Output Drive Capability: 0 LSTTL Loads Outputs Directly Interface to CMOS, NMOS and TTL Operating Voltage Range: 3.0 to V Low Input Current:.0 µ High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No. 7 Chip Complexity: 45 FETs or 36 Equivalent Gates CX/RX RESET Figure 3. Pin ssignment 9 CX2/RX2 RESET PDIP 6 N SUFFIX CSE 648 SO 6 D SUFFIX CSE 75 6 TSSOP 6 DT SUFFIX CSE 948F 6 MRKING DIGRMS N WLYYWW 6 HC4538 WLYWW HC 4538 LYW = ssembly Location L, WL = Wafer Lot Y, YY = Year W, WW = Work Week ORDERING INFORMTION Device Package Shipping N PDIP /ox D SOIC 6 48/Rail DR2 SOIC /Reel DT TSSOP 6 96/Rail DTR2 TSSOP /Reel 6 Semiconductor Components Industries, LLC, 200 pril, 200 Rev Publication Order Number: /D

2 CX RX 2 INPUTS RESET 3 CX2 RX2 5 4 INPUTS PIN 6 = PIN 8 = RESET 2 3 RX ND CX RE EXTERNL COMPONENTS PIN ND PIN 5 MUST E HRD WIRED TO Figure 4. Logic Diagram FUNCTION TLE Inputs Outputs Reset H H H L H X L Not Triggered H H X Not Triggered H L,H, H Not Triggered H L L,H, Not Triggered L X X L H X X Not Triggered 258

3 MXIMUM RTINGS (Note 3) Symbol Parameter Value Unit DC Supply Voltage 0.5 to 7.0 V VI DC Input Voltage 0.5 VI 0.5 V VO DC Output Voltage (Note 4) 0.5 VO 0.5 V IIK DC Input Diode Current,, Reset CX, RX IOK DC Output Diode Current 25 m IO DC Output Sink Current 25 m ICC DC Supply Current per Supply Pin 00 m I DC Ground Current per Ground Pin 00 m TSTG Storage Temperature Range 65 to 50 C TL Lead temperature, mm from Case for 0 Seconds 260 C TJ Junction temperature under ias 50 C m J Thermal resistance PDIP SOIC TSSOP PD Power Dissipation in Still ir at 85 C PDIP SOIC TSSOP C/W mw MSL Moisture Sensitivity Level FR Flammability Rating Oxygen Index: 30% 35% UL 94 VO (0.25 in) VESD ESD Withstand Voltage Human ody Model (Note 5) Machine Model (Note 6) Charged Device Model (Note 7) ILatch Up Latch Up Performance bove and elow at 85 C (Note 8) 300 m 3. bsolute maximum continuous ratings are those values beyond which damage to the device may occur. Extended exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum rated conditions is not implied. 4. IO absolute maximum rating must be observed. 5. Tested to EI/JESD Tested to EI/JESD Tested to JESD22 C0. 8. Tested to EI/JESD For high frequency or heavy load considerations, see the ON Semiconductor High Speed CMOS Data ook (DL29/D). >2000 >00 >500 V RECOMMENDED OPERTING CONDITIONS Symbol Parameter Min Max Unit DC Supply Voltage (Referenced to ) 3.0* V Vin, Vout DC Input Voltage, Output Voltage (Referenced to ) 0 V T Operating Temperature, ll Package Types C tr, tf Input Rise and Fall Time = V (Figure 7) = 4.5 V = V or (Figure 5) Rx External Timing Resistor < 4.5 V 4.5 V No Limit Cx External Timing Capacitor 0 F *The HC4538 will function at V but for optimum pulse width stability, should be above 3.0 V. The maximum allowable values of Rx and Cx are a function of the leakage of capacitor Cx, the leakage of the HC4538, and leakage due to board layout and surface resistance. For most applications, Cx/Rx should be limited to a maximum value of 0 F/.0 M. Values of Cx >.0 F may cause a problem during power down (see Power Down Considerations). Susceptibility to externally induced noise signals may occur for Rx >.0M. 0.Unused inputs may not be left open. ll inputs must be tied to a high logic voltage level or a low logic input voltage level.. Information on typical parametric values can be found in the ON Semiconductor High Speed CMOS Data ook (DL29/D)..0 ns k 259

4 DC CHRCTERISTICS Î Guaranteed Limits Î 55 to 25 C Î 85 C 25 C SymbolÎ Parameter Test Conditions V CC Volts Min Î Max Î Min Î Max Î Min Î Max Unit VIH Î Minimum High Level Vout = 0. V or 0. V Î.5 Î Input Voltage Iout 20 µ Î.5 Î 3.5 Î Î Î.5 Î 3.5 Î Î V VIL Maximum Low Level Vout = 0. V or 0. V Input Voltage Iout 20 µ Î 4.5 Î Î Î Î Î Î Î Î Î Î V VOH Minimum High Level Vin = VIH or VIL V Output Voltage Iout 20 µ Î Î Î 4.4 Î Î 4.4 Î 5.9 Î Î 5.9 Î Î 5.9 Î Î Vin = VIH or VIL Iout 4.0 m Iout 5.2 m Î Î Î Î Î Î Î Î Î Î VOL Î Maximum Low Level Vin = VIH or VIL Î Output Voltage Iout 20 µ Î 4.5 Î 0. Î Î 0. Î Î 0. Î Î 0. Î Î 0. Î 0. V Vin = VIH or VIL Î Iout 4.0 m Î Iout 5.2 m Î Î Î 0.33 Î Î Î Î 0.33 Î Î 0.4 Iin Î Maximum Input Vin = or Î Leakage Current (,, Reset) Î Î ± 0. Î Î Î Î ±.0 Î Î Î Î ±.0 µ Iin Maximum Input Vin = or Leakage Current Î ± 50 Î Î Î Î ± 500Î Î Î Î ± 500 n Î (Rx, Cx) Î ICC Maximum uiescent Vin = or Supply Current and 2 = Low Î Î Î Î 30 Î Î Î Î 220 Î Î 350 µ (per package) Iout = 0 µ Î Standby State Î Î ICC Maximum Supply Vin = or Î Î = Î Î Î Î Current and 2 High Î 25 C Î 45 C to 85 C 55 C to 25 C Î (per package) Î Iout = 0 µ Î ctive State Pins 2 and 4 = µ 260

5 C CHRCTERISTICS (CL = 50 pf, Input tr = tf = ns) Î Guaranteed Limits Î 55 to 25 CÎ 85 C 25 C SymbolÎ Parameter V CC VoltsÎ MinÎ MaxÎ Min Î Max Î Min Î Max Unit tplh Î Maximum Propagation Delay Î Î Input or to 4.5 Î 75 Î 35 Î Î Î 220 Î 44 Î Î Î 265 ns 53 (Figures 6 and 8) tphl Î Î Maximum Propagation Delay Î Input or to N Î 4.5Î Î Î Î Î Î Î Î Î Î Î ns (Figures 6 and 8) tphl Maximum Propagation Delay ns Reset to Î 4.5Î 35 Î Î 44 Î Î 53 (Figures 7 and 8) Î Î 30 Î Î 37 Î Î 45 tplh Î Maximum Propagation Delay Î Î Reset to N 4.5 (Figures 7 and 8) Î Î Î 75 Î 35 Î 30 Î Î 220 Î 44 Î 37 Î Î 265 ns 53 Î 45 ttlh, Maximum Output Transition Time, ny Output Î Î tthl Î (Figures 7 and 8) Î 4.5Î Î Î Î 75 5 Î Î 95 Î Î 9 Î Î 0 Î 22 ns Cin Maximum Input Capacitance (., Reset) Î Î Î Î 0 Î Î Î Î 0 Î Î Î 0 pf (Cx, Rx) 2.For propagation delays with loads other than 50 pf, and information on typical parametric values, see the ON Semiconductor High Speed CMOS Data ook (DL29/D) C, = 5.0 V CPD Power Dissipation Capacitance (per Multivibrator)* 50 pf *Used to determine the no load dynamic power consumption: PD = CPD 2 f + ICC. For load considerations, see the ON Semiconductor High Speed CMOS Data ook (DL29/D). TIMING CHRCTERISTICS (Input tr = tf = ns) Guaranteed Limits 55 to 25 C 85 C 25 C CC Symbol Î Parameter Î V Volts Î Min Max Min Max Min Max Î Î Î Î Unit trec Minimum Recovery Time, Inactive to or 0 Î (Figure 7) Î 0 Î Î 0 Î Î 0 0 Î Î 0 Î Î 0 0 Î ns tw Î Minimum Pulse Width, Input or Î (Figure 6) Î 4.5Î 60 Î 2 Î Î Î 75 Î 5 Î Î 90 Î 8 Î Î ns tw Minimum Pulse Width, Reset (Figure 7) Î 4.5Î 60 2 Î Î Î Î 75 5 Î Î Î Î 90 8 Î ns tr, tf Maximum Input Rise and Fall Times, Reset ns Î (Figure 7) Î 400 Î Î 400 Î Î 400 Î or Î (Figure 7) 4.5 No Limit 26

6 OUTPUT PULSE WIDTH CHRCTERISTICS (CL = 50 pf)t Conditions Guaranteed Limits Î 55 to 25 CÎ 85 C 25 C SymbolÎ Parameter Î Timing Components V CC VoltsÎ MinÎ MaxÎ Min Î Max Î Min Î Max Unit τ Î Output Pulse Width* Î Rx = 0 kω, Cx = 0. µf Î 5.0Î 0.63Î 0.77Î 0.6 Î 0.8 Î 0.59 Î 0.8 ms (Figures 6 and 8) Î Pulse Width Match Î etween Circuits in the Î same Package Î Î ± 5.0 % Î Î Pulse Width Match Î Î ± 0 % Variation (Part to Part) *For output pulse widths greater than 00 µs, typically τ = krxcx, where the value of k may be found in Figure 5. k, OUTPUT PULSE WIDTH CONSTNT (TYPICL) T = 25 C OUTPUT PULSE WIDTH (τ) ns kω s s 00 ms 0 ms ms 00 µs 0 µs µs = 5 V, T = 25 C MΩ 00 kω 0 kω, POWER SUPPLY VOLTGE (VOLTS) CPCITNCE (µf) Figure 5. Typical Output Pulse Width Constant, k, versus Supply Voltage (For output pulse widths > 00 µs: τ = krxcx) Figure 6. Output Pulse Width versus Timing Capacitance OUTPUT PULSE WIDTH (τ) (NORMLIZED TO 5 V NUMER) Rx = 00 kω Cx = 000 pf Rx = MΩ Cx = 0. µf T = 25 C , POWER SUPPLY VOLTGE (VOLTS) Figure 7. Normalized Output Pulse Width versus Power Supply Voltage 262

7 . OUTPUT PULSE WIDTH (τ) (NORMLIZED TO 25 C NUMER) = 6 V Rx = 0 kω Cx = 0. µf 0.85 = 3 V T, MIENT TEMPERTURE ( C) Figure 8. Normalized Output Pulse Width versus Power Supply Voltage OUTPUT PULSE WIDTH (τ) (NORMLIZED TO 25 C NUMER) Rx = 0 kω Cx = 0. µf = 5.5 V 0.98 = 5 V = 4.5 V T, MIENT TEMPERTURE ( C) Figure 9. Normalized Output Pulse Width versus Power Supply Voltage tw(h) tw(l) tplh τ tplh τ tphl τ tphl τ Figure 0. Switching Waveform 263

8 tr tf 90% 0% trr tf tf RESET 90% 0% ttlh tw(l) trec τ + trr tphl 90% 0% (REED PULSE) tthl tplh 90% 0% Figure. Switching Waveform TEST POINT DEVICE UNDER TEST OUTPUT CL* *Includes all probe and jig capacitance Figure 2. Test Circuit 264

9 PIN DESCRIPTIONS INPUTS, 2 (Pins 4, 2) Positive edge trigger inputs. rising edge signal on either of these pins triggers the corresponding multivibrator when there is a high level on the or 2 input., 2 (Pins 5, ) Negative edge trigger inputs. falling edge signal on either of these pins triggers the corresponding multivibrator when there is a low level on the or 2 input. Reset, Reset 2 (Pins 3, 3) Reset inputs (active low). When a low level is applied to one of these pins, the output of the corresponding multivibrator is reset to a low level and the output is set to a high level. CX/RX and CX2/RX2 (Pins 2 and 4) External timing components. These pins are tied to the common points of the external timing resistors and capacitors (see the lock Diagram). Polystyrene capacitors are recommended for optimum pulse width control. Electrolytic capacitors are not recommended due to high leakages associated with these type capacitors. (Pins and 5) External ground. The external timing capacitors discharge to ground through these pins. OUTPUTS, 2 (Pins 6, 0) Noninverted monostable outputs. These pins (normally low) pulse high when the multivibrator is triggered at either the or the input. The width of the pulse is determined by the external timing components, RX and CX., 2 (Pins 7, 9) Inverted monostable outputs. These pins (normally high) pulse low when the multivibrator is triggered at either the or the input. These outputs are the inverse of and

10 RxCx UPPER REFERENCE CIRCUIT + Vre, UPPER OUTPUT LTCH M2 M 2 kω M3 LOWER REFERENCE CIRCUIT + Vre, LOWER CONTROL CIRCUIT C C R CONTROL RESET CIRCUIT RESET POWER ON RESET RESET LTCH Figure 3. Logic Detail (/2 the Device) 266

11 CIRCUIT OPERTION Figure 2 shows the HC4538 configured in the retriggerable mode. riefly, the device operates as follows (refer to Figure 0): In the quiescent state, the external timing capacitor, Cx, is charged to. When a trigger occurs, the output goes high and Cx discharges quickly to the lower reference voltage (Vref Lower /3 ). Cx then charges, through Rx, back up to the upper reference voltage (Vref Upper 2/3 ), at which point the one shot has timed out and the output goes low. The following, more detailed description of the circuit operation refers to both the logic detail (Figure 9) and the timing diagram (Figure 0). UIESCENT STTE In the quiescent state, before an input trigger appears, the output latch is high and the reset latch is high (# in Figure 0). Thus the output (pin 6 or 0) of the monostable multivibrator is low (#2, Figure 0). The output of the trigger control circuit is low (#3), and transistors M, M2, and M3 are turned off. The external timing capacitor, Cx, is charged to (#4), and both the upper and lower reference circuit has a low output (#5). In addition, the output of the trigger control reset circuit is low. OPERTION The HC4538 is triggered by either a rising edge signal at input (#7) or a falling edge signal at input (#8), with the unused trigger input and the Reset input held at the voltage levels shown in the Function Table. Either trigger signal will cause the output of the trigger control circuit to go high (#9). The trigger control circuit going high simultaneously initiates two events. First, the output latch goes low, thus taking the output of the HC4538 to a high state (#0). Second, transistor M3 is turned on, which allows the external timing capacitor, Cx, to rapidly discharge toward ground (#). (Note that the voltage across Cx appears at the input of both the upper and lower reference circuit comparator). When Cx discharges to the reference voltage of the lower reference circuit (#2), the outputs of both reference circuits will be high (#3). The trigger control reset circuit goes high, resetting the trigger control circuit flip flop to a low state (#4). This turns transistor M3 off again, allowing Cx to begin to charge back up toward, with a time constant t = RxCx (#5). Once the voltage across Cx charges to above the lower reference voltage, the lower reference circuit will go low allowing the monostable multivibrator to be retriggered. UIESCENT STTE CYCLE ( INPUT) CYCLE ( INPUT) RESET RE INPUT (PIN 4 OR 2) 7 trr INPUT (PIN 5 OR ) -CONTROL CIRCUIT OUTPUT RX/CX INPUT (PIN 2 OR 4) Vref LOWER 5 UPPER REFERENCE CIRCUIT Vref UPPER LOWER REFERENCE CIRCUIT 6 6 RESET INPUT (PIN 3 OR 3) 20 RESET LTCH 22 0 OUTPUT (PIN 6 OR 0) 2 τ 9 τ τ + trr Figure 4. Timing Diagram 267

12 When Cx charges up to the reference voltage of the upper reference circuit (#7), the output of the upper reference circuit goes low (#8). This causes the output latch to toggle, taking the output of the HC4538 to a low state (#9), and completing the time out cycle. POWER DOWN CONSIDERTIONS Large values of Cx may cause problems when powering down the HC4538 because of the amount of energy stored in the capacitor. When a system containing this device is powered down, the capacitor may discharge from through the input protection diodes at pin 2 or pin 4. Current through the protection diodes must be limited to 30 m; therefore, the turn off time of the power supply must not be faster than t = Cx/(30 m). For example, if = 5.0 V and Cx = 5 µf, the supply must turn off no faster than t = (5.0 V) (5 µf)/30 m = 2.5 ms. This is usually not a problem because power supplies are heavily filtered and cannot discharge at this rate. When a more rapid decrease of to zero volts occurs, the HC4538 may sustain damage. To avoid this possibility, use an external damping diode, Dx, connected as shown in Figure. est results can be achieved if diode Dx is chosen to be a germanium or Schottky type diode able to withstand large current surges. RESET ND POWER ON RESET OPERTION low voltage applied to the Reset pin always forces the output of the HC4538 to a low state. The timing diagram illustrates the case in which reset occurs (#20) while Cx is charging up toward the reference voltage of the upper reference circuit (#2). When a reset occurs, the output of the reset latch goes low (#22), turning on transistor M. Thus Cx is allowed to quickly charge up to (#23) to await the next trigger signal. On power up of the HC4538 the power on reset circuit will be high causing a reset condition. This will prevent the trigger control circuit from accepting a trigger input during this state. The HC4538 s outputs are low and the not outputs are high. RE OPERTION When used in the retriggerable mode (Figure 2), the HC4538 may be retriggered during timing out of the output pulse at any time after the trigger control circuit flip flop has been reset (#24), and the voltage across Cx is above the lower reference voltage. s long as the Cx voltage is below the lower reference voltage, the reset of the flip flop is high, disabling any trigger pulse. This prevents M3 from turning on during this period resulting in an output pulse width that is predictable. The amount of undershoot voltage on RxCx during the trigger mode is a function of loop delay, M3 conductivity, and VDD. Minimum retrigger time, trr (Figure 7), is a function of ) time to discharge RxCx from VDD to lower reference voltage (Tdischarge); 2) loop delay (Tdelay); 3) time to charge RxCx from the undershoot voltage back to the lower reference voltage (Tcharge). Figure 3 shows the device configured in the non retriggerable mode. For additional information, please see pplication Note (N558/D) titled Characterization of Retrigger Time in the HC4538 Dual Precision Monostable Multivibrator. DX CX RX RESET Figure 5. Discharge Protection During Power Down 268

13 TYPICL PPLICTIONS RISING EDGE CX RX RISING EDGE CX RX = RESET = RESET = CX RX CX RX = FLLING EDGE FLLING EDGE RESET = RESET = Figure 6. Retriggerable Monostable Circuitry Figure 7. Non retriggerable Monostable Circuitry = N/C RXCX RESET N/C N/C Figure 8. Connection of Unused Section ONE SHOT SELECTION GUIDE 00 ns µs 0µs 00 µs ms 0 ms 00 ms s 0 s MC4528 MC4536 MC4538 MC454 HC4538* *Limited operating voltage (2 6 V) TOTL OUTPUT PULSE WIDTH RNGE RECOMMENDED PULSE WIDTH RNGE 23 HR 5 MIN 269