LA-UR Title: Author(s): Intended for: Upgrading the Data Acquisition and Control System of the LANSCE LINAC.

Transcription

1 LA-UR Apprved fr public release; distributin is unlimited. Title: Upgrading the Data Acquisitin and Cntrl System f the LANSCE LINAC Authr(s): Bars, Dlres Intended fr: Particle Acceleratr Cnference 2011, / (New Yrk, New Yrk, United States) Disclaimer: Ls Alams Natinal Labratry, an affirmative actin/equal pprtunity emplyer,is perated by the Ls Alams Natinal Security, LLC fr the Natinal NuclearSecurity Administratin f the U.S. Department f Energy under cntract DE-AC52-06NA By acceptance f this article, the publisher recgnizes that the U.S. Gvernment retains nnexclusive, ryalty-free license t publish r reprduce the published frm f this cntributin, r t allw thers t d s, fr U.S. Gvernment purpses. Ls Alams Natinal Labratry requests that the publisher identify this article as wrk perfrmed under the auspices f the U.S. Departmentf Energy. Ls Alams Natinal Labratry strngly supprts academic freedm and a researcher's right t publish; as an institutin, hwever, the Labratry des nt endrse the viewpint f a publicatin r guarantee its technical crrectness.

2 UPGRADING THE DATA ACQUISITION AND CONTROL SYSTEM OF THE LANSCE LINAC D. Bars, LANL, Ls Alams, NM 87545, U.S.A. Abstract Ls Alams Natinal Labratry LANL is in the prcess f upgrading the cntrl system fr the Ls Alams Neutrn Science Center (LANSCE) linear acceleratr. The 38 year-ld data acquisitin and cntrl equipment is being replaced with COTS hardware. An verview f the current system requirements and hw the Natinal Instruments crio system meets these requirements will be given, as well as an update n the installatin and peratin f a prttype system in the LANSCE LINAC. LANSCE LANSCE is a Natinal Research Facility which cntains a half-mile-lng linear acceleratr (LINAC). The LANSCE LINAC creates prtn beams with energies up t 800 millin electrn vlts and is capable f accelerating prtns t 84% the speed f light. LANSCE achieved full energy n June 9, 1972 and cntinues t run t this day with much f its late 1960 s early 1970 s technlgy intact. An example f this late 1960 s technlgy is the data acquisitin and cntrl system fr the LANSCE LINAC better knwn as RICE (Remte Indicatin and Cntrl Equipment). RICE RICE was built as part f the first large-scale effrts t use cmputers t cntrl an acceleratr. Designed in the late 1960s, befre CAMAC and VME standards, it was created t prvide cntrl and data readut fr mst devices in the LANSCE LINAC. Its architecture was designed t directly map nt the architecture f the LINAC and thus is tightly cupled t the LINAC hardware. An average RICE mdule cntains 30 analg inputs, 50 binary inputs, 8 analg cmmands, and 30 digital cmmand channels. There are 66 RICE mdules distributed alng the LANSCE LINAC. The layut f the LANSCE LINAC is illustrated in Figure 1. The 66 RICE Mdules are cnnected t ne uvax cmputer in a star tplgy cnfiguratin. Figure 1: LANSCE LINAC. A RICE mdule cnsists f three separate cmpnents: the RICE chassis, the RICE Input/Output (I/O) chassis and the Analg Data System (ADS) chassis. The RICE chassis is a serial t parallel and parallel t serial wrd encder/decder. The RICE I/O chassis is used t interface the RICE system with the acceleratr inputs/utputs. It can address up t 128 binary channels. The ADS chassis is a 128 channel differential A/C cnverter used fr analg readback f acceleratr devices. Interface between the RICE system and acceleratr equipment is accmplished thrugh a distributin panel lcated n the side f the equipment rack. Owners f the equipment run wires t this distributin panel t cnnect with the RICE hardware. RICE Cntrls RICE cntrls can be split int tw main categries, Industrial Cntrls and Timed-and-Flavred Data. Industrial Cntrls cnsist f cmmand and readback f tw-state devices, alng with set-pint generatin and analg readback f devices. Timed-and-Flavred data prvides data with a time crrelatin related t the peratin f the acceleratr. This paper discusses the replacement f the RICE Industrial Cntrls (IC). Prblems with RICE upkeep There are several prblems that arise due t the RICE system being designed with 30 year ld technlgy. The supply f spare RICE IC replacement bards is dwindling r has been spent. Many f the discrete cmpnents that make up the RICE electrnics can n lnger be purchased. The plastic cnnectrs n the RICE printed circuit bards are becming brittle and spares are nt available. Calibratin capabilities were nt built-in t the system, raising questins abut year-t-year cmparability f settings. Lack f any vendr supprt means all maintenance and repairs must be dne in-huse. The use f nn-standard electrnics means all in-huse peple must receive extensive RICE-specific training. The riginal designers and builders have retired making extended re-engineering necessary t understand the reasns fr current architecture. Althugh RICE is very reliable, it is lng past its expected lifetime and the lack f spares makes the prbability f eventual catastrphic failure real. UPGRADE REQUIREMENTS The RICE system is required fr the peratin f the LANSCE LINAC functinal requirements and cnstraints fr the RICE upgrade are as fllws: Avid serius failures due t age f system and lack f spares. A serius failure due t RICE wuld impact beam availability fr users. Grwth path fr a 30 year facility life expectancy.

3 Plans fr the LANSCE acceleratr t be used as the prtn beam surce fr the Matter-Radiatin Interactins in Extremes (MaRIE) experimental facility prject a 30 year lifetime fr the facility. High Reliability The new system shuld have an expected dwntime n wrse than the existing RICE Supprt and use utside the acceleratr cmmunity s we can benefit frm develpment by thers. A cmmercial mdular system is desirable fr lw mean-time-t-repair and vendr supprt. N extended acceleratr dwntimes frce by upgrade prject. The upgrade must nt require dwntimes beynd nrmally scheduled mnthly maintenance and extended maintenance perids. RICE functinality must be preserved r imprved. Analg input data with 11 bits plus sign. Analg input ranges frm ± 10V, ±1 V, ±100 mv Analg cmmands must be cmpatible with existing stepper mtr cntrllers. Binary input data, cmpatible with 0-8.5V fr lw and greater than 14V fr high. Binary cmmands cmpatible with existing lcal binary cmmand mdules. Linked binary cmmands: cmmand t ne channel may cmmand thers. RICE REPLACEMENT Prgrammable Autmated Cntrllers (PACS) specifically Natinal Instruments (NI) Cmpact RIO (crio) PACS system was chsen t replace the RICE IC. The crio system was able t meet r exceed the system requirements necessary fr the RICE IC replacement. The crio system is a recnfigurable cntrl and data acquisitin system. It is a high perfrming system that is very reliable with individual mdule Mean Time Befre Failure MTBF ranging frm 37,141 hurs. t 2,172,740 hurs [1]. It is a cmmercial mdular system that is being used in a wide range f applicatins frm Avinics t rbtics. Because each crio system is independent f ther crio system cnnected in a bus tplgy, we will be able t replace the RICE system in sectins during scheduled maintenance perids. The crio system has a variety f ht swappable I/O mdules that can be used fr a variety f applicatins which crrespnd t the RICE functinality requirements. The crio system functinality will be divided up between ne analg chassis and ne digital chassis. The analg chassis will cnsist f the set-pint generatin cntrls and the analg readback f devices. The digital chassis will cnsist f the cmmand and readback f twstate devices. Each chassis will cntain a crio-9024 real-time pwerpc cntrller, a crio slt kvirtex-5 LX110 recnfigurable chassis, applicable I/O mdules, crrespnding I/O terminal interface bards and a prewired rack muntable chassis enclsure. The layut f the crio Analg and Digital Chassis is illustrated in Figure 2. Figure 2: crio Digital and Analg chassis. IMPLEMENTATION OF CRIO Binary Channel Implementatin RICE Mdule 48 was chsen t test crio prttype system. Tw Variable Energy binary utput channels were selected t be installed because f their critical switching time cnstraint. It was a d-r-die test fr the crio system. These channels were installed and successfully tested in Nvember f The remainder f the binary cmmand and readback channels were implemented in May f The crio system cnsisted f the fllwing cmpnents: NI crio-9014 Real time cntrller with 400 MHZ, 128 MB DRAM and 2 GB strage. NI crio slt chassis with an embedded 3 M gate Virtex-II FPGA NI channel, 24V sinking digital input mdule NI channel, 5V t 60 V sinking digital utput mdule In-huse built rack munt bracket Generic interface bards LabVIEW 8.5 Prblems with Binary Channel Implementatin One f the prblems that we encuntered with the implementatin f the binary channels was that the embedded Experimental Physics and Industrial Cntrl

4 System (EPICS) sftware that is used at LANSCE, was nly tested n LabVIEW 8.5. LabVIEW 2009 was available t prgram the crio cde, but because the EPICS sftware had nt been tested n LabVIEW 2009, we were frced t use the lder sftware. Use f this lder sftware caused a secnd prblem, we ran ut f FPGA memry. The LabVIEW prgram fr the binary channels used up 99% f the FPGA space. Time was ur third prblem. We were limited n the amunt f time that we had t install and test the binary crio by the acceleratr maintains perid. The last prblem we encuntered was that we cnnected the NI-9477 binary utput mdule t a piece f acceleratr equipment that was nt tied t grund. This caused the NI-9477 mdule t fail. Binary Implementatin Crrectins We were able t address these prblems that arse in ur implementatin f the binary channels. NI finished its testing f the LabVIEW 2009 sftware with embedded EPICS and released it t us. The FPGA space prblem was slved by replacing the crio cntrller and chassis with the NI crio-9024 cntrller (800Mhz, 512 MB DRAM and 4GB strage). The NI-9485, 8-channel slidstate relay digital utput mdule, was installed t interface with the acceleratr channels that were nt tied t grund. This eliminated the prblem with the NI T imprve n the time needed t install a crio system, we purchased a cmmercial BiRIO rack munt chassis and BiRIO terminal interface bards. Implementatin f Analg Channels The analg chassis fr Mdule 48 was installed in May f The crio system cnsisted f the fllwing cmpnents: NI crio-9024 Real time cntrller with 800MHZ, 512 MB DRAM and 4 GB strage. NI crio slt chassis with Virtex-5 LX110 FPGA NI channel, 16-Bit analg input mdule cnfigured as a 16 channel differential analg input mdule. NI channel, 5-30V digital utput mdule used t create 5V, 50us wide pulses fr stepper mtrs BiRi-FS9010 BiRa 19 rack munt crio chassis BiRi- Interface bards LabVIEW 2009 Prblem and Crrectins with Analg Channels Only ne prblem arse with implementatin f the analg channels, nise n the input signals. Our first apprach t slving the analg input nise prblem was t cnnect all unused input channels t grund n the interface bard. This imprved the nise prblem slightly. We then installed an RC filter at the interface junctin ging t the input channels t the crio mdule. This eliminated mre f the nise but anther slutin was needed. Finally we installed a 2 ple Butterwrth Filter t the sftware input f the mdule. The cmbinatin f these three slutins eliminated the nise prblem. The flw diagram f the crio system is illustrated in Figure 3. Figure 3: crio system. CONTINUED RICE UPGRADE Current Upgrade Due t the mdular nature f the crio system, it will be installed in smdules during the LANSCE LINAC maintenance perids. Fr the current maintenance perid, Sectr H f the LANSCE LINAC was chsen t be upgraded. Sectr H, illustrated in Figure 1, cnsists f RICE Mdules RICE Mdule 47 is currently being wrked n with the subsequent Sectr H RICE mdules t fllw. Imprvements We have wrked with BiRa Systems [2] t amend the interface bard fr the NI-9205 mdule (analg input) s that nw the RC filter can be installed n the bard rather than the interface junctin t the mdule. BiRa has als enhanced their BiRi-FS9010 rack munt chassis t a functinal pre-wired crio system chassis. This will help decrease ur time needed fr during the installatin f crio systems. FUTURE RICE UPGRADE RICE Mdules will be upgraded in sectins, preferably a sectr at a time. As funding becmes available, we will cntinue t upgrade the RICE IC system t the crio system. REFERENCES [1] Natinal Instruments CmpactRIO [1] BiRa Systems, Albuquerque, NM

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