Design Simulation & Study of a Current Mirror act as a Current Regulator by enhancement type MOSFET

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1 Design Simulation & Study of a Current Mirror act as a Current Regulator by enhancement type MOSFET Md. Rakibul Hasan 1, Sardar Masud Rana 2, Md. Anzan-Uz-Zaman 3, Md. Nasrul Haque Mia 4, Samioul Hasan Talukder 5, Mahabubul Hoq 6, Mahamudul Hasan 7 1 Engineer, Institute of Electronics, Atomic Energy Research Establishment, Dhaka, Bangladesh 2,3,4 Senior Scientific Officer, Institute of Electronics, Atomic Energy Research Establishment, Dhaka, Bangladesh 5 Depertment of EEE, Mymensingh Engineering College, Mymensingh, Bangladesh 6 Director, Institute of Electronics, Atomic Energy Research Establishment, Dhaka, Bangladesh 7 Director General, Atomic Energy Research Establishment, Dhaka, Bangladesh ARTICLE INFO Volume 3 Number 3/2014 Issue 7 DOI: /ajase/2014/v3i7/53577 Received: Jul 09, 2014 Accepted: Jul 11, 2014 Revised: Jul 15, 2014 Published: August 10, for correspondence: sami_hasan01@yahoo.com ABSTRACT Although large electronic systems can be constructed almost entirely with digital techniques, many systems still have analog components and current mirror is the core structure for almost all analog and mixed mode circuits. It determines the performance of analog structures, which largely depends on their characteristics. In this paper, we have analyzed a basic type as well as a cascade type of current mirror using enhancement type MOSFET and study different parameters like minimum output voltage, equivalent resistance and output sink current characteristics etc. Keywords: Current Mirror, Minimum output voltage, MOSFET, Output impedance, Sink current Source of Support: Nil, Conflict of Interest: None declared. How to Cite: Hasan MR, Rana SM, Anzan-Uz-Zaman M, Mia MN, Talukder SH, Hoq M and Hasan M Design Simulation & Study of a Current Mirror act as a Current Regulator by enhancement type MOSFET Asian Journal of Applied Science and Engineering, 3, Available at: This article is is licensed under a Creative Commons Attribution-NonCommercial 4.0 International License. Attribution-NonCommercial (CC BY-NC) license lets others remix, tweak, and build upon work non-commercially, and although the new works must also acknowledge & be non-commercial. INTRODUCTION A n often-used circuit applying the bipolar junction transistor is the so-called current mirror, which serves as a simple current regulator, supplying nearly constant current to the load over a wide range of load resistances. In other word, we can define it as a two terminal circuit whose output current is independent of the output terminal Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 67

2 voltage and depends only on the input current. Generally, it is used to generate a replica of given reference current. If necessary, it can also amplify or attenuate the reference current. A current mirror can be thought as a current controlled current source. Ideally, the output impedance of a current source should be infinite and capable of generating or drawing a constant current over a wide range of voltages. However, finite value of output resistance and a limited output voltage is required to keep the device in saturation will ultimately limit the performance of the current mirror. Current mirror has been used for biasing, loading, current amplification etc. Current mirrors are employed in many applications such as operational amplifiers, analog to digital and digital to analog converters. TOPOLOGIES OF CURRENT MIRRORS BASIC CURRENT MIRROR Fig. 1 shows the basic current mirror. A current flows through M1 corresponding to VGS1. Since VGS1 = VGS2, ideally the same current, or a multiple of the current in M1, flows through M2. If the MOSFETs are of the same size, the same drain current flows in each MOSFET provided M2 stays in the saturation region (Chikani etl). The current through M1 can be given by, The output current, assuming M2 in saturation is given by Fig 1: Basic Current mirror Since V GS1=V GS2, the ratio of the drain currents is The desired output current can be obtained by adjusting W/L ratios of two devices (Chikani etl, Baker etl, 2005). Here it is required that M2 remains in saturation. Therefore, the minimum output voltage across the current mirror is given by V min=v DS(SAT)=V GS-V THN. The output resistance r 0 of current mirror is equal to output resistance of M2. Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 68

3 CASCADE CURRENT MIRROR Cascade configuration is used to increase the output resistance of the current source or sink. Fig. 2 shows the diagram for this configuration. If we define ΔV as excess gate-source voltage, the gate voltage of M4 is 2(ΔV+V THN) and source voltage is ΔV+V THN. The minimum voltage across the current sink has been limited by the requirement that M4 remains in the saturation region V DS4 (V GS4 -V THN) or V D4 (2ΔV+V THN) (Chikani etl, Baker etl, 2005). This minimum voltage across the cascade current mirror is significantly larger than the minimum voltage across the basic current mirror (Chikani etl). Fig 2: Cascade current mirror SIMULATION RESULTS These proposed circuits are designed and simulated using P-Spice BASIC CURRENT MIRROR Systematic Circuit Diagram The circuit diagram of the basic current mirror has been given below. The desired output sink current is 10 µa. Fig 3: simulation diagram of basic current mirror This P-Spice model was simulated to obtain output sink current. R1 was 380 and R2 was 500 KΩ respectively. Both MOSFET was enhancement type and simulation voltage was 2.5V, 2,5V, 3V respectively. Output Sink Current The expected sink current is 10 µa. Currents flowing through M2 and M1 has shown in fig 4. Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 69

4 Fig 4: Currents flowing through M1 and M2 Fig 4 shows that I D1is mirrored almost perfectly by I D2. But both the currents I D1 and I D2 are 10.46µA rather than 10 µa which had been expected. This is because we disregarded various parasitic effects in our calculation. Minimum required voltage across the current mirror The plot of sink current vs. voltage across the current mirror is shown in Fig 5. Fig 5: sink current vs. voltage across the current mirror From Fig 5, it can be observed that the output sink current is only constant for V 3-1.5V. It implies that M2 saturates when V 3-1.5V. We have to ensure this condition is satisfied to use this mirror in circuits as a current source. EQUIVALENT CIRCUIT AND OUTPUT RESISTANCE CALCULATION The output resistance of the current source can be derived as per following calculations. Fig 6: Equivalent circuit for output resistence Here R_o has taken as output resistance. The calculation of R_o has shown in below. Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 70

5 Fig 7: Output resistance From figure 7, it is seen that the M2 mirrors the current in M1 very accurately. M1 and M2 are ideally matched in the simulation. This is the reason the current has been mirrored accurately. But the current is not equal to 10µA; it is closer to 10.5 µa. The value for the width we got from the calculation was nm. But we simulated with width of 15nm. Further, we assumed threshold voltage to be 0.83 V and also we used a Level one MOSFET model in the simulation. We got the deviations. The performance can be improved by using the current reference circuit to supply the current of M1. In this circuit, we see that,. This would not have happened if we used a current reference. This is true for all current mirrors shown in preceding sections. The current mirrors do just what the name implies: mirroring. If there is an error in the reference current, the current mirror mirrors the error also. And in case the ratio is different in the output branch and reference branch, the error in the output current will be a multiple of the error in the reference current. The output resistance of the circuit is 14 MΩ. Thus, although the resistance is very high, it is not infinite as desired. Output resistance can be increased by cascading transistors. The current mirror if the voltage across the mirror is larger than the minimum value. CASCADE CURRENT MIRROR Systematic Circuit Diagram The cascade current circuit model has been given in fig 8. This circuit is obtained by cascading the basic current mirror to get larger output resistance Ro. The output current is as same as in basic current mirror. Fig 8: Schematic diagram for cascade current mirror. Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 71

6 This P-Spice model was simulated to obtain output sink current from cascade mode current mirror. R1 was 260 and R2 was 500 KΩ respectively. All MOSFETs was enhancement type and simulation voltage was 2.5V, 2,5V, 3V respectively. Output Sink Current Fig 9: Output Sink Current for cascade current mirror Minimum required voltage across the current mirror Fig 10: Minimum required voltage across the current mirror The output resistance of cascade mirror is in the order whereas that of basic current mirror is. The plots obtained by Spice simulations have been given below. We can see that the output resistance is much larger than that of basic current mirror. Fig 11: Output resistance for cascade current mirror Fig 11 indicates that Output resistance of cascade current mirror is much larger than current mirror. The minimum voltage required across the mirror for it to operate as a current source is larger than the basic current mirror by MIRROR WITH MULTIPLE OUTPUTS Systematic Circuit Diagram The circuit diagram for the basic current mirror with multiple output currents has shown in below.this circuit is obtained by extending the basic current mirror to give multiple outputs. Take Currents: Here we have taken all N Mos Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 72

7 Fig 12: Schematic diagrams for cascade multiple current mirrors. This P-Spice model was simulated to obtain output sink current. R was 380 and R2 to R5 was 500 KΩ respectively. All MOSFETs was enhancement type and simulation voltage was 2.5V, 2,5V, 3V respectively. By simulating this circuit output sink currents are ovserved which are plotted below. Fig 13: Output sinks currents for multiple mirror current mirror circuit Result Table The minimum required voltage plots have been shown in below. Minimum required voltage Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 73

8 Fig 14: Required output voltages DISCUSSION The minimum voltage required at the drain of each output MOSFET can be found in the same way as done for the basic current mirror and each output would give the same value and same plot as the basic current mirror. This newly designed current is free from current matching problem with transistor as it is designed based on MOSFET. It also has some limitation as the current varies with the change in output voltage as the output impedance is not infinite. CONCLUSION The output sink current for single stage current mirror is found 10.46µA rather than 10 µa which was expected. This is due to the fact that we disregarded various parasitic effects in our calculation. For cascade mode it is found 8.5 µa. Minimum required output voltage is observed -1.5V for single stage and -1V for Cascade type current mirror. Output impedance is 14 MΩ. However there is a wide range of scopes to work with the output impedance which ensure the constant output current. REFERENCES Jaydeep Chikani, Parag Chaudhari, Prof. Vijay Savani, Analysis and Characterization of Various Current Mirror Topologies in 90 nm Technology, International Journal of Emerging Technology and Advanced Engineering. R. Jacob Baker, Harry W. Li, and David E. Boyce (2005), CMOS Circuit Design, Layout and Simulation. P. E. Allen and D. R. Holberg, CMOS Analog Circuit Design, Oxford University Press, Franco Maloberti, Analog Design for CMOS VLSI systems, Kluwer Academic/ Plenum Press, Manish Tikyani and Rishikesh Pandey, A New Low-Voltage Current Mirror With Enhanced Bandwidth, IEEE paper Asian Business Consortium AJASE Aug 2014 Vol 3 Issue 7 Page 74