How material engineering contributes to delivering innovation in the hyper connected world
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1 How material engineering contributes to delivering innovation in the hyper connected world Paul BOUDRE, Soitec CEO Leti Innovation Days - July 2018 Grenoble, France
2 We live in a world of data In perpetual contact with data Our connected life Connect with each other and the world around us
3 A new hierarchy of needs Maslow s Pyramid of Needs Maslow s Pyramid 2.0
4 Turning data into meaningful information Efficiency Knowledge Security Health Improving the way we live, work, learn and play
5 Electronics is the backbone of society Performance Cost Power Form factor Reliability The semiconductor industry pushes boundaries To meet new needs
6 Substrates are the foundation of high-tech products Services Final Product Software Hardware Semiconductor device Substrates The characteristics of the initial substrate define the performance and architecture of devices and circuits
7 Material innovation
8 An intricate relationship between substrate and device Superior effective resistivity Engineered substrates vs bulk Reduced crosstalk & energy loss Improved linearity RF-eSI HR-SOI Source : Substrate related RF performance on Trap-Rich High Resistivity SOI wafers, Khaled Ben Ali, Thesis, 2014 Bulk
9 Substrate engineering through Smart Cut TM Technology Crystalline layer engineering Combination with insulating layer Crystal on Crystal (lattice compatible) Amorphous on Amorphous Crystal on Crystal (not lattice compatible) Crystal on Amorphous Example: SOI (Silicon-on-Insulator) Si on SiO2 Smart-Cut TM Thin & highly uniform layers
10 Atomic scale layer transfer uniformity Native oxide Crystalline silicon 14 atomic planes ~ 3.8nm Buried oxide
11 Which benefits does material innovation bring? End Product Benefits Device quality and functionality improvement Substrate Pre-processing of active layers with unique properties
12 100 mm 150 mm Substrate wafer sizes 200 mm 300 mm This is what we do at Soitec This is not Soitec's full portfolio, but a broad outline of it SENSING IMAGER PROCESSING DIGITAL TO MIXED-SIGNAL CONNECTIVITY RF COMPUTING PHOTONICS DISPLAY EMERGING TECHNOLOGIES 100% of smartphones contain RF-SOI
13 Collaboration all along the value chain is required to improve PPAC* + reliability and speed up end products innovations Services Final Product Software Hardware Semiconductor device Substrates *PPAC = Power, Performance, Area (Form Factor), Cost
14 25 years of joint development with the Leti Increased development speed to enable breakthrough solutions -Smart Cut
15 Substrates: a unique & powerful innovation platform. SMART EVERYTHING Services Final Product Software ICs & Systems Innovation Platforms Hardware Semiconductor device Substrates Substrate Innovation Center
16 Shortening the R&D to solution cycle Fabless System innovation platforms & ecosystem & Academia Substrate Innovation Center Substrate Solutions Sampling & Prototyping Exploratory Solutions New Applications Equipment Materials
17 What does material innovation bring? Technological breakthroughs, unlocking hidden value Material innovation and substrate engineering made entirely new horizons possible
18
19 Sensing everything - even the invisible More data means that an increasingly larger portion of the electromagnetic spectrum has to be used to: Capture data Communicate data
20 3D image sensing: Imager-SOI for NIR Silicium not working well in Near Infrared (NIR) New material required (with reflective layer) to boost quantum efficiency Imager-SOI solution
21
22 AI and machine learning are increasingly being pushed from the cloud to the edge 4 drivers pushing AI at the edge Classifying raw data into metadata Examples of applications Latency Data privacy Giga/Mega bytes per second of incoming raw data from sensors Home Assistant Power consumption Automotive Cost Few (kilo) bytes per second of outgoing, heavily processed minimum joule per operation
23 Variation of chip characteristics Variation of chip characteristics FD-SOI engineered substrates enable embedded AI at the edge Superior transistor behavior Ultimate power efficiency thanks to dynamic Vth control (body bias) Bulk FD-SOI Without Body Bias With Body Bias Maximum design margins Reduced design margins Better electrostatics Lower variability Dynamic Vth control Simpler manufacturing Vdd min ~0.4V Minimum Energy Point *Vth = Threshold voltage
24
25 Technology node SOI enables RF-CMOS technologies Enhanced signal integrity BULK (Planar) RF-SOI 7 BULK (3D FinFET) FD-SOI FD-SOI with RF option
26 Number of bands and bands combinations New filter technologies are needed for 5G CHALLENGES More bands and band combinations Larger bands and higher frequency bands Band density in the spectrum Cost and manufacturability NEW ENGINEERED SUBSTRATE Filter template Bulk acoustic filter POI acoustic filter
27
28 Massive growth in data transmission Photonics-SOI wafer Optical waveguide for silicon integrated photonic systems High speed, long range, low power optical transceivers for next generation datacenters
29
30 Disruptive engineered substrates for microled displays Engineered substrate Red/Green/Blue MicroLEDs High brightness, high resolution, low power consumption microleds for next generation displays
31 Data Revolution An increasingly higher degree of sensing, processing and communications capability is being embedded into physical objects to bring intelligence to their operation
32 Material innovation fosters data Revolution Future systems require new materials for exciting innovations Material innovation powers society's continued digital transformation
33 Soitec
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