ICT Micro- and nanoelectronics technologies

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1 EPoSS Proposers' Day, 2 Feb 2017, Brussels ICT Micro- and nanoelectronics technologies Eric Fribourg-Blanc, Henri Rajbenbach, Andreas Lymberis European Commission DG CONNECT (Communications Networks, Content and Technology) Not legally binding presentation Not legally binding presentation EPoSS Proposers' Day 2-Feb Brussels

2 Technology context nm µm mm cm Nanoelectronics Smart System Integration "Conventional": CMOS, MOSFET Si-Ge, III-V compound SC Nanowires, CNT, Graphene "Non-Conventional": Spintronics Single e- trans 3-D transistor scale) Everything On-CMOS: Photonics, RF µ-fluidics µ-bio-sensors µ-mechanics - MEMS µ- batteries : µ-harvesters µ- Antenna Next Generation Objects The "T" of IoT Autonomous smart object Plastic and wearable electronics - TOLAE "Hybrid": Si chips mounted on flexible substrates "Monolithic": thin film transistors, thin film / large area sensors /labels

3 Micro-nanoelectronics What has been funded so far key figures Number of projects 9 years of funding Programmes FP7 and H2020 (2 years), including ENIAC and ECSEL Joint Undertakings 7 areas of funding covering the full spectrum of electronic component FP7 ENIAC H2020 ECSEL technologies projects About 2100 participations Total costs: 3.6 B EU contribution: 880 M

4 Participation in Countries

5 Success stories / running projects

6 FP7 Success Story - MSP 3D-integrated Multi-Sensor system for Smart Building Management Project duration: 01/09/ /02/2017 Partners: MCL, AMS, APPS, BOS, UOXF, CCS, EVG, FHG, IMEC, ALU-FR, SIEMENS, UCAM, UCL, UNIBS, UWAR, VITO, SAM EU Funding: Flexible 'plug and play' 3-D integration of devices and sensors on CMOS electronic platform chips Achievements: Gas sensors based on nanomaterials Particle sensor Ultraviolet sensor Infrared sensor Visible light sensor Worldwide unique 8 X micro-hotplate array chip with Through- Silicon-Via technology!

7 Neuromorphic computing NeuRAM3 (started 1-Jan-2016) Neuromorphic chip 28nm FDSOI with RRAM synapses Ultra low power Scalable - reconfigurable architecture 50x lower dissipation than digital equivalent TFT based scalable multichip architecture platform Machine learning algorithms Spike-based learning mechanisms ICT-31 Info Day 2-Dec Brussels HR/FI

8 H2020 TOLAE project: PING Printed Intelligent NFC Game cards and packaging Embed thin film based RFID technology in printed objects making it possible to interact with them through standard NFC and RFID reading devices without altering the feeling of the object 3 years, 3.3 M funding

9 ICT Micro- and nanoelectronics technologies 2. Presentation of the call European Commission DG CONNECT (Communications Networks, Content and Technology) ICT-31 EPoSS Proposers' Day 2-Feb Brussels

10 Outline Introduction Technology Context ICT-31 - Technology coverage and expected impacts Research and Innovation Actions (RIA) Innovation actions (IA) Coordination and Support Actions (CSA) Budget what is reasonable to request

11 ICT-31 Positioning Objective: Generic Technology Development Shrinking of horizontal and vertical physical feature sizes Focus: Exploratory research Differentiating factors for the Industry

12 ICT-31 Overview RIA Research and Innovation Scale the functional performance System solutions Increase functionalities and capabilities IA Innovation actions Equipment Assessment Experiments CSA Coordination and Support Actions Sustainable Pan-European event Promoting careers in micro/nanoelectronics Showcase in hardware technologies 19 M - 100% funding 3 M - 70% funding 1 M - 100% funding

13 ICT-31 RIA Scope (1/2) 1. Scale the functional performance New approaches Information processing Storage Focus Ultra-low power High performance Work on: Materials Processes Device / component architectures System micro-architectures (processors / memory) Security Design Modelling Simulation Nano-characterization Technologies exploiting quantum effects To be considered Integration Systemability Manufacturability

14 ICT-31 RIA Scope (2/2) 2. System solutions increase functionalities and capabilities 3D sequential integration transistor scale) + 3D parallel integration (@ circuit level) Work on: Interconnects (intra-layer and vertical structures) Design 3D design kits and tools Power model Optimisation Prototyping Test methods

15 ICT-31 RIA TRL? TRLs 2-3 Activities of direct industrial relevance Medium time to market (Complementing "Industry-driven" activities in ECSEL)

16 ICT-31 International Cooperation Third countries adding value to the consortium are encouraged In particular from countries with well-established nanoelectronics research and industry: Taiwan, USA Japan, South Korea Project twinning Project clustering

17 ICT-31 RIA Expected Impact Contribute to the growth of micro- nanoelectronics and related industries Doubling the economic value of electronic components production in Europe (10 years) See*: Electronics leader Group Strategic roadmap Implementation plan Realistic Roadmap towards higher TRLs beyond project timeframe Concrete business perspectives - Expected markets (for industrial partners) - Impact on society *

18 ICT-31 IA - Objective & activities Equipment Assessment Experiments Who? Suppliers (innovative high-tech equipment) End-user What? Prototype Install Assess Validate TRL? 6-7 ICT-31 Info Day 2-Dec Brussels HR/FI

19 ICT-31 IA Expected Impact Demonstrate the route Assessment First use Demonstrate improvement to existing equipment Capability Precision Efficiency New avenues for deployment

20 ICT-31 CSA Scope and expected impact Pan-European event Promoting careers in micro/nanoelectronics Showcase the possibilities offered by hardware technologies Sustainable event Expected Impact Raise awareness of young people More students in micro-nanoelectronics Reach out to 1000s students

21 ICT-31 What to request? Expected per project Research & Innovation Actions (19 M budget) 2-4 M Innovation Actions (3 M budget) 1-2 M Coordination and Support Actions (1 M budget) ~ 0.5 M

22 What's next? proposed topics (draft) Unconventional Nanoelectronics exploring the development of promising beyond-cmos devices, developing low power computing solutions, pushing the miniaturisation of the millimetre-wave technologies Supporting the increasing system integration Electronic Smart Systems Technological breakthroughs towards miniaturisation, functionalities, power consumption, autonomy, reliability & secure operation Advances in Bioelectronics Smart Systems Prototypes validated in relevant environments. Large Area Electronics advancing technology and manufacturing readiness level, enhancing manufacturability and integration of technologies Demonstrating (laboratory or real environment) LAE-enabled prototypes in selected applications of flexible and wearable electronics.

23 Thank you for your attention Digital Agenda for Europe Components and Systems: DG CONNECT (Communications Networks, Content and Technology): Horizon 2020 on the web:

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