Wednesday, Feb 27, :45 PM / High Speed quad SPST CMOS analog switch ADG201HS
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1 Wednesday, Feb 27, :45 PM / High Speed quad SPST CMOS analog switch ADG201HS 1.0 SCOPE This specification documents the detail requirements for space qualified product manufactured on Analog Devices, Inc.'s QML certified line per MIL-PRF Level V except as modified herein. The manufacturing flow described in the STANDARD SPACE LEVEL PRODUCTS PROGRAM brochure is to be considered a part of this specification. This data sheet specifically details the space grade version of this product. A more detailed operational description and a complete data sheet for commercial product grades can be found at Part Number. The complete part number(s) of this specification follow: Part Number Description ADG Q High speed quad SPST CMOS analog switch 2.1 Case Outline. Letter Descriptive designator Case Outline (Lead Finish per MIL-PRF-38535) Q GDIP1-T16 16-Lead ceramic dual-in-line package (CERDIP) Figure 1 - Terminal connections. ASD Rev. E Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA , U.S.A. Tel: Fax: Analog Devices, Inc. All rights reserved.
2 3.0 Absolute Maximum Ratings. 1/ (T A = 25 C, unless otherwise noted) V DD to V SS...44V V DD to GND V, 25V V SS to GND 2/ V, -25V Analog Inputs 3/ Voltage at S, D...V SS -2V to V DD +2V or 20mA, whichever comes first Current at S, D...20mA Continuous Current, S or D...20mA Pulsed Current, S or D (1mS Duration, 10% duty cycle)...70ma Digital Inputs 3/ Voltage at IN, WR...V SS - 4V to V DD +4V or 20mA, whichever comes first Current at IN...20mA Power dissipation...470mw Storage Temperature Range C to +150 C Lead Temperature (Soldering, 10 sec.) C Notes: 1/ Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2/ If V SS is open circuited with V DD and GND applied, the V SS pin will be pulled positive, exceeding the Absolute Maximum Ratings. If this possibility exists, a Schottky diode from V SS to GND (cathode end to GND) ensures that the Absolute Maximum Ratings will be observed. 3/ Overvoltage at IN, S, or D will be clamped by diodes. Current should be limited to 20mA (see above). 3.1 Thermal Characteristics: Thermal Resistance, cerdip (Q) Package Junction-to-Case (Θ JC ) = 35 C/W Max Junction-to-Ambient (Θ JA ) = 120 C/W Max ASD Rev. E Page 2 of 5
3 4.0 Electrical Table: See notes at end of table ADG201HS Table I Parameter Symbol Conditions 1/ Sub- Limit 2/ Units group Min Max Analog Signal range V S 3/ 4 ±15 V On resistance R DS(ON) V S = ±10V, I D =1mA, V IN = 0.8V 1 50 Ohm 2, 3 75 Source OFF leakage current I S(OFF) V D =±14V, V S =±14V, V IN =2.4V 1 ±1.0 na Drain OFF leakage current I D(OFF) V D =±14V, V S =±14V, V IN =2.4V 1 ±1.0 Channel ON leakage current I D(ON) V D = V S = ±14V, V IN = 0.8V 1 ±1.0 Low level input voltage 4/ V IL 7, V High level input voltage 4/ V IH 7, Input leakage current (low) I IL V IN under test = 1.0V, All other 1, 2, 3 ±1.0 μa V IN = 16.5V Input leakage current (high) I IH V IN under test = 16.5V, All other 1, 2, 3 ±1.0 V IN = 1.0V, V S = ±17V Positive supply current I+ V IN =3.0V or 0.8V for all 1, 2, 3 10 ma switches Negative supply current I- V IN =2.4V or 0.8V for all 1, 2, 3-6 switches Switch on time t ON R L = 1KΩ, C L =35pF, V IH =+3V, 9 50 ns V IL =0V, V S = ±10V see figure 3 10, Switch off time t OFF R L = 1KΩ, C L =35pF, V IH =+3V, 9 50 V IL =0V, V S = ±10V see figure 3 10, TABLE I NOTES: 1/ V+ = +15V, V- = -15V, unless otherwise specified 2/ The limiting terms "min" (minimum) and "max" (maximum) shall be considered to apply to magnitudes only. Negative current shall be defined as conventional current flow out of a device terminal. 3/ These parameters may not be tested, but shall be guaranteed to the limits specified in table I herein. 4/ Test not required if applied as a forcing function. NOTE: Rise time and fall time 20 ns. FIGURE 3. Test circuit and switching waveforms. ASD Rev. E Page 3 of 5
4 4.1 Electrical Test Requirements: Table II Test Requirements Subgroups (in accordance with MIL-PRF-38535, Table III) Interim Electrical Parameters 1 Final Electrical Parameters 1, 2, 3, 4, 7, 8 1/ 2/ Group A Test Requirements 1, 2, 3, 4, 7, 8, 9, 10, 11 Group C end-point electrical parameters 1, 7 2/ Group D end-point electrical parameters 1, 7 Group E end-point electrical parameters na 1/ PDA applies to subgroup 1. Exclude Deltas from PDA. 2/ See Table III for delta measure parameters and limits. 4.2 Table III. Burn-in test delta limits. Table III TEST BURN-IN LIFE TEST DELTA TITLE LIMIT LIMIT LIMIT UNITS R DS(ON) ±15 Ω I D(OFF) ±1 ±2 ±1 na I S(ON) + I D(ON) ±1 ±2 ±1 na 5.0 Life Test/Burn-In: 5.1 HTRB is not applicable for this drawing. 5.2 Burn-in is per MIL-STD-883 Method 1015 test condition B or C. 5.3 Steady state life test is per MIL-STD-883 Method MIL-STD QMLV exceptions: 6.1 Full WLA per MIL-STD-883 TM 5007 is not available for this product fabricated in a QMLQ wafer process facility. SEM Inspection only is available per MIL-STD-883, TM2018. ASD Rev. E Page 4 of 5
5 Rev Description of Change Date A Initiate July 30, 2001 B Update web address Feb. 18, 2002 C Update web address June 20, 2003 D Clarify SEM vs. WLA availability for QMLQ fab process Nov. 8, 2007 E Update header/footer & add to 1.0 Scope description. Feb. 26, Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective companies. Printed in the U.S.A. 02/08 ASD Rev. E Page 5 of 5
2.0 Part Number. The complete part numbers per Table I of this specification follow:
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9-362; Rev 3; 6/7 Quad, SPST Analog Switch General Description The quad analog switch features on-resistance matching (4Ω max) between switches and guarantees on-resistance flatness over the signal range
Logic Controlled, High-Side Power Switch with Reverse Current Blocking ADP195
Data Sheet Logic Controlled, High-Side Power Switch with Reverse Current Blocking ADP95 FEATURES Ultralow on resistance (RDSON) 5 mω @.6 V 55 mω @.5 V 65 mω @.8 V mω @. V Input voltage range:. V to.6 V.
High Isolation, Silicon SPDT, Nonreflective Switch, 0.1 GHz to 6.0 GHz HMC8038W
5 6 7 8 6 5 4 3 FEATURES Nonreflective, 50 Ω design High isolation: 60 db typical Low insertion loss: 0.8 db typical High power handling 34 dbm through path 29 dbm terminated path High linearity P0.dB:
Matched Monolithic Quad Transistor MAT14
Matched Monolithic Quad Transistor MAT4 FEATUES Low offset voltage: 400 µv maximum High current gain: 300 minimum Excellent current gain match: 4% maximum Low voltage noise density at 00 Hz, ma 3 nv/ Hz
REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B OF SHEETS SHEET
REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. LTG Correct
REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED. A Changes in accordance with NOR 5962-R M. A. FRYE
REVISIONS LTR DESRIPTION DATE (YR-MO-DA) APPROVED A hanges in accordance with NOR 5962-R177-96. 96-07-10 M. A. FRYE B Drawing updated to reflect current requirements. Redrawn. - ro 05-05-02 R. MONNIN Update
Precision Monolithic Quad SPST CMOS Analog Switches
Precision Monolithic Quad SPST CMOS Analog Switches DESCRIPTION The are ± 15 precision monolithic quad single-pole single-throw (SPST) CMOS analog switches. Built on a new CMOS process, the ishay Siliconix
P-Channel 20-V (D-S) MOSFET with Schottky Diode
P-Channel -V (D-S) MOSFET with Schottky Diode Si3853DV PRODUCT SUMMARY V DS (V) R DS(on) (Ω) I D (A). at V GS = -.5 V ±.8 -.3 at V GS = -.5 V ±.3 FEATURES Halogen-free According to IEC 9-- Definition LITTLE
Quad SPST CMOS Analog Switches
9-3960; Rev 3; 6/06 Quad SPST CMOS Analog Switches General Description The are normally open, quad singlepole single-throw (SPST) analog switches. These CMOS switches can be continuously operated with
Automotive Dual P-Channel 30 V (D-S) 175 C MOSFET
Automotive Dual P-Channel 3 V (D-S) 75 C MOSFET D 6 Marking Code: 9B TSOP-6 Dual D S 5 G Top View S 3 G FEATURES TrenchFET power MOSFET AEC-Q qualified % R g and UIS tested Material categorization: for
ICS OSCILLATOR, MULTIPLIER, AND BUFFER WITH 8 OUTPUTS. Description. Features (all) Features (specific) DATASHEET
DATASHEET ICS552-01 Description The ICS552-01 produces 8 low-skew copies of the multiple input clock or fundamental, parallel-mode crystal. Unlike other clock drivers, these parts do not require a separate
0.4 Ω CMOS, Dual DPDT Switch in WLCSP/LFCSP/TSSOP ADG888
FEATURES.8 V to 5.5 V operation Ultralow on resistance.4 Ω typical.6 Ω maximum at 5 V supply Excellent audio performance, ultralow distortion.7 Ω typical.4 Ω maximum RON flatness High current carrying
DATASHEET HI-1818A. Features. Applications. Ordering Information. Pinout. Low Resistance, Single 8-Channel, CMOS Analog Multiplexer
NOT RECOMMDED FOR NEW DESIGNS NO RECOMMDED REPLACEMT contact our Technical Support Center at 1-888-INTERSIL or www.intersil.com/tsc Low Resistance, Single 8-Channel, CMOS Analog Multiplexer DATASHEET FN3141
Improved Second Source to the EL2020 ADEL2020
Improved Second Source to the EL ADEL FEATURES Ideal for Video Applications.% Differential Gain. Differential Phase. db Bandwidth to 5 MHz (G = +) High Speed 9 MHz Bandwidth ( db) 5 V/ s Slew Rate ns Settling
Improved Quad CMOS Analog Switches
Improved Quad CMOS Analog Switches DESCRIPTION The analog switches are highly improved versions of the industry-standard DG2A, DG22. These devices are fabricated in proprietary silicon gate CMOS process,
Dual Processor Supervisors with Watchdog ADM13305
Dual Processor Supervisors with Watchdog ADM335 FEATURES Dual supervisory circuits Supply voltage range of 2.7 V to 5.5 V Pretrimmed threshold options:.8 V, 2.5 V, 3.3 V, and 5 V Adjustable.6 V voltage
3 V/5 V CMOS 0.5 Ω SPDT/2:1 Mux in SC70 ADG849
3 V/5 V CMOS.5 Ω SPT/2: Mux in SC7 AG849 FEATURES Ultralow on-resistance:.5 Ω typical.8 Ω maximum at 5 V supply Excellent audio performance, ultralow distortion:.3 Ω typical.24 Ω maximum RON flatness High
Dual Precision, Low Cost, High Speed BiFET Op Amp AD712-EP
Dual Precision, Low Cost, High Speed BiFET Op Amp FEATURES Supports defense and aerospace applications (AQEC standard) Military temperature range ( 55 C to +125 C) Controlled manufacturing baseline One
Ultralow Offset Voltage Dual Op Amp AD708
Ultralow Offset Voltage Dual Op Amp FEATURES Very high dc precision 30 μv maximum offset voltage 0.3 μv/ C maximum offset voltage drift 0.35 μv p-p maximum voltage noise (0. Hz to 0 Hz) 5 million V/V minimum
Ultraprecision, 36 V, 2.8 nv/ Hz Dual Rail-to-Rail Output Op Amp AD8676
FEATURES Very low voltage noise 2.8 nv/ Hz @ khz Rail-to-rail output swing Low input bias current: 2 na maximum Very low offset voltage: 2 μv typical Low input offset drift:.6 μv/ C maximum Very high gain:
Features. Applications
DATASHEET IDTHS221P10 Description The IDTHS221P10 is a high-performance hybrid switch device, combined with hybrid low distortion audio and USB 2.0 high speed data (480 Mbps) signal switches, and analog
Precision Quad SPDT Analog Switch
Precision Quad SPDT Analog Switch DESCRIPTION The consist of four independently controlled single-pole double-throw analog switches. These monolithic switch is designed to control analog signals with a
Triple Processor Supervisors ADM13307
Triple Processor Supervisors ADM337 FEATURES Triple supervisory circuits Supply voltage range of 2. V to 5.5 V Pretrimmed threshold options:.8 V, 2.5 V, 3.3 V, and 5 V Adjustable.6 V and.25 V voltage references