Microphotonics The Next Platform for the Information Age
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1 Microphotonics The Next Platform for the Information Age Lionel C. Kimerling MIT Microphotonics Center 2011 MIT in Japan Conference
2 MIT Microphotonics Center Review Communication Technology Roadmap technology trends and timelines Electronic-photonic convergence architectures for multicore processors Monolithic Glass-on-Silicon platform chem/bio sensors and imaging Solar Electricity High efficiency thin films 2
3 MIT Microphotonics Center Industry Consortium MIT Microphotonics Center Prof. Lionel Kimerling, Director Administration Ms. Mindy Baughman CTR Program Manager Microphotonics Industry Consortium Consortium Executive Committee Chair, Richard Grzybowski, Corning Communications Technology Roadmap Prof. Lionel Kimerling, Co-Director Prof. Randolph Kirchain, Co-Director CTR III Technology Working Groups Scaling Limits and Energy Short Reach Optical Interconnects Network Infrastructure Copper Interconnect Scalability Research and roadmap review meetings Roadmap electronic-photonic convergence Independent and collaborative R&D opportunities On-site / remote access to MIT seminars Poster session access to graduate students and post-docs 11 university affiliates: Carnegie-Mellon, Cornell, McMaster (Canada), U. Ghent (Belgium), U Tokyo (Japan), Boston U, Caltech, U Delaware, Lehigh, U Rochester, Stanford. 7 Roadmap Organizations: ITRS; inemi; OIDA; OITDA and AIST (Japan); MONA and MEMPHIS (Europe) Alcatel-Lucent Intel AMD Kotura Analog Devices National Semi APIC NEC Corning Optitec ETRI Siemens Fujitsu SOITEC HP XiO Photonics IBM MIT Materials Processing Center
4 The Evolution of the Roadmap CTR I ( ) Survival Electronic-Photonic Synergy - Integration - Standardization - Cross-market Platforms CTR II ( ) Performance Cost Power Efficiency Bandwidth Density CTR III Scalability Energy Infrastructure Copper Networks 4 MIT Materials Processing Center
5 Scaling Information Technology In the time that it takes you to read this sentence, today s fastest computer, operating at one PetaFLOPs (quadrillion operations per second), will have been able to transmit the text of every word spoken by every person on the planet from the beginning of time to the present. 5 Exabytes (billion gigabytes) to 2000AD Exabytes AD Exabytes/yr by
6 Scaling Information Technology By 2018 the energy utilized by IP traffic will exceed 10% of the total electrical power generation in developed countries. Pervasive parallelism creates bandwidth, connectivity and programming bottlenecks. A single optical fiber with multilevel quadrature and polarization modulation, can transport the entire 492 Exabytes of all human knowledge (2009) in two minutes. Scalability : Cost, Energy and Bandwidth Density
7 Cost, Energy, Bandwidth Density John Mayo (ATT-BL), 1989 Monolithic, chip-level photonic integration can reduce cost and power dissipation.
8 Electronic-Photonic CMOS output PD1 (L = 160 µm) CMOS FET-Photonic Integration Scenarios Si CMOS FEOL BEOL photon PD2 (L = 80 µm) SiGe <450 < * 900 SiGe Silicon is the only materials system capable of high density electronic-photonic integration.
9 Ge-on-Si for High Efficiency Photonic Devices Small Footprint Ge-on-Silicon Processing Ge SiO Ge Ge 50 nm Si Si SiO Si Two Step Ge-on-Si CVD RIE Patterned Ge Ge Damascene 1. <360 C amorphous Ge film C epitaxial Ge growth - Ge growth, blanket - Patterned Ge etch - Oxide Fill - CMP - Oxide deposition - Oxide trench etch - Ge Trench Fill - CMP Planarization
10 Waveguide Integrated Devices in CMOS λ n SiGe n+ contact p p+ Butt contacts coupler Vertical I/O couplers λ Waveguides & Vertical Coupler Ge growth, CMP & Top electrode Contacts & Interconnect α-silicon xtal-silicon CVD-SiO 2 vertical coupler butt coupler n+ region n+ region SiGe 0.6um SOI BOX λ in p+ region λ out p+ region Silicon Edge View Side View Edge View Everything improves with integration: speed, power efficiency and functionality.
11 The Optical Bus Architecture Op#cal Power Supply λ n λ 1, λ n op#cal power bus Filter Mod Filter data bus Ge-on-Si DH laser arrays PD On-Chip Wavelength Division Multiplexing: power; signal; point-to-point; broadcast
12 A Monolithic Ge-on-Si Laser by tensile strain and n-type doping Liu et al, Opt. Express. 15, (2007) Efficient light emission at nm: % tensile strain plus n-type doping to compensate energy difference between Γ and L valleys. Performance improves with increasing doping and temperature! 12
13 Ge performance potential Fabry Perot Laser Comparison Ge InGaAsP l x w x h 80 1x x200 (µm 2 )x(nm) J th (ka/cm 2 ) η d P o (I=50mA) 5.5 mw 9 mw Q e Γ FCA (cm -1 ) 340 ~10 α t,m (db/cm) 5 5 τ sp 3.3 ns 5 ns
14 Lasing: Ge-on-Si Waveguide Resonators 1.5ns, 1064nm Pump Spectra evolve from broad emission band to sharp F-P resonances with increasing pump level (inversion-induced transparency). Polarization evolves from mixed TE/TM to dominantly TE (TE:TM=10:1) Threshold also observed at ~5µJ/pulse (30 kw/cm 2 ). Liu et al, Opt. Lett. 35, 679 (2010) 14
15 Multicore Microprocessors Number of cores doubles every 18 months Parallelism has replaced clock frequency scaling Resulting Challenges MIT RAW Sun Ultrasparc T2 IBM XCell 8i Programming Power Performance Tilera TILE64
16 ATAC: All-to-All Computing communication-centric ATAC Architecture Neural Network ATAC reduces off-chip memory calls, and hence energy and latency. View of extended global memory can be enabled cheaply with on-chip distributed cache memory and ATAC optical network. Core can directly communicate with any other core. Broadcast requires just one send. No routing in communications network. Tile resources only used when performing communication (unlike mesh). A Agarwal, MIT
17 ATAC: All-to-All Computing Parallelism has replaced clock speed as the scaling paradigm. Programming Power Efficiency - Performance sending core multi-wavelength source waveguide modulator receiving core data waveguide flip-flop modulator driver filter transimpedance photodetector amplifier flip-flop Electronic-photonic CMOS Optical power and data buses Engineering parallelism is the most important frontier in information hardware.
18 Glass-on-Silicon monolithic, heterogeneous integration Chalcogenide Glasses Amorphous compounds of chalcogens (S, Se and Te) covalently bonded to other metal or non-metal elements (Ge, Ga, As, Sb etc.) Infrared transparency CMOS backend compatible Photo-trimmable
19 Application: Integrated Chem/Bio Sensors Optical resonators can enhance photon-matter interactions by orders of magnitude. Glass waveguides are backend CMOS compatible. Long optical path length Resonator Enhanced optical field Light
20 Optical resonators are extremely sensitive to complex refractive index variations Complex refractive index variations Change of the index of refraction creates a resonant wavelength shift Index of refraction Absorption coefficient Introduction of optical absorption leads to extinction ratio decrease Information regarding index of refraction and absorption change can be simultaneously extracted High-Q resonance leads to high detection sensitivity 20
21 Photonic-microfluidic integration Optofluidic integration enables: Minimal sample amount requirement: < 0.1 µl Integration of multiple functionalities on a single chip: analyte sampling, separation, purification 21
22 The optofluidic resonator features a 3-fold sensitivity improvement over a straight waveguide device, and the physical length is reduced 40x Ge-Sb-S waveguide sensor Detection limit: 0.02 cm -1 Corresponding to ppm level sensitivity Optofluidic Ge-Sb-S resonator 40x smaller: significantly cheaper and 3x more sensitive! 2 cm Fabrication Cavity-enhanced and testing infrared of planar absorption chalcogenide in planar waveguide chalcogenide integrated glass resonators: microfluidic experiment sensor, Opt. & analysis, Express J Hu, et al, IEEE 15, J Lightwave (2007). Technology, 2010
23 MIDAS: Multispectral IR Detector Arrays QE: SWIR 87% MWIR 82% Spectral cross talk 0.1% Optimize: apodized cavity J. Wang, J. Hu, X. Sun, A. Agarwal, and L.C. Kimerling, Phase-tuned Propagation : theory and design," Optics Letters, vol. 35, 2010, pp
24 Visible Pixel Fabrication PECVD deposition Etch to expose a-si layer 1 Etch to expose a-si layer 2 layer 2 contact Sputter metal contact Etch oxide windows layer 1 contact Pixel layer 1 contact layer 2 contact MIT Materials Processing Center
25 Visible Pixel Detectivity Measurement Detectivity (D*) Johnson noise suppressed Shot noise suppressed Detectivities cmhz 1/2 W -1 at ~640 nm cmhz 1/2 W -1 at ~740 nm Responsivity 2*10-2 A/W High detectivity due to low dark noise (~0.5 pa) MIT Materials Processing Center
26 Microphotonics: Solar Cells Cell Efficiency (%) PX back-reflector design t= 2 um REF DBR GRT TPC FOM = η/$ W a v e l e n g t h ( n m ) Goal: low cost with high efficiency photonic crystal back-reflector for extended light path thin film silicon technology that scales in design and fabrication. low cost production using existing standard tools with wide material property tolerance J. Michel EQE prototype performance t = 5 µm TPC-2 DBR TPC-1 R E F
27 Self-assembled, 2D Grating anodic aluminum oxide (AAO) near-hexagonal porous structure electrochemical process (self assembly) controllable size (pore size, period, thickness ) H. Masuda, et al, Jpn. J. Appl. Phys. 37, L1340 (1998) S.Z. Chu, et al, J. Electrochem. Soc. 153, B384 (2006) 27
28 Self-Assembly Process (a) aluminum (b) alumina aluminum AAO mask Pseudo-periodic 2D Si grating (c) alumina (d) alumina cell (e) Si pattern cell 28 (f) DBR Si pattern cell
29 Photons (10 20 /m 2 s) J SC (A/m 2 ) Flat reflector Perfectly Periodic Pseudoperiodic 6.9 ( by 50%) 7.2 ( by 57%) 188 ( by 25%) 194 ( by 28%)
30 EQE measurement DBR grating DBR reference DBR only GRT+DBR 30
31 Ge-based thin-film Thermophotovoltaics (TPV) cells with photon recirculation Thermophotovoltaics (TPV) Direct conversion of heat radiation from local hot object to electrical power via photons Working T range: 1500K~2000K Peak emission range: 1.5µm-1.9µm (0.65 ev to 0.83eV) Applications Waste heat recovery Remote site power generation Heat/electrical cogeneration 31
32 Germanium Thermophotovoltaic Cell (TPV) structure and material Major components Emitter Filter TPV cell III-V materials TPV cells High cost Ge-on-Si TPV cells Narrow bandgap Low substrate cost CMOS compatible process Integrated Bragg reflector
33 Summary of Ge TPV performance Leakage current reduction of Ge-on-Si TPV devices Optical filter monolithically integrated with TPV devices First prototype of TPV integrated with optical filter efficiency ~ 5.3 % for blackbody radiation at 2000K optimized filter design should yield 19.5% efficiency Measured performance for different TPV cells under solar spectrum Device type Power Voc (mv) Isc (ma/cm 2 ) FF Efficiency Ge substrate* 0.1 W/cm % 5.34% Ge-on-Si (a-si) 0.08W/cm % 0.5% Ge-on-Si (Stack) 7.5W/cm % 5.3% * 33
34 High speed large area photodetector Measured performance of different large area photodetector Material λ (nm) 3dB bandwidth Photodiode diameter Operating Bias Si (p-i-n)* GHz 300 (µm) 12V GaAs (MSM)** 850 2GHz 300 (µm) 5V Ge (MphC) 850 6GHz 100 (µm) 8V Ge (MphC) GHz 200 (µm) 8V * R. Swoboda, Electronics letters, V40, N8 ** M. Lang, Electronics letters, V370, N20 Demonstrated 6GHz bandwidth for 100 µm diameter, λ = 850nm Simulation demonstrates capability of 9GHz for 100 µm, 3.6GHz for 200 µm, 2.25GHz for 300 um diameter device Narrow metallization on Ge solved by using Ti/TiN diffusion barrier 34
35 CTR III: Scaling Limits and Energy Released June 2010 What has happened: parallelism Smart interconnection that configures and optimizes data rate, point to point and broadcast communication, routing wire delay, contention, wire energy New architectures and standards shift from hierarchical electronic to agile optical solutions Electronic-Photonic Synergy Mid-board transceivers dramatically improve performance/cost Server optical interconnect performance targets for mW/Gbps; 200Gbps/cm 2 ; $1/Gbps; and 10 7 optical interconnects/ machine; optical cables for L> 50mm. Migration from maximum-size to density scaling MIT Materials Processing Center 35
36 Briefing to the IT Executive Technology Scaling capacity, parallelism and power efficiency Economics low cost by integration, standardization and volume Politics Coordination of technology with regulation Social Factors Embedded competence, backwards compatibility Bandwidth bottlenecks define the technology supply chain value points. 36
37 Thank You!
38 Appendix: Key Points CTR II Business Environment Silicon Microphotonics Interconnection and Packaging 38
39 CTR II: Business Environment The O-E-O interface is the critical focal point for solutions to communication cost. The single channel data rate will likely standardize at 10 to 25Gbps due to EMI and density/complexity limits of electronics. Optical interconnects will be multimode in the near term and will migrate to a single mode, WDM standard in the long term (~2016). The defining attributes for markets will be COST, system density, power consumption, cable management, EMI shielding, heat management. Technical and reliability issues have been well demonstrated in telecom applications. 39
40 CTRII: Silicon Microphotonics The transceiver is the near term driver for silicon microphotonics. The relevant attributes of a transceiver are aggregate data rate, power consumption, size, and cost. Silicon is the only material platform capable of supporting a standard cross-market, high-volume transceiver in the long term. An independent optical power supply will be the dominant architecture in the near term. Architectural changes in interconnection that increase network dimensionality will trigger disruptive change in processor technology
41 CTR II: Interconnection and Packaging Optical pins will be needed within the next decade to address EMI and pin count issues. Packaging cost must decrease as it supports an exponential increase in off-chip bandwidth with time. WDM will be necessary to meet off-chip bandwidth needs by 2020, single-mode, long wavelength ( nm) will be the standard. The BGA platform must be viable for both electronics and photonics. For large volume commercial applications, transceiver chips will stand alone from signal processing chips during the next decade; and they will become monolithically integrated thereafter for chip-to-chip. 41
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