CMOS COMPATIBLE MEMS STRUCTURES FOR PRESSURE SENSING APPLICATIONS PRADEEP KUMAR RATHORE

Transcription

1 CMOS COMPATIBLE MEMS STRUCTURES FOR PRESSURE SENSING APPLICATIONS PRADEEP KUMAR RATHORE CENTRE FOR APPLIED RESEARCH IN ELECTRONICS INDIAN INSTITUTE OF TECHNOLOGY DELHI JULY 2015

2 Indian Institute of Technology Delhi (IITD), New Delhi, 2015

3 CMOS COMPATIBLE MEMS STRUCTURES FOR PRESSURE SENSING APPLICATIONS by PRADEEP KUMAR RATHORE CENTRE FOR APPLIED RESEARCH IN ELECTRONICS Submitted in fulfillment of the requirements of the degree of Doctor of Philosophy to the INDIAN INSTITUTE OF TECHNOLOGY DELHI JULY 2015

4 Certificate This is to certify that the thesis entitled, CMOS compatible MEMS structures for pressure sensing applications, being submitted by Mr. Pradeep Kumar Rathore for the award of the degree of Doctor of Philosophy to the Indian Institute of Technology Delhi, New Delhi, is a record of bonafide research work carried out by him under my guidance and supervision. This thesis to the best of our knowledge does not contain any results which have been submitted in part or full for a degree or diploma at any other University or Institute. Prof. B.S. Panwar Centre for Applied Research in Electronics Indian Institute of Technology Delhi Hauz Khas, New Delhi , India iii

5 Acknowledgements First of all I would like to cordially acknowledge my thesis supervisor Prof. B.S. Panwar from the Centre of Applied Research in Electronics (CARE), Indian Institute of Technology Delhi for giving me an opportunity to work as a full-time Ph.D. student under his guidance. I wish to extend my immense gratitude to him for his assistance and constant support throughout the course of this work. I would like to thank my student research committee (SRC) members Prof. R. Bahl, Prof. S.D. Joshi and Prof. S. Chandra for their helpful suggestions related to this work. I am very grateful to Dr. Chandra Shekhar, Director, Central Electronics Engineering and Research Institute (CEERI) for allowing us to use their device fabrication facilities for carrying out the experimental part of the thesis work. I thank Dr. Jamil Akhtar and all the members of Sensors and Nanotechnology Group at CEERI for their constant support in the fabrication processes. I would like to thank the Department of Science and Technology, India and IEEE Control System Society for providing me partial financial support for attending 2012 International Conference on Biomaterials and Bioengineering, and 2013 IEEE Multi- Conference on Systems and Control, respectively. I would also pay my heartiest thanks to Prof. M.C. Mahato from North Eastern Hill University for his moral support and encouragement though out the course of my thesis work. It is also a pleasure to express my thanks to my colleagues Dr. Uday Dadwal, Dr. P. Rangababu and Dr. C. Ramarao for their kind cooperation in various matters. I would also like to thank Mr. Gyanendra Singh, Mr. Bhagaban Behera, and Mr. Vishal Gupta for v

6 their encouragement and support at different levels of my work. I would also like to thank Miss Priyanka for being a constant source of encouragement. A special thanks to my friends Sudhakar, Komal, Rajeev, Dhyani, Piyush, Madhusudan, Ram, Devendra, Gagan, Satyam and Manoj without whom the stay at IIT would have not been pleasant and joyful. I would also want to express my utmost gratitude to mess staff for their care and extra pain to prepare my food during the bad times of my health. Finally, I am obliged to my parents, Mr. Anil Kumar Rathore and Mrs. Rammurti Devi Rathore, and my brothers Sudeep, Puneet and Rajat, whose constant support, encouragement and love enabled me to complete this work. Pradeep Kumar Rathore vi

7 Abstract It has long been felt a need for a suitable complete system on a chip (SoC) that will be used as a convenient intelligent pressure sensor for various purposes. The present thesis is motivated by a desire to fulfil the need of overcoming various difficulties and challenges. MEMS structures with CMOS circuitry on a single silicon chip have the potential to achieve the expected goal. In this thesis, we move in small steps towards the final goal of fabrication of a novel NMOS-MEMS integrated current mirror sensing MOSFET embedded pressure sensor. This thesis, as a first exercise, describes the design, simulation and fabrication of a newly developed double cavity vacuum sealed piezoresistive pressure sensor. This sensor was fabricated using front-side lateral etching technique in which two microcavities were formed under the pressure sensing diaphragms by etching silicon from the front side of the wafer. This front-side etching process is compatible with the CMOS processes which are performed on the front side of the wafer for the development of integrated circuits. The sensor s electrical readout circuitry consists of boron diffused polysilicon resistors arranged in the half Wheatstone bridge configuration. The average measured pressure sensitivity of the tested pressure sensor is found to be approximately 12.5 mv/mpa. The sensing structure is simulated and optimized using COMSOL Multiphysics. A good agreement with the fabricated device for the chosen location of the piezoresistors through simulation has been predicted. The sensitivity of the optimized pressure sensing structure was found to be 92 mv/mpa. The experience gained in this exercise sets the stage for the design and analysis of current mirror sensing based MOSFET embedded pressure sensor. vii

8 This study then conceptualizes a novel NMOS-MEMS integrated current mirror sensing based MOSFET embedded pressure sensor using the piezoresistive effect in MOSFET. Based on this concept of current mirror pressure sensing circuitry, eight different NMOS- MEMS integrated pressure sensing structures consisting of square, rectangular and ring channel shaped MOSFET embedded on silicon diaphragm and bridge structures are designed using standard 5 µm CMOS technology. COMSOL Multiphysics and Tanner s TSpice simulators are used for simulating the structural and electrical behavior of the integrated sensor. The simulation results show that the best sensitivities obtained for the NMOS-MEMS integrated sensor with diaphragm and bridge structures are found to be approx. 782 and 1614 mv/mpa, respectively. The results of this study indicate that improvements in the MOSFET embedded sensing structure can enhance the sensitivity of the integrated pressure sensor. One of the eight NMOS-MEMS integrated pressure sensing structures is chosen for fabrication for the proof of concept. The process flow and the mask layout for the fabrication of the proposed sensor are designed based on the aluminium gate MOS process on silicon-on-insulator (SOI) wafers. Silvaco TCAD software has been used for the extraction of process parameters that are required for the fabrication of n-channel MOS transistor. In addition, individual processes for making NMOS have also been carried out on normal silicon wafers. However, we have deferred the actual fabrication of proposed device due to the unavailability of needed materials and device fabrication facilities at our disposal in the departmental laboratory. In summary, the results of the comparative study indicate that the proposed current mirror pressure sensing circuit can be an alternative to the traditional Wheatstone bridge circuit for the development of microsensors. viii

9 Table of Contents Certificate Acknowledgements Abstract Table of contents List of figures List of tables List of symbols and abbreviations iii v vii ix xv xxvii xxxi Chapter 1 Introduction Overview Motivation Objectives of the thesis Thesis outline References 11 2 Design principles and analysis of piezoresistive pressure sensor Introduction Review of basic mechanics 18 ix

10 2.2.1 Elastic property Stress Strain Hooke s law Poisson s ratio Static bending of thin plates under externally applied pressure Piezoresistance effect Piezoresistivity in silicon Piezoresistivity in metal oxide semiconductor field effect 29 transistors (MOSFETs) 2.5 Summary References 31 3 Double cavity vacuum sealed piezoresistive pressure sensor using 35 Wheatstone bridge sensing circuit 3.1 Introduction Double cavity vacuum sealed piezoresistive absolute pressure sensor Sensor working principle and theoretical model Mechanical sensing structure: Rectangular diaphragm Electrical transduction mechanism: Piezoresistivity Pressure sensing readout circuitry: Half Wheatstone bridge Fabrication and testing of double cavity vacuum sealed piezoresistive 40 pressure sensor x

11 3.5 Finite element method simulations of double cavity pressure sensor Results and discussion Summary References 58 4 NMOS-MEMS integrated current mirror sensing based MOSFET 61 embedded pressure sensor 4.1 Introduction Basics of n-channel enhancement-type MOSFET (NMOS) Physical structure of NMOS Basic operation of NMOS Output current-voltage characteristics of NMOS Basics of MOSFET current mirror circuit Schematic structure of a basic MOSFET current mirror circuit Output current-voltage characteristics of current mirror circuit NMOS-MEMS integrated current mirror sensing based MOSFET 68 embedded pressure sensor 4.5 Sensor working principle and theoretical model Mechanical sensing structure: Diaphragm and bridge 70 structures Electrical sensing: Piezoresistive effect in n-channel 70 MOSFET Pressure sensing circuit: Resistive loaded NMOS based 72 xi

12 current mirror circuit 4.6 NMOS-MEMS integrated current mirror sensing based pressure 74 sensor: Simulation procedure 4.7 Determining appropriate thickness of n-channel MOSFET equivalent 76 piezoresistor 4.8 NMOS-MEMS integrated current mirror sensing based MOSFET 80 embedded pressure sensing structures and their simulations Structure I: Square shaped n-channel MOSFET embedded on 80 a square shaped silicon diaphragm Structure II: Rectangular shaped n-channel MOSFETs 87 embedded on a square shaped silicon diaphragms Structure III: Rectangular shaped n-channel MOSFETs 96 embedded on a single square shaped silicon diaphragm Structure IV: Square ring channel shaped MOSFET 101 embedded on a square shaped silicon diaphragm Structure V: Circular ring channel shaped MOSFET 106 embedded on a circular shaped silicon diaphragm Structure VI: Square shaped n-channel MOSFET embedded 111 on a square shaped silicon bridge Structure VII: Rectangular shaped n-channel MOSFETs 115 embedded on a square shaped silicon bridges Structure VIII: Rectangular shaped n-channel MOSFETs 119 embedded on a single square shaped silicon bridge xii

13 4.9 Comparison of current mirror pressure sensing circuit with traditional 124 Wheatstone bridge circuit 4.10 Linearity error in the deflection and output voltage of various NMOS- 126 MEMS integrated current mirror sensing based pressure sensors 4.11 Summary References Processs flow, mask layout and characterization of NMOS-MEMS 133 integrated pressure sensor 5.1 Introduction Process flow for the fabrication of NMOS-MEMS integrated current 134 mirror sensing based MOSFET embedded pressure sensor 5.3 Mask layout for the fabrication of proposed pressure sensor Fabrication and characterization of aluminum gate n-channel 141 MOSFET using Silvaco TCAD software 5.5 Choice of wafers and individual processes performed Choice of wafers: Silicon and silicon-on-insulator (SOI) 144 wafers Chemical cleaning of silicon wafers Thermal oxidation for growing thick field oxide and thin gate 146 oxide layers Phosphorus doping using thermal diffusion process Aluminium deposition and etching 149 xiii

14 5.5.6 Photolithography Fabrication and testing of aluminum gate metal-oxide-semiconductor 151 (MOS) capacitor 5.7 Mismatch effects in the circuit elements of the current mirror pressure 153 sensing circuit 5.8 Effect of variations in the supply voltage and operating temperature on 159 the current mirror transistors 5.9 Summary References Conclusion and future outlook 165 List of publications 169 Biographical sketch 171 xiv

15 List of figures Figure no. Figure caption Page no. Figure 2.1 Block diagram of pressure sensor describing its working principle. 17 Figure 2.2 Figure 2.3 Figure 2.4 Figure 3.1 Figure 3.2 Figure 3.3 Various stress components acting on a differential volume of a solid body that is subjected to a set of external forces P1, P2, R1 and R2. Bending of a rectangular plate under uniformly distributed applied pressure. Piezoresistors integrated in pressure sensing diaphragm and used as strain gauge for measuring the diaphragm deflection under applied pressure load. Schematic structure of double cavity vacuum sealed piezoresistive pressure sensor. Layout of the double cavity vacuum sealed piezoresistive pressure sensor with piezoresistors arranged in Wheatstone half bridge configuration. Complete process flow for the fabrication of the double cavity vacuum sealed piezoresistive pressure sensor, (a) chemically cleaned (100) silicon wafer, (b) thermal oxidation of SiO 2, (c) LPCVD of Si 3 N 4, (d) photolithography-i (PLG-I) and reactive ion etching (RIE) of Si 3 N 4 and SiO 2, (e) LPCVD of polysilicon, (f) xv

16 Figure 3.4 Figure 3.5 Figure 3.6 PLG-II and RIE of polysilicon, (g) PECVD of Si 3 N 4 -SiO 2 -Si 3 N 4, (h) PLG-III and RIE of Si 3 N 4 -SiO 2 -Si 3 N 4 for side channels, (i) KOH anisotropic etching, (j) PECVD of SiO 2 for sealing the channels, (k) LPCVD of polysilicon and boron doping, (l) PLG-IV and wet etching of polysilicon and SiO 2 for grid formation, (m) PLG-V and wet etching of polysilicon for resistors, (n) metallization of titanium and gold (Ti-Au), and (o) PLG-VI and wet etching of Au-Ti for connecting lines and pads. Photographs of the processed wafer after each photolithography step (a) PLG-I: µm window opening, (b) PLG-II: µm polysilicon sacrificial layer, (c) PLG-III: µm etch hole/channel opening, (d) PLG-IV: 50 µm wide grid formation, (e) PLG-V: 60 5 µm polysilicon resistor formation, (f) PLG-VI: µm contact pads and 10 µm wide contact lines. Photographs of a processed wafer showing (a) to (f) the etching profile of Si (100) in KOH solution after 15, 30, 45, 60 and 75 minutes of exposure for the formation of double cavities. (g) Bright field image and (h) dark field image of processed wafer showing the rectangular diaphragm, polysilicon resistors and the rectangular cavity or V-groove under the broken diaphragm. Photograph of (a) manually diced sensor chip mounted bonded on TO8 header, (b) magnified image of 1 1 mm pressure sensor chip, and (c) magnified image of a pressure sensing structure xvi

17 Figure 3.7 Figure 3.8 Figure 3.9 Figure 3.10 consisting of two diaphragms and four resistors arranged in Wheatstone half bridge configuration. Output voltage vs. input applied pressure for two different pressure sensors. Screenshots of the FEM simulated structure (a) Pressure sensing diaphragm before meshing, (b) Pressure sensing diaphragm after meshing, (c) Deflection profile, and (d) Distribution of x-direction normal stress component developed in the diaphragm under an applied pressure of 500 KPa. Screenshots of the FEM simulated structure (a) Deflection profile of the diaphragm with polysilicon piezoresistor integrated on its surface under applied pressure, (b) Enlarged view of the deformed polysilicon piezoresistor under applied pressure, (c) Electric conductivity profile of the polysilicon piezoresistor under (c) zero applied pressure, and (d) 500 KPa of applied pressure. (a) Plot of maximum deflection as a function of applied pressure, (b) Plot of maximum Von-misses stress as a function of applied pressure, (c) Plot resistance as function of applied pressure, and (d) Plot of output voltage as a function of applied pressure. The pressure sensing diaphragm has a polysilicon piezoresistor placed at a distance of 5 µm from the fixed edge on the surface of the diaphragm Figure 3.11 Simulation results of normal stress components (T xx and T yy ) at the 54 xvii

18 Figure 3.12 Figure 3.13 Figure 4.1 Figure 4.2 Figure 4.3 top surface of the diaphragm under 0.5 MPa applied pressure as a function of position (a) along the width of the diaphragm in x- direction at y = 50 µm, and (b) along the length of the diaphragm in y-direction at x = 0. Graph showing the change in resistance value of the resistor as a function of its distance from the fixed edge of the 30 µm wide diaphragm under 0.5 MPa applied pressure. Simulation results of (a) resistance change, and (b) output voltage as a function of applied pressure, for a piezoresistor placed at 0.5 µm from the fixed edge on the surface of the diaphragm. (a) The physical structure of an n-channel enhancement-type MOSFET, (b) Basic operation of NMOS transistor with a positive gate voltage. An n-channel is induced at the top of the substrate beneath the gate, and (c) current voltage characteristics of NMOS. (a) Schematic circuit diagram of a current mirror circuit, and (b) output current-voltage characteristics of the current mirror circuit. Schematic circuit diagram of a resistive loaded n-channel MOSFET based current mirror circuit with a constant current source MOSFET M1, acting as a reference transistor, and the output MOSFET M2 acting as a pressure sensing transistor, (b) Cross-sectional view of a MOSFET embedded pressure sensing structure with the channel region of the MOSFET M2 forming the pressure sensing flexible diaphragm, and (c) Cross-sectional view xviii

19 Figure 4.4 Figure 4.5 Figure 4.6 Figure 4.7 Figure 4.8 of the pressure sensing structure consisting of pressure sensing MOSFET M2 integrated on a particular region of the silicon diaphragm. MOSFET operating in saturation region represented by an equivalent resistor. Pressure sensing structure consisting of an n-channel MOSFET equivalent piezoresistor integrated on a silicon diaphragm used for COMSOL Multiphysics simulations. Screenshots of the FEM simulated structure (a) Deflection profile and (b) Stress profile of diaphragm integrated with NMOS equivalent piezoresistor, for an applied pressure of 1 MPa. Plots of (c) Channel resistance, and (d) Equivalent channel mobility as a function of resistor thickness for an applied pressure of 1 MPa. Structure I: (a) Cross-sectional view of current mirror sensing based MOSFET embedded pressure sensor with reference and pressure sensing transistors (M1 and M2), (b) Layout view of the current mirror sensing based pressure sensor. D, G, and S represent the drain, gate and source terminals of the MOSFETs M1 and M2. Simulation results of structure I. Screenshots of the FEM simulated structure (a) Deflection profile, and (b) Stress profile developed in the diaphragm under an applied pressure of 1 MPa. Electric conductivity profile of the NMOS equivalent piezoresistor xix

20 Figure 4.9 Figure 4.10 Figure 4.11 under (c) zero applied pressure, and (d) 1 MPa of applied pressure. Simulation results of structure I. Plots of (a) Channel resistance, (b) Channel mobility, (c) Drain current of current mirror transistors, and (d) Output voltage as a function of applied pressure. Structure II: (a) Pressure sensing MOSFET integrated at fixed edge of the diaphragm to sense positive tensile stress, (b) MOSFET integrated at the centre of the diaphragm to sense negative compressive stress, (c) Modified current mirror pressure sensing circuit with reference MOSFET (M1) and pressure sensing MOSFETs (M2 and M3 placed at the fixed edge and at the centre of the diaphragm, respectively), and (d) Layout view of the modified current mirror based pressure sensor. D, G, and S represent the drain, gate and source terminals of the MOSFETs M1, M2 and M3. Simulation results of structure II. Plots of normal x-direction stress developed in the diaphragm with NMOS equivalent piezoresistor integrated (a) At the fixed edge of the diaphragm, and (b) At the centre of the diaphragm. Electric conductivity profile of the NMOS equivalent piezoresistor integrated (a) At the fixed edge of the diaphragm, and (b) At the centre of the diaphragm. (Applied pressure = 1 MPa) Figure 4.12 Simulation results of structure II. Plots of (a) Channel resistance, 95 xx

21 Figure 4.13 Figure 4.14 Figure 4.15 Figure 4.16 Figure 4.17 Figure 4.18 (b) Channel mobility, (c) Drain current of current mirror transistors, and (d) Output voltage as a function of applied pressure. Structure III: Cross-sectional view of current mirror sensing based MOSFET embedded pressure sensor with reference and pressure sensing transistors (M1, M2 and M3). Layout view of the current mirror sensing based pressure sensor. MOSFET M2 is placed near the fixed edge of the diaphragm and M3 is placed at the centre. Simulation results of structure III. Screenshots of the FEM simulated structure (a) Deflection profile, and (b) Stress profile developed in the diaphragm under an applied pressure of 1 MPa. Electric conductivity profile of the NMOS equivalent piezoresistor under (c) zero applied pressure, and (d) 1 MPa of applied pressure. Simulation results of structure III. Plots of (a) Channel resistance, (b) Channel mobility, (c) Drain current of current mirror transistors, and (d) Output voltage as a function of applied pressure. Structure IV: (a) Schematic structure and (b) Cross-sectional view of a ring channel shaped MOSFET embedded pressure sensing structure. Layout view of square ring channel shaped MOSFET embedded pressure sensing structure xxi

22 Figure 4.19 Figure 4.20 Figure 4.21 Figure 4.22 Figure 4.23 Simulation results of structure IV. Screenshots of the FEM simulated structure (a) Displacement profile of the diaphragm, (b) Stress profile of a diaphragm under 1 MPa of applied pressure, (c) Electric potential of 200 V applied across the NMOS equivalent resistor, and (d) Electrical conductivity profile of the square ring channel shaped NMOS equivalent piezoresistor under 1 MPa of applied pressure. Simulation results of structure IV. Plots of (a) Channel resistance, (b) Channel mobility, (c) Drain current of current mirror transistors, and (d) Output voltage as a function of applied pressure. Structure V: (a) Cross-sectional view of the circular ring channel shaped MOSFET pressure sensor, and (b) Layout view of ring channel shaped MOSFET embedded pressure sensing structure. Simulation results of structure V. Screenshots of the FEM simulated structure (a) Displacement profile of the diaphragm, (b) Stress profile of a diaphragm under 1 MPa of applied pressure, (c) Electric potential of 200 V applied across the NMOS equivalent resistor, and (d) Electrical conductivity profile of the circular ring channel shaped NMOS equivalent piezoresistor under 1 MPa of applied pressure. Simulation results of structure V. Plots of (a) Channel resistance, (b) Channel mobility, (c) Drain current of current mirror xxii

23 Figure 4.24 Figure 4.25 Figure 4.26 Figure 4.27 Figure 4.28 transistors, and (d) Output voltage as a function of applied pressure. Structure VI: Cross-sectional view of current mirror sensing based MOSFET embedded pressure sensor with reference MOSFET M1 placed on the silicon substrate and the pressure sensing transistor M2 integrated on a silicon bridge structure. Simulation results of structure VI. Screenshots of the FEM simulated structure (a) Displacement profile, and (b) Normal x- direction stress profile of a silicon bridge structure under 1 MPa of applied pressure, (c) Electric potential applied across the NMOS equivalent resistor, and (d) Electrical conductivity profile of the NMOS equivalent piezoresistor integrated in the silicon bridge under 1 MPa of applied pressure. Simulation results of structure VI. Plots of (a) Channel resistance, (b) Channel mobility, (c) Drain current of current mirror transistors, and (d) Output voltage as a function of applied pressure. Structure VII: (a) MOSFET M2 integrated near the fixed edge of a silicon bridge to sense positive tensile stress, and (b) MOSFET M3 integrated at the centre of the silicon bridge to sense negative compressive stress. Simulation results of structure VII. Plots of normal x-direction stress developed in the diaphragm with NMOS equivalent xxiii

24 Figure 4.29 Figure 4.30 Figure 4.31 Figure 4.32 Figure 4.33 piezoresistor integrated (a) At the fixed edge of the diaphragm, and (b) At the centre of the diaphragm. Electric conductivity profile of the NMOS equivalent piezoresistor integrated (a) At the fixed edge of the diaphragm, and (b) At the centre of the diaphragm. (Applied pressure = 1 MPa). Simulation results of structure VII. Plots of (a) Channel resistance, (b) Channel mobility, (c) Drain current of current mirror transistors, and (d) Output voltage as a function of applied pressure. Structure VIII: Cross-sectional view of current mirror sensing based MOSFET embedded pressure sensor with reference and pressure sensing transistors (M1, M2 and M3). Simulation results of structure VIII. Screenshots of the FEM simulated structure (a) Deflection profile, and (b) Stress profile developed in the diaphragm under an applied pressure of 1 MPa. Electric conductivity profile of the NMOS equivalent piezoresistor under (c) zero applied pressure, and (d) 1 MPa of applied pressure. Simulation results of structure VIII. Plots of (a) Channel resistance, (b) Channel mobility, (c) Drain current of current mirror transistors, and (d) Output voltage as a function of applied pressure. Schematic circuit diagram of a Wheatstone bridge circuit. An input voltage V in = 10 V (DC) is applied at the input terminals A xxiv

25 Figure 4.34 Figure 4.35 and B, and output voltage V out is obtained across of C and D terminals. Plot of deflection error as a function of diaphragm deflection (2500 nm thick square and circular diaphragms have been used in the present work), (b) Plot of maximum deflection as a function of applied pressure for square and circular shaped silicon diaphragms, and square shaped silicon bridge, (c) Plot of linearity error (%) in the deflection of diaphragm and bridge structures as a function of applied pressure, (d) Plot of linearity error (nm) in the deflection of diaphragm and bridge structures. Plot of linearity error in the output voltage over the entire range of applied pressure from 0 to 1 MPa for various NMOS-MEMS integrated pressure sensing structures Figure 5.1 Mask layout of a single pressure sensor chip. 139 Figure 5.2 Figure 5.3 Figure 5.4 Figure 5.5 Snapshot of aluminum gate n-channel MOSFET fabricated using Silvaco s Athena process simulator. Input current-voltage characteristics of aluminum gate n-channel MOSFET. Output current-voltage characteristics of aluminum gate n-channel MOSFET. Photographs of bare silicon wafer (grey colour) and oxidized silicon wafer (greenish colour) Figure 5.6 Photographs of aluminium deposited on silicon wafers. 150 xxv

26 Figure 5.7 Figure 5.8 Figure 5.9 Figure 5.10 Figure 5.11 Figure 5.12 Figure 5.13 Figure 5.14 Photograph of the photoresist coated wafer after exposure and development. (a) Cross-sectional view of the fabricated aluminum gate MOS capacitor, and (b) Photograph of the processed wafer showing an array of aluminum gate MOS capacitors. High frequency CV characteristics of the fabricated aluminum gate MOS capacitor at 1 MHz frequency. Schematic circuit diagram of a current mirror circuit with nonidentical circuit elements. Plots of drain currents of current mirror transistors M1 and M2 as a function of mobility µ n2, aspect ratio (W/L) 2, threshold voltage V tn2 and drain resistance R D2 of transistor M2. Plots of output offset voltage, obtained across the drain terminals of current mirror transistors M1 and M2, as a function of mobility µ n2, aspect ratio (W/L) 2, threshold voltage V tn2 and drain resistance R D2 of transistor M2. Plots of drain current and drain voltage of current mirror transistors M1 and M2 as a function of supply voltage. Plots of (a) Mobility and (b) Threshold voltage of the n-channel MOSFET as a function of temperature. Plots of (c) Drain current and (d) Drain to source voltage of current mirror transistors M1 and M2 as a function of operating temperature xxvi

27 List of tables Table no. Table caption Page no. Table 2.1 Expressions for maximum deflection and maximum stress developed in various mechanical pressure sensing elements. 24 Table 2.2 Typical values of piezoresistance coefficients for bulk silicon 29 Table 2.3 Typical values of piezoresistance coefficients for MOSFET 30 Table 3.1 Design parameters used in the fabrication of double cavity vacuum sealed piezoresistive absolute pressure sensor 38 Table 3.2 Comparison of various pressure sensing diaphragms integrated with polysilicon piezoresistor placed at a distance of 5 µm from the fixed edge of the diaphragm 52 Table 3.3 Comparison of various pressure sensing diaphragms integrated with polysilicon piezoresistor placed at a distance of 0.5 µm from the fixed edge on the surface of the diaphragm 55 Table 3.4 Comparative table for various parameters of the pressure sensor extracted through FEM simulation before and after optimization of the sensing structure 56 Table 4.1 Typical values of n-channel MOSFET parameters used in the 76 xxvii

28 design of current mirror sensing based pressure sensor Table 4.2 Various parameters used for determining an appropriate thickness of nmos equivalent piezoresistor 78 Table 4.3 List of parameters used for design and simulation of structure I 82 Table 4.4 List of parameters used for design and simulation of structure II 92 Table 4.5 List of parameters used for design and simulation of structure III 97 Table 4.6 List of parameters used for design and simulation of structure IV 102 Table 4.7 List of parameters used for design and simulation of structure V 107 Table 4.8 Table 4.9 Table 4.10 Comparison table of eight different NMOS-MEMS integrated pressure sensing structures for 1 MPa of applied pressure Comparison of output voltages obtained using quarter, half and full Wheatstone bridge circuits with current mirror pressure sensing circuit Approximate linearity error in the diaphragm deflection related to its thickness Table 4.11 Table 5.1 Linearity error in the output voltages of all the eight structures for an applied pressure of 1 MPa Description of masks for making current mirror sensing based pressure sensor xxviii

29 Table 5.2 Details of the mask layout designed for the proposed pressure sensor 140 Table 5.3 SOI and silicon wafer specifications 145 Table 5.4 Table 5.5 Table 5.6 Measurement of oxide thickness at two different locations of silicon wafer Measurement of oxide thickness at two different locations of silicon wafer Measurement of sheet resistivity of phosphorus doped silicon wafer three different locations on the wafer surface xxix

30 List of symbols and abbreviations A. List of symbols Name SI unit Meaning Differential change x, y, z m Axes of rectangular coordinate system T Pa Stress tensor and its components e Strain tensor and its components E Pa Young s modulus of elasticity ν Poisson s ratio a, b, h m Length, width and thickness of the diaphragm w m Deflection of a diaphragm D Flexure rigidity of diaphragm P Pa Pressure M Bending moment and its components l, w, t m Length, width and thickness of a piezoresistor R Ω Resistance ρ Ω.m Resistivity and its components A m 2 Cross-sectional area GF Gauge factor V V Voltage I A Current xxxi

31 E V/m Electric field vector and its components J A/m 2 Current density vector and its components π Pa -1 Piezoresistivity tensor and its components µ m 2 /Vs Carrier mobility L m Channel length W m Channel width I D A Drain current µ n m 2 /Vs Electron mobility C ox F/m 2 Oxide capacitance per unit area V tn V Threshold voltage of n-channel MOSFET λ V 1 Channel length modulation V A A Early voltage V DS V Drain to source voltage V GS V Gate to source voltage V DD, V SS V Supply voltage r DS Ω Resistance of MOSFET in linear region r o Ω Resistance of MOSFET in saturation region I Ref A Reference current of current mirror circuit I o A Output current of current mirror circuit R ch Ω Channel resistance I Dp A Drain current of MOSFET under applied pressure β Transconductance parameter of MOSFET xxxii

32 B. List of abbreviations MEMS CMOS IC MOS MOSFET FEM EDA NMOS PECVD LPCVD CVD KOH TMAH RIE 3D Micro-electro-mechanical systems Complementary metal oxide semiconductor Integrated circuit Metal oxide semiconductor Metal oxide semiconductor field effect transistor Finite element method Electronic design automation n-channel MOSFET Plasma enhanced chemical vapor deposition Low pressure chemical vapor deposition Chemical vapor deposition Potassium hydroxide Tetramethyl ammonium hydroxide Reactive-Ion-Etching Three dimensional xxxiii