Performance Evaluation of CMOS Varactors for Wireless RF Applications

Transcription

1 Performance Evaluation of MOS Varactors for Wireless RF Applications Erik Pedersen RIS roup, Aalborg University Maxon ellular Systems (Denmark) A/S Fredrik Bajers Vej 7-A6, 90 Aalborg East, Denmark Phone: , Fax: , Abstract MOS varactors are important components for the integration of tunable RF filters and VO s. This paper presents a performance evaluation and comparison of three different types of MOS varactors based on measurements. The tested varactor types are: p + to n-well junction, Standard Mode nmos and Accumulation Mode nmos. The performance of each varactor type with respect to capacitance ratio and quality factor is evaluated at Hz. Further it is shown how these varactor types must be configured in L-tank circuits for optimum performance. Finally the three varactor types are compared and in conclusion the Standard Mode nmos type is pointed out as the best choice for wireless applications. 1 Introduction As a consequence of the continued down scaling of MOS technology, it is becog more and more applicable to wireless RF applications. This can enable the long term vision of an inexpensive single chip transceiver, including both baseband and RF circuitry, with only very few external components. Such a single chip solution is desired by the wireless industry, and especially for the cellular phone market, as it will make it possible to produce smaller and cheaper handsets with very little effort. For RF circuitry, a very important circuit element is the tunable L-tank, which in the simplest case consists only of an inductor and a varactor. The tunable L-tank can be used for RF filtering and RF VO s. In both cases it is essential to have a high quality factor. As spiral inductors are preferred over bondwire inductors, due to process simplicity and cost, the limiting factor on is the inductor. In a standard MOS process spiral inductors with a of 10 are hard to make, if not impossible. Typical values ranges from 3 to 6. onsequently a lot of work has been published on inductors, while varactors seems to be more or less overlooked. In the ideal case a varactor should have both a very large capacitance ratio and a very high. As this presentation shows it is difficult to obtain both features at the same time. Further this presentation also shows how to configure varactors for optimum performance in L-tank circuits with only a unipolar tuning voltage available. Integrated varactors can be implemented in several different ways, but for the purpose of this evaluation, effort is focused on the following three types: p + to n-well junction [1], Standard Mode nmos [1] and Accumulation Mode nmos [-4]. These three varactors are chosen, because they all use electrons as majority carriers. As the mobility of electrons are approximately.8 times higher than the mobility of holes, the chosen varactors are expected to show higher s than the p-type counterparts. For all three varactors the performance is evaluated at Hz in terms of the max / -ratio and the quality factor.

2 Method All three varactor types are produced in a 0.5µm epitaxial three metal layers MOS process, which is rated to a noal drain voltage of 3.3V. The varactors are measured on-wafer in terms of the S-parameters by the VNA HP8510. The S-parameters are measured with all possible combinations of bias voltage at the two ports, where the voltage is stepped from 0V to 3.3V in steps of 0.3V. For the pn-junction the bias combinations resulting in forward biasing are omitted. The S-parameters are measured from 45MHz to 1Hz at 101 equally spaced frequency points. The S-parameters are then post processed by MATLAB and deembedded with respect to the test pads. The de-embedded S-parameters are converted to Y- parameters and from these the input admittance Y in,1 and Y in, at both ports is calculated. The input capacitance in and the corresponding in is then calculated by the expressions: Bin imag( Yin ) in = = π f π f Bin imag( Yin ) in = = real( Y ) in in (1) () where values for Y in,1 and Y in, are inserted in place of Y in. From (1), max and are calculated using the Y-parameters corresponding to the lower and the upper limit of the tuning voltage. By means of (), and max are detered as the imum and maximum value of all s calculated within the tuning voltage range. In this evaluation the tuning voltage range is specified as: 0.5V to.3v, which is based on the fact that Lithium ion (Li + ) batteries seems to be the solution in the near future for wireless applications. The imum operating voltage for Li + batteries is 3V and by specifying a low drop voltage regulator with a drop out voltage of maximum 0.V, a supply voltage of.8v is obtained. By using the standard tuning voltage margin of 0.5V with respect to both the supply voltage and ground the above specified tuning voltage range is found. For all three varactor types it is found that the best performance with respect to both max / - ratio and is obtained from port 1 (the Anode for the pn-junction type and the ate for the nmos types) with an ideal A-short placed at port. A standard way to obtain an A-short is to use a capacitor. Unfortunately it has to be a very large capacitor (around 50pF) in order not to deteriorate the performance significantly. As large capacitors are unwanted in integrated designs an alternative approach is needed. One way to solve this problem is to use differential circuits, in which the virtual ground acts as an A-short. Simulations on a 1800MHz differential VO circuit with two Standard Mode nmos varactors in back-to-back series connection and a decoupling capacitor of 1pF in between indicates that an attenuation of approximately 30dB is obtainable from the ate (port 1) to the Drain/Source teral (port ) at the virtual ground point. To evaluate how the performance of the three varactors are affected by this relatively good (but still non ideal) A-short the input admittance is calculated by the following expression: Y = Y + K Y (3) in, V where K = = 10 = The result of (3) is then inserted into (1) and () to -30dB 0 V 1 detere the max / -ratio, and the and max respectively.

3 3 P + to n-well junction As shown in the cross section in fig.1b the p + to n-well junction varactor utilizes the junction capacitance j associated with the depletion area between the p + -diffusion and the n-well. The value of the junction capacitance j is controlled by the reverse voltage, which is defined from the athode () to the Anode (A). a) b) A V A = 0V D V TUNE = V D A N + P + N + R P + w j j R wj w R s R wj N-well N - Depletion Area Ideal A short Substrate P - Figure 1. p + to n-well junction varactor. a) Optimum circuit configuration. b) ross-section with indication of doating equivalent circuit elements. For optimum performance it is found that the Anode must be used as the hot teral, while the athode must be A-shorted to ground. Further it is found that the tuning voltage should be applied to the athode and that a bias voltage of 0V must be applied to the Anode. This optimum circuit configuration is shown in fig.1a, where the capacitor is assumed to be an ideal A-short. This result can be explained by looking at the cross-section shown in fig.1b. It is seen that there is no direct connection from the Anode to ground, while the athode is connected to ground through R w, w, and R s. The coupling through w is large due to the large well area and it has a low due to the resistors R w and especially R s. By placing an A-short at the athode this low capacitor w is short-circuited and thereby eliated = 94.5 & max = 109 in,a [pf] = 1.3 = 1.3 Small Islands Large Islands in,a = 18.0 & max =.6 Small Islands Large Islands 1 0 athode Voltage [V] athode Voltage [V] Figure. Anode input capacitance in,a and corresponding in,a versus athode voltage. All data are measured at Hz with an Anode voltage of 0V D and an ideal A-short at the athode. In fig. the results for two different versions of the p + to n-well junction varactor are plotted. Both versions are made as a number of square p + -islands surrounded by a grid of n-taps, where the distance between p + -islands and n-taps areas is kept at the imum feature size. One version is made with 4 p + -islands, each having a side length of 9µm (large islands). The other version is made with 598 p + -islands at the imum feature size, which is equal to a side length of 1.µm (small islands). From fig. it is seen that the pn-junction with small islands gives a much higher, but also a lower max / -ratio, than the pn-junction with large islands. Unfortunately in both cases the max / -ratio is considered to be too low for most low voltage RF applications.

4 4 Standard Mode nmos The layout and basic operation of the Standard Mode nmos varactor is similar to the n- channel MOSFET with the exception that Drain and Source are short-circuited in metal layers. The varactor function is achieved by changing the mode of operation from depletion to inversion, by which the capacitance is changed from imum to maximum. With a small positive voltage applied between the ate () and the Drain/Source () a depletion area is created just beneath the ate. As shown in fig.3b this depletion area is connected with the two other depletion areas associated with the two n + -diffusion to substrate junctions. In this situation the total capacitance from ate to Drain/Source, equals the series connection of the oxide capacitance ox and the depletion capacitance d. If the ate voltage is increased the depletion area beneath the ate will extend deeper into the substrate, which will cause d and consequently, to increase. When the ate voltage is increased even further an inversion layer (channel) is created at the silicon surface and when strong inversion is reached the, will obtain its maximum value, which is equal to the oxide capacitance ox. a) b) V = 1.8V D V TUNE = V D R d ov d ox ov d N + N + si R d j R sj P + Ldd N - R si Ideal A short Depletion Area Substrate P - Figure 3. Standard Mode nmos varactor. a) Optimum circuit configuration. b) ross-section with indication of doating equivalent circuit elements. In fig.3a the optimum configuration for the Standard Mode nmos varactor is shown. It is found that the ate must be used as the hot teral, while the Drain/Source teral must be A-shorted to ground. Further, it is found that the tuning voltage should be applied to the Drain/Source teral. From fig.4 it is seen that a bias voltage of 1.8V should be applied to the ate for a combined optimum of max / -ratio and. To explain this optimum configuration the cross-section shown in fig.3b is used. It is seen that there is no direct connection from the ate to ground, while the Drain/Source is connected to ground through j, and R sj. The coupling through j is large due to the large Drain/Source areas and it has a low due to the substrate resistor R sj. By placing an A-short from the Drain/Source teral to ground this low capacitor j is short-circuited and thereby eliated. in, [pf] =.15 =.15 = = 4.6 & max = 3.9 Figure 4. ate input capacitance in, and corresponding in, versus Drain/Source voltage. All data are measured at Hz with an ideal A-short at the Drain/Source. in, = 7.0 & max = 35.1 = 5.8 & max = 34.3

5 5 Accumulation Mode nmos The layout of the Accumulation Mode nmos varactor is a combination of the n-channel and p-channel MOSFET. The varactor function is achieved by changing the mode of operation from depletion to accumulation, by which the capacitance is changed from imum to maximum. With a negative voltage applied between the ate () and the Drain/Source () electrons just beneath the ate are pushed away and a depleted area is created. This situation is shown in fig.5b, in which the total capacitance from ate to Drain/Source, is the series connection of the oxide capacitance ox and the depletion capacitance d. If now the voltage is reversed, so that a positive voltage is applied between the ate and the Drain/Source, the silicon surface is accumulated with electrons from the two n + -diffusion areas. The, is then obtaining its maximum value, which is equal to the oxide capacitance ox. a) b) V = 0.6V D V TUNE = V D ov ox ov N + N + P + w d d R w R s R Rd d Depletion Area N-well N - Ideal A short Substrate P - Figure 5. Accumulation Mode nmos varactor. a) Optimum circuit configuration. b) rosssection with indication of doating equivalent circuit elements. In fig.5a the optimum configuration for the Accumulation Mode nmos varactor is shown. Like the Standard Mode nmos it is found that the ate must be used as the hot teral, while the Drain/Source teral must be A-shorted to ground. Further it is found that the tuning voltage should be applied to the Drain/Source teral. From fig.6 it is seen that a bias voltage of 0.6V should be applied to the ate for a combined optimum of max / -ratio and. To explain this optimum configuration the cross-section shown in fig.5b is used. It is seen that there is no direct connection from the ate to ground, while the Drain/Source is connected to ground through R w, w, and R s. The coupling through w is large due to the large well area and it has a low due to the resistors R w and especially R s. By placing an A-short from the Drain/Source teral to ground this low capacitor w is short-circuited and thereby eliated. in, [pf] = 1.74 = = 1.54 Figure 6. ate input capacitance in, and corresponding in, versus Drain/Source voltage. All data are measured at Hz with an ideal A-short at the Drain/Source. in, = 37. & max = 41.4 = 7.1 & max = 30.6 = 33. & max =

6 6 Discussion In table 1 the varactors presented in this paper are compared. As explained in previous sections an ideal A-short is needed for all exaed varactor types to obtain optimum performance. In section it is explained how this ideal A-short can be approximated by utilizing the virtual ground in a differential circuit. To get a realistic comparison the results for a virtual ground with 30dB of attenuation is included in table 1. Varactor Type A-short max / max p + to n-well Ideal (Large islands) Virtual ground 30dB p + to n-well Ideal (Small islands) Virtual ground 30dB Standard Ideal Mode nmos Virtual ground 30dB Accumulation Ideal Mode nmos Virtual ground 30dB Table 1. omparison of varactors. From table 1 it is seen that the performance is deteriorated very little, when the ideal Ashort is replaced by a virtual ground. Further, from table 1 it is seen that the max / -ratio for both versions of the p + to n-well junction is very poor and consequently this type of varactor is not considered as a good choice for most applications. This leaves us with the Standard Mode nmos and the Accumulation Mode nmos. The Standard Mode nmos has the largest max / -ratio, but also a lower. With further down scaling of the technology it is expected, for both nmos types, that the max / -ratio will decrease, while the will increase. The decreasing max / -ratio is a problem, because of the large component tolerances in MOS. As a result the Standard Mode nmos varactor seems to be the best choice for wireless RF applications, if a more modern MOS process is used. 7 onclusion Three different varactor types produced in a 0.5µm MOS process are evaluated with respect to max / -ratio and. The evaluation is performed at Hz with a tuning voltage of: 0.5V to.3v. For each varactor type it is shown how it must be configured in L-tank circuits for optimum performance. From the comparison it is concluded that the Standard Mode nmos varactor is expected to be the best choice for wireless RF applications with further down scaling. 8 References [1] A. Kral, A.4Hz MOS Frequency Synthesizer, M.Sc.E.E. Thesis, Integrated ircuits & Systems Laboratory, ULA, pp , March [] T. Soorapanth,. P. Yue, D. K. Shaeffer, T. H. Lee, S. S. Wong, Analysis and Optimization of Accumulation-Mode Varactor for RF Is, Symposium on VLSI ircuits, pp. 3-33, June [3] R. astello, P. Erratico, S. Manzini, and F. Svelto, A ±30% Tuning Range Varactor ompatible with future Scaled Technologies, Symposium on VLSI ircuits, pp , June [4] F. Svelto, P. Erratico, S. Manzini, and R. astello, A Metal-Oxide-Semiconductor Varactor, IEEE Electron Device Letters, vol. 0, pp , April 1999.