PART MAX5304EUA TOP VIEW OUT 8 CONTROL INPUT REGISTER. Maxim Integrated Products 1
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1 ; Rev ; 1/99 1-Bit Voltage-Output General Description The combines a low-power, voltage-output, 1-bit digital-to-analog converter () and a precision output amplifier in an 8-pin µmax package. It operates from a single supply, drawing less than 28µA of supply current. The output amplifier s inverting input is available to the user, allowing specific gain configuratio, remote seing, and high output-current capability. This makes the ideal for a wide range of applicatio, including industrial process control. Other features include a software shutdown and power-on reset. The serial interface is SPI /QSPI /MICROWIRE compatible. The has a double-buffered input, organized as an input register followed by a register. A 16-bit serial word loads data into the input register. The register can be updated independently or simultaneously with the input register. All logic inputs are TTL/CMOS-logic compatible and buffered with Schmitt triggers to allow direct interfacing to optocouplers. Digital Offset and Gain Adjustment Industrial Process Control Microprocessor-Controlled Systems Portable Test Itruments Remote Industrial Control Applicatio Features 1-Bit with Configurable Output Amplifier Single-Supply Operation Low Supply Current.28mA Normal Operation 2µA Shutdown Mode Available Power-On Reset Clears Output to Zero SPI/QSPI/MICROWIRE Compatible Schmitt-Trigger Digital Inputs for Direct Optocoupler Interface Ordering Information PART CUA EUA TEMP. RANGE C to +7 C -4 C to +85 C PIN-PACKAGE 8 µmax 8 µmax Functional Diagram Pin Configuration TOP VIEW REGISTER 1 8 CONTROL INPUT REGISTER BIT SHIFT REGISTER 4 µmax 5 SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. Maxim Integrated Products 1 For free samples & the latest literature: or phone For small orders, phone
2 ABSOLUTE MAXIMUM RATINGS to...-.3v to +6V,, to...-.3v to ( +.3V) Digital Inputs to...-.3v to +6V Continuous Current into Any Pin...±2mA Continuous Power Dissipation (T A = +7 C) 8-Pin µmax (derate 4.1mW/ C above+7 C)...33mW Operating Temperature Ranges CUA... C to +7 C EUA...-4 C to +85 C Junction Temperature C Storage Temperature Range C to +15 C Lead Temperature (soldering, 1s) C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditio beyond those indicated in the operational sectio of the specificatio is not implied. Exposure to absolute maximum rating conditio for extended periods may affect device reliability. ELECTRICAL CHARACTERISTI (Circuit of Figure 8, = ±1%, V = +2.5V, R L = 5kΩ, C L = 1pF, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C. Output buffer connected in unity-gain configuration.) PARAMETER SYMBOL STATIC PERFORMANCE ANALOG SECTION Resolution CONDITIONS Differential Nonlinearity DNL Guaranteed monotonic ±1. Integral Nonlinearity (Note 1) Offset Error Offset-Error Tempco Gain-Error Tempco Power-Supply Rejection Ratio PSRR 4.5V 5.5V 8 ERENCE INPUT Reference Input Range V Reference Input Resistance R MULTIPLYING-MODE PERFORMANCE Reference -3dB Bandwidth Reference Feedthrough Signal-to-Noise Plus SINAD Distortion Ratio DIGITAL INPUTS Input High Voltage V IH Input Low Voltage V IL Input Leakage Current I IN Input Capacitance C IN N INL V OS TCV OS Gain Error (Note 1) GE -.3 ±2 Code dependent, minimum at code 155 hex V =.67Vp-p Input code = all s, V = 3.6Vp-p at 1kHz V = 1Vp-p at 25kHz, code = full scale V IN = or MIN TYP MAX ±4 UNITS Bits LSB LSB ±.3 ±8 mv ±.5 8 ppm/ C LSB ppm/ C µv/v V kω khz db db V V µa pf 2
3 ELECTRICAL CHARACTERISTI (continued) (Circuit of Figure 8, = ±1%, V = +2.5V, R L = 5kΩ, C L = 1pF, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C. Output buffer connected in unity-gain configuration.) Current into Start-Up Time Supply Voltage Supply Current PARAMETER DIGITAL DYNAMIC INPUTS PERFORMANCE Voltage Output Slew Rate Output Settling Time Output Voltage Swing Digital Feedthrough POWER SUPPLIES Supply Current in Shutdown Reference Current in Shutdown SYMBOL SR I DD TIMING CHARACTERISTI (Figure 6) Clock Period Pulse Width High Pulse Width Low Fall to Rise Setup Time Rise to Rise Hold Time Setup Time Hold Time Rise to Fall Delay Rise to Rise Hold Time Pulse Width High t CP t CH t CL t S t H t DS t DH t t 1 t W To ±1/2LSB, V STEP = 2.5V Rail-to-rail (Note 2) =, = 1kHz (Note 3) CONDITIONS MIN TYP MAX.6 1 to.1 ± UNITS (Note 3) 4 2 µa ±.5 V/µs µs V µa µs nvs V ma µa Note 1: Guaranteed from code 3 to code 123 in unity-gain configuration. Note 2: Accuracy is better than 1LSB for V = 8mV to ( - 1mV), guaranteed by a power-supply rejection test at the end points. Note 3: R L =, digital inputs at or. 3
4 Typical Operating Characteristics ( =, R L = 5kΩ, C L = 1pF, T A = +25 C, unless otherwise noted.) INL (LSB) INTEGRAL NONLINEARITY vs. ERENCE VOLTAGE ERENCE VOLTAGE (V) RELATIVE PUT (db) ERENCE VOLTAGE INPUT FREQUENCY RESPONSE 5k 1M 1.5M 2M 2.5M 3M FREQUENCY (Hz) -2 SUPPLY CURRENT (µa) SUPPLY CURRENT vs. TEMPERATURE 4 38 R L = TEMPERATURE ( C) -3 POWER-DOWN SUPPLY CURRENT (µa) POWER-DOWN SUPPLY CURRENT vs. TEMPERATURE -4 SUPPLY CURRENT (µa) SUPPLY CURRENT vs. SUPPLY VOLTAGE -5 THD + NOISE (db) TOTAL HARMONIC DISTORTION PLUS NOISE vs. FREQUENCY V = +2.5V DC + 1Vp-p SINE CODE = FULL SCALE TEMPERATURE ( C) SUPPLY VOLTAGE (V) FREQUENCY (khz) SIGNAL AMPLITUDE (db) PUT FFT PLOT V = +3.6Vp-p CODE = FULL SCALE f IN = 1kHz -7 PUT VOLTAGE (V) PUT VOLTAGE vs. LOAD -8 SIGNAL AMPLITUDE (db) ERENCE FEEDTHROUGH AT 1kHz ERENCE INPUT SIGNAL PUT FEEDTHROUGH -9a/9b FREQUENCY (khz) k 1k 1k 1k 1M LOAD (Ω) FREQUENCY (khz) 4
5 Typical Operating Characteristics (continued) ( =, R L = 5kΩ, C L = 1pF, T A = +25 C, unless otherwise noted.) 5V/div MAJOR-CARRY TRANSITION -1a 2V/div DIGITAL FEEDTHROUGH (f = 1kHz) -11a AC-COUPLED 1mV/div AC-COUPLED 1mV/div CODE = 512 1µs/div = 5V 2µs/div DYNAMIC RESPONSE 1V/div -12a 1µs/div GAIN = +2V/V, SWITCHING FROM CODE TO 15 5
6 Pin Description PIN NAME FUNCTION 1 Output Voltage 2 Chip-Select Input. Active low. 3 Serial-Data Input 4 Serial-Clock Input R R R 2R 2R 2R 2R 2R MSB 5 Output Amplifier Feedback 6 Reference Voltage Input 7 Ground A 8 Positive Power Supply SHOWN FOR ALL 1s ON Figure 1. Simplified Circuit Diagram Detailed Description The contai a voltage-output digital-to-analog converter () that is easily addressed using a simple 3-wire serial interface. Each IC includes a 16-bit shift register, and has a double-buffered input composed of an input register and a register (see the Functional Diagram). In addition to the voltage output, the amplifier s negative input is available to the user. The is an inverted R-2R ladder network that converts a digital input (1 data bits plus 3 sub-bits) into an equivalent analog output voltage in proportion to the applied reference voltage. Figure 1 shows a simplified circuit diagram of the. Reference Inputs The reference input accepts positive DC and AC signals. The voltage at the reference input sets the fullscale output voltage for the. The reference input voltage range is V to (VDD - 1.4V). The output voltage (V) is represented by a digitally programmable voltage source, as expressed in the following equation: V = (V NB / 124) Gain where NB is the numeric value of the s binary input code ( to 123), V is the reference voltage, and Gain is the externally set voltage gain. The impedance at the reference input is code dependent, ranging from a low value of 18kΩ when the has an input code of 155 hex, to a high value exceeding several gigohms (leakage currents) with an input code of hex. Because the input impedance at the reference pin is code dependent, load regulation of the reference source is important. In shutdown mode, the s input enters a high-impedance state with a typical input leakage current of.1µa. The reference input capacitance is also code dependent and typically ranges from 15pF (with an input code of all s) to 5pF (at full scale). The MAX V reference is recommended for use with the. Output Amplifier The s output is internally buffered by a precision amplifier with a typical slew rate of.6v/µs. Access to the output amplifier s inverting input provides the user greater flexibility in output gain setting/signal conditioning (see the Applicatio Information section). With a full-scale traition at the output, the typical settling time to ±1/2LSB is 1µs when loaded with 5kΩ in parallel with 1pF (loads less than 2kΩ degrade performance). The amplifier s output dynamic respoes and settling performances are shown in the Typical Operating Characteristics. Shutdown Mode The features a software-programmable shutdown that reduces supply current to a typical value of 4µA. Writing 111X XXXX XXXX XXXX as the input-control word puts the device in shutdown mode (Table 1). 6
7 In shutdown mode, the amplifier s output and the reference input enter a high-impedance state. The serial interface remai active. Data in the input register is retained in shutdown, allowing the to recall the output state prior to entering shutdown. Exit shutdown mode by either recalling the previous configuration or updating the with new data. When powering up the device or bringing it out of shutdown, allow 2µs for the outputs to stabilize. Serial-Interface Configuratio The s 3-wire serial interface is compatible with MICROWIRE (Figure 2) and SPI/QSPI (Figure 3). The serial-input word coists of three control bits followed by 1+3 data bits (MSB first), as shown in Figure 4. The 3-bit control code determines the s respoe outlined in Table 1. The s digital inputs are double buffered. Depending on the command issued through the serial interface, the input register can be loaded without affecting the register, the register can be loaded directly, or the register can be updated from the input register (Table 1). SK SO I/O Figure 2. Connectio for MICROWIRE MICROWIRE PORT Serial-Interface Description The requires 16 bits of serial data. Table 1 lists the serial-interface programming commands. For certain commands, the 1+3 data bits are don t cares. Data is sent MSB first and can be sent in two 8- bit packets or one 16-bit word ( must remain low until 16 bits are traferred). The serial data is composed of three control bits (C2, C1, C), followed by the 1+3 data bits D9...D, S2, S1, S (Figure 4). Set the sub-bits (S2, S1, S) to zero. The 3-bit control code determines the register to be updated and the configuration when exiting shutdown. Figure 5 shows the serial-interface timing requirements. The chip-select pin () must be low to enable the s serial interface. When is high, the interface control circuitry is disabled. must go low at least t S before the rising serial-clock () edge to properly clock in the first bit. When is low, data is clocked into the internal shift register through the serialdata input pin () on s rising edge. The maximum guaranteed clock frequency is 1MHz. Data is latched into the input/ register on s rising edge. Figure 3. Connectio for SPI/QSPI MOSI SCK I/O SS SPI/QSPI PORT CPOL =, CPHA = MSB...LSB Control Bits C2 C1 C 3 Control Bits 16 Bits of Serial Data Data Bits MSB...LSB Sub-Bits D9...D, S2, S1, S 1+3 Data Bits Figure 4. Serial-Data Format 7
8 Table 1. Serial-Interface Programming Commands 16-BIT 16-BIT SERIAL SERIAL WORD WORD C2 C1 C X X 1 X X = Don t care D9...D MSB LSB 1 bits of data 1 bits of data XXXXXXXXXX XXXXXXXXXX XXXXXXXXXX S2...S XXX XXX XXX Shutdown No operation (NOP) FUNCTION Load input register; register immediately updated (also exit shutdown). Load input register; register unchanged. Update register from input register (also exit shutdown; recall previous state) COMMAND EXECUTED C2 C1 C D9 D8 D7 D6 D5 D4 D3 D2 D1 D S2 S1 S Figure 5. Serial-Interface Timing Diagram t W t O t S t CL t CH t CP t H t 1 t DS tdh Figure 6. Detailed Serial-Interface Timing Diagram 8
9 1 2 3 TO OTHER SERIAL DEVICES Figure 7. Multiple s Sharing Common and Lines Figure 7 shows a method of connecting several s. In this configuration, the clock and the data bus are common to all devices, and separate chipselect lines are used for each IC. Applicatio Information Unipolar Output For a unipolar output, the output voltage and the reference input have the same polarity. Figure 8 shows the unipolar output circuit, which is also the typical operating circuit. Table 2 lists the unipolar output codes. Figure 9 illustrates a Rail-to-Rail output configuration. This circuit shows the with the output amplifier configured for a closed-loop gain of +2V/V to provide a to 5V full-scale range when a 2.5V reference is used. Bipolar Output The output can be configured for bipolar operation using Figure 1 s circuit according to the following equation: V = V [(2NB / 124) - 1] where NB is the numeric value of the s binary input code. Table 3 shows digital codes (offset binary) and corresponding output voltages for Figure 1 s circuit. Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd. Table 2. Unipolar Output Codes CONTENTS MSB LSB () 1 1 () 1 () () 1 () ANALOG PUT 123 +V V V +V = V V 124 () V Note: ( ) are for sub-bits. Using an AC Reference In applicatio where the reference has AC signal components, the has multiplying capability within the reference input range specificatio. Figure 11 shows a technique for applying a sine-wave signal to the reference input where the AC signal is offset before being applied to. The reference voltage must never be more negative than. 9
10 Table 3. Bipolar Output Codes CONTENTS MSB LSB () 1 1 () ANALOG PUT 1 () V () 1 () 511 +V V V V 512 The s total harmonic distortion plus noise (THD+N) is typically less than -77dB (full-scale code), given a 1Vp-p signal swing and input frequencies up to 25kHz. The typical -3dB frequency is 65kHz, as shown in the Typical Operating Characteristics graphs. Digitally Programmable Current Source Figure 12 s circuit places an NPN traistor (2N394 or similar) within the op amp feedback loop to implement a digitally programmable, unidirectional current source. The output current is calculated with the following equation: I = (V / R)(NB / 124) where NB is the numeric value of the s binary input code, and R is the see resistor shown in Figure 12. () 512 -V = -V 512 Note: ( ) are for sub-bits. 1k 1k Figure 8. Unipolar Output Circuit Figure 9. Unipolar Rail-to-Rail Output Circuit 1
11 R1 V+ R2 AC ERENCE INPUT 5mVp-p 26k 1k MAX495 V V- R1 = R2 = 1kΩ ±.1% Figure 1. Bipolar Output Circuit Figure 11. AC Reference Input Circuit V L I Power-Supply Coideratio On power-up, the input and registers are cleared (set to zero code). For rated performance, must be at least 1.4V below VDD. Bypass VDD with a 4.7µF capacitor in parallel with a.1µf capacitor to. Use short lead lengths, and place the bypass capacitors as close to the supply pi as possible. 2N394 R Grounding and Layout Coideratio Digital or AC traient signals on can create noise at the analog output. Connect to the highest-quality ground available. Good PC board ground layout minimizes crosstalk between the output, reference input, and digital input. Reduce crosstalk by keeping analog lines away from digital lines. Wire-wrapped boards are not recommended. Figure 12. Digitally Programmable Current Source Chip Information TRANSISTOR COUNT: 353 SUBSTRATE CONNECTED TO A 11
12 Package Information 8LUMAXD.EPS Maxim cannot assume respoibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licees are implied. Maxim reserves the right to change the circuitry and specificatio without notice at any time. 12 Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
PART* MAX5354EUA MAX5354EPA TOP VIEW OUT. SPI and QSPI are trademarks of Motorola, Inc. Microwire is a trademark of National Semiconductor Corp.
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