EVALUATION KIT AVAILABLE 10-Bit, Dual, Nonvolatile, Linear-Taper Digital Potentiometers TOP VIEW

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1 ; Rev 2; 1/6 EVALUATION KIT AVAILABLE 1-Bit, Dual, Nonvolatile, Linear-Taper General Description The 1-bit (124-tap), dual, nonvolatile, linear-taper, programmable voltage-dividers and variable resistors perform the function of a mechanical potentiometer, but replace the mechanics with a 3-wire SPI -compatible serial interface. The MAX5494/MAX5495 are dual, 3-terminal, programmable voltage-dividers; the MAX5496/MAX5497 are dual, 2-terminal variable resistors; and the MAX5498/ MAX5499 include one 2-terminal variable resistor and one 3-terminal programmable voltage-divider. The feature an internal, nonvolatile, electrically erasable programmable read-only memory (EEPROM) that stores the wiper position for initialization during power-up. The 3-wire SPI-compatible serial interface allows communication at data rates up to 7MHz. The are ideal for applications requiring digitally controlled potentiometers. End-to-end resistance values of 1kΩ and 5kΩ are available with a 35ppm/ C end-to-end temperature coefficient. The ratiometric temperature coefficient is 5ppm/ C for each channel, making these devices ideal for applications requiring low-temperature-coefficient programmable voltagedividers such as low-drift, programmable-gain amplifiers. The operate with either a single power supply (+2.7V to +5.25V) or dual power supplies (±2.5V). The devices consume 4µA (max) of supply current when writing data to the nonvolatile memory and 1.5µA (max) of standby supply current. The devices are available in space-saving (5mm x 5mm x.8mm), 16-pin TQFN package and are specified over the extended (-4 C to +85 C) temperature range. Gain and Offset Adjustment LCD Contrast Adjustment Pressure Sensors Low-Drift Programmable-Gain Amplifiers Mechanical Potentiometer Replacement Volume Control Applications Ordering Information PART TEMP RANGE PIN- PKG CODE PACKAGE MAX5494ETE -4 C to +85 C 16 TQFN-EP* T MAX5495ETE -4 C to +85 C 16 TQFN-EP* T *EP = Exposed pad. Ordering Information continued at end of data sheet. Selector Guide appears at end of data sheet. SPI is a trademark of Motorola, Inc. Features Wiper Position Stored in Nonvolatile Memory and Recalled Upon Power-Up 16-Pin, 5mm x 5mm x.8mm TQFN Package 35ppm/ C End-to-End Resistance Temperature Coefficient 5ppm/ C Ratiometric Temperature Coefficient 1kΩ and 5kΩ End-to-End Resistor Values 3-Wire SPI-Compatible Serial Interface Reliability (T A = +85 C) 5, Wiper Store Cycles 5 Years Wiper Data Retention 1.5µA (max) Standby Current Single +2.7V to +5.25V Supply Operation Dual ±2.5V Supply Operation TOP VIEW GND INTERFACE W1 L1 MAX5494 MAX5495 H W2 L2 H2 5mm 5mm.8mm TQFN GND INTERFACE Pin Configurations W1 L1 MAX5496 MAX5497 W2 L2 D. D. 5mm 5mm.8mm TQFN Pin Configurations continued at end of data sheet V SS V DD V SS V DD Maxim Integrated Products 1 For pricing delivery, and ordering information please contact Maxim Direct at , or visit Maxim s website at

2 1-Bit, Dual, Nonvolatile, Linear-Taper ABSOLUTE MAXIMUM RATINGS V DD to GND...-.3V to +6.V V SS to GND V to +.3V V DD to V SS...-.3V to +6.V H1, H2, L1, L2, W1, W2 to V SS...(V SS -.3V) to (V DD +.3V),, to GND...-.3V to (V DD +.3V) Maximum Continuous Current into H_, L_, and W_ MAX5494/MAX5496/MAX ±5.mA MAX5495/MAX5497/MAX ±1.mA Maximum Current Into Other Pins...±5.mA ELECTRICAL CHARACTERISTI Continuous Power Dissipation (T A = +7 C) 16-Pin TQFN (derate 2.8mW/ C above +7 C) mW Operating Temperature Range...-4 C to +85 C Junction Temperature C Storage Temperature Range...-6 C to +15 C Lead Temperature (soldering, 1s)...+3 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (V DD = +2.7V to +5.25V, V SS = GND =, V H_ = V DD, V L_ =, T A = -4 C to +85 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (MAX5494/MAX5495/MAX5498/MAX5499 Programmable Voltage-Divider) Resolution N 1 Bits Integral Nonlinearity (Note 2) Differential Nonlinearity (Note 2) End-to-End Resistance Temperature Coefficient INL DNL V DD = 2.7V ±2 V DD = 5V ±2 V DD = 2.7V ±1 V DD = 5V ±1 TC R 35 ppm/ C LSB LSB Ratiometric Temperature Coefficient 5 ppm/ C Full-Scale Error Zero-Scale Error FSE ZSE MAX5494/MAX MAX5495/MAX MAX5494/MAX MAX5495/MAX Wiper Capacitance C W 6 pf MAX5494/MAX End-to-End Resistance R HL MAX5495/MAX LSB LSB kω Channel-to-Channel Division Ratio Matching V DD = 3V, midcode: 512 MAX MAX % Resistance from W_ to L_ and H_ MAX5494/MAX5498, W_ at 15 code, H_ and L_ shorted to V SS, measure resistance from W_ to H_ (Figures 4 and 5) MAX5495/MAX5499, W_ at 15 code, H_ and L_ shorted to V SS, measure resistance from W_ to H_ (Figures 4 and 5) kω 2

3 1-Bit, Dual, Nonvolatile, Linear-Taper ELECTRICAL CHARACTERISTI (continued) (V DD = +2.7V to +5.25V, V SS = GND =, V H_ = V DD, V L_ =, T A = -4 C to +85 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (MAX5496 MAX5499 Variable Resistor) Resolution N 1 Bits Integral Nonlinearity (Note 3) Differential Nonlinearity (Note 3) Variable-Resistor Temperature Coefficient INL_R DNL_R V DD = 2.7V -1.6 V DD = 3V V DD = 5V V DD = 2.7V +.45 V DD = 3V V DD = 5V TC VR V DD = 3V to 5.25V; code = 128 to ppm/ C Wiper Resistance R W V DD 3V (Note 4) 5 Ω Wiper Capacitance C WR 6 pf Full-Scale Wiper-to-End Resistance Zero-Scale Resistor Error R Z Code = Two-Channel Resistance Matching DIGITAL INPUTS (,, ) (Note 5) MAX5496/MAX R W-L MAX5497/MAX V DD = 3V to 5.25V MAX5494/MAX MAX5495/MAX MAX5496/MAX5498, Code >128 MAX5497/MAX5499, Code > LSB LSB kω Ω % Input High Voltage VIH Single-supply operation V DD = 3.6V to 5.25V 2.4 V DD = 2.7V to 3.6V.7 x V DD V Dual-supply operation With respect to GND, V DD = 2.5V, V SS = -2.5V 2. Single-supply operation Input Low Voltage V IL Dual-supply operation V DD = 2.7V to 5.25V.8 With respect to GND, V DD = 2.5V, V SS = -2.5V Input Leakage Current I IN ±1 µa Input Capacitance C IN 5 pf DYNAMIC CHARACTERISTI Wiper -3dB Bandwidth BW Wiper at code 495 MAX5494/MAX ( ), 1pF load at wiper MAX5495/MAX V khz 3

4 1-Bit, Dual, Nonvolatile, Linear-Taper ELECTRICAL CHARACTERISTI (continued) (V DD = +2.7V to +5.25V, V SS = GND =, V H_ = V DD, V L_ =, T A = -4 C to +85 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Total Harmonic Distortion Analog Crosstalk NONVOLATILE MEMORY RELIABILITY THD MAX5494/MAX5498; V DD = 3V; wiper at code 495; 1kHz, 1V RMS signal is applied at H_; 1pF load at wiper MAX5495/MAX5499; V DD = 3V; wiper at code 495; 1kHz, 1V RMS signal is applied at H_; 1pF load at wiper CH2 = , CH1 = , C W_ = 1pF, V H1 = V DD = +2.5V, V L1 = V SS = -2.5V, measure V W1 with V W2 = 5V P-P at f = 1kHz.26.3 % -93 db Data Retention T A = +85 C 5 Years Endurance POWER SUPPLIES T A = +25 C 2, T A = +85 C 5, Single-Supply Voltage V DD V SS = GND = V Dual-Supply Voltage During nonvolatile write only; Average Programming Current I PG digital inputs = V DD or GND During nonvolatile write only; Peak Programming Current digital inputs = V DD or GND V DD GND = V SS (V DD - V SS ) 5.25V Stores V 22 4 µa 4 ma Standby Current I DD Digital inputs = V DD or GND, T A = +25 C µa 4

5 1-Bit, Dual, Nonvolatile, Linear-Taper TIMING CHARACTERISTI (V DD = +2.7V to +5.25V, V SS = GND =, V H_ = V DD, V L_ =, T A = -4 C to +85 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +25 C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS ANALOG SECTION MAX5494/MAX Wiper Settling Time (Note 6) t S MAX5495/MAX SPI-COMPATIBLE SERIAL INTERFACE (Figure 6) Frequency f 7 MHz Clock Period t CP 14 ns Pulse-Width High t CH 6 ns Pulse-Width Low t CL 6 ns Fall to Rise Setup t S 6 ns Rise to Rise Hold t H ns to Setup t DS 4 ns Hold After t DH ns Rise to Fall Delay t 15 ns Rise to Rise Hold t 1 6 ns Pulse-Width High t W 15 ns Write NV Register Busy Time t BUSY 12 ms µs Note 1: 1% production tested at T A = +25 C and T A = +85 C. Guaranteed by design to T A = -4 C. Note 2: The DNL and INL are measured for the voltage-divider with H_ = V DD and L_ = V SS. The wiper terminal (W_) is unloaded and measured with a high-input-impedance voltmeter. Note 3: The DNL and INL are measured with L_ = V SS =. For V DD = 5V, the wiper terminal is driven with a current source of I W = 8µA for the 5kΩ device and I W = 4µA for the 1kΩ device. For V DD = 3V, the wiper terminal is driven with a current source of I W = 4µA for the 5kΩ device and I W = 2µA for the 1kΩ device. Note 4: The wiper resistance is measured using the source currents given in Note 3. Note 5: The device draws higher supply current when the digital inputs are driven with voltages between (V DD -.5V) and (GND +.5V). See the Supply Current vs. Digital Input Voltage graph in the Typical Operating Characteristics. Note 6: Wiper settling test condition uses the voltage-divider with a 1pF load on W_. Transition code from to 495 and measure the time from going high to the wiper voltage settling to within.5% of its final value. 5

6 1-Bit, Dual, Nonvolatile, Linear-Taper (V DD = +5.V, V SS =, T A = +25 C, unless otherwise noted.) DNL (LSB) DIFFERENTIAL NONLINEARITY vs. CODE (VARIABLE RESISTOR) V DD = 3V CODE MAX5494 toc1 INL (LSB) INTEGRAL NONLINEARITY vs. CODE (VARIABLE RESISTOR) V DD = 3V CODE Typical Operating Characteristics MAX5494 toc2 DNL (LSB) MAXIMUM DIFFERENTIAL NONLINEARITY vs. SUPPLY VOLTAGE (VARIABLE RESISTOR) V DD (V) MAX5494 toc3 MAXIMUM INTEGRAL NONLINEARITY vs. SUPPLY VOLTAGE (VARIABLE RESISTOR) 1..5 MAX5494 toc DIFFERENTIAL NONLINEARITY vs. CODE (VOLTAGE-DIVIDER) V DD = 3V MAX5494 toc INTEGRAL NONLINEARITY vs. CODE (VOLTAGE-DIVIDER) V DD = 3V MAX5494 toc6 INL (LSB) DNL (LSB) INL (LSB) V DD (V) CODE CODE RW (Ω) WIPER RESISTANCE vs. CODE (VARIABLE RESISTOR) MAX5494 toc7 RWL (kω) END-TO-END RESISTANCE vs. CODE (MAX5497/MAX5499) MAX5494 toc8 RWL (kω) END-TO-END RESISTANCE vs. CODE (MAX5496/MAX5498) MAX5494 toc CODE CODE CODE 6

7 1-Bit, Dual, Nonvolatile, Linear-Taper Typical Operating Characteristics (continued) (V DD = +5.V, V SS =, T A = +25 C, unless otherwise noted.) RW (Ω) WIPER RESISTANCE vs. WIPER VOLTAGE (VARIABLE RESISTOR) CODE IS V DD = 5V WIPER VOLTAGE (V) MAX5494 toc1 END-TO-END RESISTANCE CHANGE (%) END-TO-END RESISTANCE (R HL ) % CHANGE vs. TEMPERATURE (VOLTAGE-DIVIDER) TEMPERATURE ( C) MAX5494 toc11 WIPER-TO-END RESISTANCE CHANGE (%) WIPER-TO-END RESISTANCE (R WL ) % CHANGE vs. TEMPERATURE (VARIABLE RESISTOR) 1. CODE IS TEMPERATURE ( C) MAX5494 toc12 IDD (µa) STANDBY SUPPLY CURRENT vs. TEMPERATURE V DD = 5.25V MAX5494 toc13 IDD (µa) 1, V DD = 5V DIGITAL SUPPLY CURRENT vs. DIGITAL INPUT VOLTAGE MAX5494 toc14 RATIOMETRIC TEMPCO (ppm/ C) RATIOMETRIC TEMPERATURE COEFFICIENT vs. CODE 1kΩ 5kΩ VOLTAGE-DIVIDER V DD = 3V T A = -4 C TO +85 C MAX5494 toc TEMPERATURE ( C) DIGITAL INPUT VOLTAGE (V) CODE 7 6 VARIABLE RESISTOR TEMPERATURE COEFFICIENT vs. CODE V DD = 3V T A = -4 C TO +85 C MAX5494 toc16 TAP-TO-TAP SWITCHING TRANSIENT (MAX5494/MAX5498) MAX5494 toc17 2V/div TAP-TO-TAP SWITCHING TRANSIENT (MAX5495/MAX5499) MAX5494 toc18 2V/div 5 TCVR (ppm/ C) 4 3 V W_ 2mV/div V W_ 2mV/div 2 1 5kΩ 1kΩ CODE H_ = V DD L_ = GND FROM CODE TO CODE 1 C W_ = 1pF 1µs/div H_ = V DD L_ = GND FROM CODE TO CODE 1 C W_ = 1pF 4µs/div 7

8 1-Bit, Dual, Nonvolatile, Linear-Taper Typical Operating Characteristics (continued) (V DD = +5.V, V SS =, T A = +25 C, unless otherwise noted.) CROSSTALK 4ns/div MAX5494 toc19 V H2 = V DD V L2 = V L1 = V H1 = GND C W_ = 1pF V W2 2V/div V W1 2mV/div CROSSTALK (db) CROSSTALK vs. FREQUENCY C W_ = 1pF CODE = MAX5494/MAX FREQUENCY (khz) MAX5495/MAX5499 MAX5494 toc THD+N vs. FREQUENCY (MAX5494/MAX5498) C W_ = 1pF CODE = MAX5494 toc THD+N vs. FREQUENCY (MAX5495/MAX5499) C W_ = 1pF CODE = MAX5494 toc22 THD+N (%).1.1 THD+N (%) FREQUENCY (khz) FREQUENCY (khz) -5 WIPER RESPONSE vs. FREQUENCY (MAX5494/MAX5498) C W_ = 1pF MAX5494 toc23-5 WIPER RESPONSE vs. FREQUENCY (MAX5495/MAX5499) C W_ = 1pF MAX5494 toc24 GAIN (db) C W_ = 3pF GAIN (db) C W_ = 3pF CODE = FREQUENCY (khz) -25 CODE = FREQUENCY (khz) 8

9 1-Bit, Dual, Nonvolatile, Linear-Taper MAX5494/ MAX5495 PIN MAX5496/ MAX5497 MAX5498/ MAX5499 NAME W2 Wiper Terminal L2 Low Terminal 2 4 H2 High Terminal 2 FUNCTION Pin Descriptions Active-Low Chip-Select Input. Drive low to enable the serial interface. Drive high to disable the serial interface and put the device in standby mode. Positive Power-Supply Input. 2.7V V V DD 5.25V. Bypass with a.1µf DD capacitor from V DD to GND as close to the device as possible 6, 7,14,15 6, 7,14,15 6, 7,14,15 No Connection. Not internally connected V SS Negative Power-Supply Input. Single-supply operation: V SS = GND =. Dual-supply operation: -2.5V V SS -.2V (V SS can vary as long as (V DD - V SS ) 5.25V). Bypass with a.1µf capacitor from V SS to GND as close to the device as possible. 9 9 H1 High Terminal L1 Low Terminal W1 Wiper Terminal GND Ground Serial-Data Input. The data at synchronously loads into the serial shift register on each rising edge Serial-Clock Input. clocks in the data when is low. 4, 9 4 D.N.C Do Not Connect. Leave unconnected for proper operation. EP EP EP Exposed Pad Exposed Pad. Externally connect EP to V SS to provide a low thermal resistance path from the IC junction to the PC board or leave unconnected. 9

10 1-Bit, Dual, Nonvolatile, Linear-Taper V DD GND V SS POR SPI INTERFACE 2 x 1 BIT NVM 1-BIT LATCH 1-BIT LATCH 1 1 DECODER 124 TAPS Functional Diagrams H1 W1 L1 H2 MAX5494 MAX5495 DECODER 124 TAPS W2 L2 NOTE: THE PROGRAMMABLE VOLTAGE-DIVIDER IS NOT INTENDED FOR CURRENT TO FLOW THROUGH THE WIPER. NOTE: SEE THE MAX5494/MAX5495/MAX5498/MAX5499 PROGRAMMABLE VOLTAGE-DIVIDERS SECTION. Figure 1. MAX5494/MAX5495 Functional Diagram 1

11 1-Bit, Dual, Nonvolatile, Linear-Taper V DD GND V SS POR SPI INTERFACE MAX5496 MAX x 1 BIT NVM 1-BIT LATCH 1-BIT LATCH 1 1 Functional Diagrams (continued) DECODER DECODER 124 TAPS 124 TAPS W1 L1 W2 L2 Figure 2. MAX5496/MAX5497 Functional Diagram H1 V DD GND V SS POR 2 x 1 BIT NVM 1-BIT LATCH 1 DECODER 124 TAPS W1 SPI INTERFACE 1-BIT LATCH 1 L1 MAX5498 MAX5499 DECODER 124 TAPS W2 L2 NOTE: THE PROGRAMMABLE VOLTAGE-DIVIDER IS NOT INTENDED FOR CURRENT TO FLOW THROUGH THE WIPER. NOTE: SEE THE MAX5494/MAX5495/MAX5498/MAX5499 PROGRAMMABLE VOLTAGE-DIVIDERS SECTION. Figure 3. MAX5498/MAX5499 Functional Diagram 11

12 1-Bit, Dual, Nonvolatile, Linear-Taper Detailed Description The dual, nonvolatile, linear-taper, programmable voltage-dividers and variable resistors feature 124 tap points (1-bit resolution) (see the Functional Diagrams). These devices consist of multiple strings of equal resistor segments with a wiper contact that moves among the 124 effective tap points by a 3-wire SPI-compatible serial interface. The MAX5494/MAX5496/MAX5498 provide a total 1kΩ end-to-end resistance, and the MAX5495/MAX5497/ MAX5499 feature a 5kΩ end-to-end resistance. The MAX5494/MAX5495/MAX5498/MAX5499 allow access to the high, low, and wiper terminals for a standard voltage-divider configuration. Ensure that the terminal voltages fall between V SS and V DD. MAX5494/MAX5495/MAX5498/MAX5499 Programmable Voltage-Dividers The MAX5494/MAX5495/MAX5498/MAX5499 programmable voltage-dividers provide a weighted average of the voltage between the H_ and L_ inputs at the W_ output. The MAX5494/MAX5495/MAX5498/MAX5499 programmable voltage-divider network provides up to 124 division ratios between the H_ and L_ voltage. Ideally, the V L voltage occurs at the wiper terminal when all data bits are zeros and the V H voltage occurs at the wiper terminal when all data bits are one (see the wiper voltage equation). The step-size voltage (1 LSB) is equal to the voltage applied across terminals H and L divided by 2 1. Calculate the wiper voltage V W as follows: ( ) D V HL V FSE + V ZSE VL VZSE where D is the decimal equivalent of the 1 data bits written ( to 123), V HL is the voltage difference between the H_ and L_ terminals, and: V FSE V HL FSE = 124 V ZSE V HL ZSE = 124 The MAX5494/MAX5498 provide a 1kΩ end-to-end resistance value, while the MAX5495/MAX5499 feature a 5kΩ end-to-end resistance value. Note that the programmable voltage-divider is not intended to be used as a variable resistor. Wiper current creates a nonlinear voltage drop in series with the wiper. To ensure temperature drift remains within specifications, do not pull current through the voltage-divider wiper. Connect the wiper to a high-impedance node. Figures 4 and 5 show the behavior of the programmable voltage-divider resistance from W_ to H_ and W_ to L_, respectively. This does not apply to the variable-resistor devices. MAX5496 MAX5499 Variable Resistors The MAX5496 MAX5499 provide a programmable resistance from W_ to L_. The MAX5496/MAX5498 provide a 1kΩ end-to-end resistance value, while the MAX5497/MAX5499 feature a 5kΩ end-to-end resistance value. The programmable resolution of this RW_H_ (kω) RW_L_ (kω) CODE (DECIMAL) 5kΩ SCALES BY A FACTOR OF FIVE CODE (DECIMAL) 5kΩ SCALES BY A FACTOR OF FIVE Figure 4. Resistance from W_ to H_ vs. Code (1kΩ Voltage- Divider) Figure 5. Resistance from W_ to L_ vs. Code (1kΩ Voltage- Divider) 12

13 1-Bit, Dual, Nonvolatile, Linear-Taper resistance is equal to the nominal end-to-end resistance divided by 124 (1-bit resolution). For example, the programmable resolution is 9.8Ω and 48.8Ω for the MAX5496/MAX5498 and the MAX5497/MAX5499, respectively. The 1-bit data in the 1-bit latch register selects the wiper position from the 124 possible positions, resulting in 124 values for the resistance from W_ to L_. Calculate the resistance from W_ to L_ (R WL ) from the formula below: D RWL( D)= RW L + RZ 123 where D is decimal equivalent of the 1 data bits written, R W-L is the nominal end-to-end resistance, and R Z is the zero-scale error. Table 1 shows R WL at selected codes. SPI-Compatible Serial Interface The use a 3-wire, SPI-compatible, serial data interface (Figure 6). This write-only interface contains three inputs: chip-select (), data input (), and data clock (). Drive low to enable the serial interface and clock data synchronously into the shift register on each rising edge. The WRITE commands (C1, C = or 1) require 24 clock cycles to transfer the command and data (Figure 7a). The COPY commands (C1, C = 1 or 11) use either eight clock cycles to transfer the command bits (Figure 7b) or 24 clock cycles with 16 bits disregarded by the device (Figure 7a). After the loading of data into the shift register, drive high to latch the data into the appropriate control register (specified by RA1 and RA) and disable the serial interface. Keep low during the entire serial data stream to avoid corruption of the data. Table 2 shows the register map. Write Wiper Register The write wiper register command (C1, C = ) controls the wiper positions. The 1 data bits (D9 D) indicate the position of the wiper. For example, if =, the wiper moves to the position closest to L_. If = , the wiper moves closest to H_. Table 1. R WL at Selected Codes CODE (DECIMAL) END-TO-END RESISTANCE VALUE 1kΩ R WL (Ω) 5kΩ R WL (Ω) ,7 25, ,7 5,11 t W t O t S t CL t CH t CP t H t 1 t DS t DH Figure 6. SPI-Interface Timing Diagram 13

14 1-Bit, Dual, Nonvolatile, Linear-Taper a) 24-BIT COMMAND/DATA WORD b) 8-BIT COMMAND WORD C1 C RA1 RA C1 C RA1 RA D9 D8 D7 D6 D5 D4 D3 D2 D1 D Figure 7. SPI-Compatible Serial-Interface Format Table 2. Register Map* CLOCK EDGE Bit Name C1 C RA1 RA D9 D8 D7 D6 D5 D4 D3 D2 D1 D Write Wiper Register 1 1 D9 D8 D7 D6 D5 D4 D3 D2 D1 D Write Wiper Register 2 1 D9 D8 D7 D6 D5 D4 D3 D2 D1 D Write NV Register D9 D8 D7 D6 D5 D4 D3 D2 D1 D Write NV Register D9 D8 D7 D6 D5 D4 D3 D2 D1 D Copy Wiper Register 1 to NV Register 1 Copy Wiper Register 2 to NV Register 2 Copy Wiper Register 1 to NV Register 1 and Copy Wiper Register 2 to NV Register 2 Simultaneously Copy NV Register 1 to Wiper Register 1 Copy NV Register 2 to Wiper Register 2 Copy NV Register 1 to Wiper Register 1 and Copy NV Register 2 to Wiper Register 2 Simultaneously *D9 is the MSB and D is the LSB of the data bits

15 1-Bit, Dual, Nonvolatile, Linear-Taper The write wiper register command writes data to the volatile random access memory (RAM), leaving the NV registers unchanged. When the device powers up, the data stored in the NV registers transfers to the wiper register, moving the wiper to the stored position. Figure 8 shows how to write data to wiper register 1. Write NV Register The write NV register command (C1, C = 1) stores the position of the wiper to the NV registers for use at power-up. Alternatively, the copy wiper register to NV register command writes to the NV register. Writing to the NV register does not affect the position of the wipers. The operation takes up to 12ms (max) after goes high to complete and no other operation should be performed until completion. Figure 9 shows how to write data to the NV register 1. Copy Wiper Register to NV Register The copy wiper register to NV register command (C1, C = 1) stores the current position of the wiper to the NV register for use at power-up. Figure 1 shows how to copy data from wiper register 1 to NV register C1 C RA1 RA 1 D9 D8 D7 D6 D5 D4 D3 D2 D1 D X X X X X X ACTION WIPER REGISTER 1 UPDATED Figure 8. Write Wiper Register C1 C RA1 RA 1 1 D9 D8 D7 D6 D5 D4 D3 D2 D1 D X X X X X X t BUSY ACTION WRITE NV REGISTER 1 (DEVICE IS BUSY) Figure 9. Write NV Register 1 15

16 1-Bit, Dual, Nonvolatile, Linear-Taper Copy NV Register to Wiper Register The copy NV register to wiper register (C1, C = 11) restores the wiper position to the current value stored in the NV register. Figure 11 shows how to copy data from NV register 1 to wiper register 1. Standby Mode The feature a low-power standby mode. When the device is not being programmed, it enters into standby mode and supply current drops to.6µa (typ). Nonvolatile Memory The internal EEPROM consists of a nonvolatile register that retains the last value stored prior to power-down. The nonvolatile register is programmed to midscale at the factory. The nonvolatile memory is guaranteed for 5 years for wiper data retention and up to 2, wiper write cycles. Power-Up Upon power-up, the load the data stored in the nonvolatile wiper register into the wiper register, updating the wiper position with the data stored in the nonvolatile wiper register. Applications Information The are intended for circuits requiring digitally controlled adjustable resistance, such as LCD contrast control (where voltage biasing adjusts the display contrast), or programmable filters with adjustable gain and/or cutoff frequency C1 C RA1 RA C1 C RA1 RA t BUSY ACTION WRITE NV REGISTER 1 (DEVICE IS BUSY) ACTION WIPER REGISTER 1 UPDATED Figure 1. Copy Wiper Register 1 to NV Register 1 Figure 11. Copy NV Register 1 to Wiper Register 1 16

17 1-Bit, Dual, Nonvolatile, Linear-Taper Positive LCD Bias Control Figures 12 and 13 show an application where the voltage-divider or variable resistor is used to make an adjustable, positive LCD-bias voltage. The op amp provides buffering and gain to the resistor-divider network. Programmable Filter Figure 14 shows the configuration for a 1st-order programmable filter. The gain of the filter is adjusted by R2, and the cutoff frequency is adjusted by R3. Use the following equations to calculate the gain (G) and the 3dB cutoff frequency (f C ). 1/2 MAX5494/MAX5495 1/2 MAX5498/MAX5499 H_ L_ 5V W_ 3V MAX48 V OUT fc R1 G = 1+ R2 1 = 2π R3 C Gain and Offset Voltage Adjustment Figure 15 shows an application using the MAX5498/ MAX5499 to adjust the gain and nullify the offset voltage. 1/2 MAX5496 MAX5499 5V W_ 3V MAX48 V OUT L_ Figure 12. Positive LCD Bias Control Using a Voltage-Divider Figure 13. Positive LCD Bias Control Using a Variable Resistor C V REF V IN V OUT H_ 1/2 MAX5496 MAX5499 L_ R3 W_ R1 1/2 MAX5498/MAX5499 L_ W_ V OUT 1/2 MAX5496 MAX5499 R2 W_ 1/2 MAX5498/MAX5499 W_ L_ V IN L_ Figure 14. Programmable Filter Figure 15. Gain- and Offset-Voltage Adjustment Circuit 17

18 1-Bit, Dual, Nonvolatile, Linear-Taper PART MAX5494ETE MAX5495ETE CONFIGURATION Two programmable voltagedividers Two programmable voltagedividers END-TO-END RESISTANCE (kω) MAX5496ETE Two variable resistors 1 MAX5497ETE Two variable resistors 5 MAX5498ETE MAX5499ETE One p r og r amm ab le vol taged i vi d er and one vari ab le r esi stor One p r og r amm ab le vol taged i vi d er and one vari ab le r esi stor Selector Guide Pin Configurations (continued) Ordering Information (continued) PART TEMP RANGE PIN- PKG CODE PACKAGE MAX5496ETE -4 C to +85 C 16 TQFN-EP* T MAX5497ETE -4 C to +85 C 16 TQFN-EP* T MAX5498ETE -4 C to +85 C 16 TQFN-EP* T MAX5499ETE -4 C to +85 C 16 TQFN-EP* T *EP = Exposed pad. Chip Information TRANSISTOR COUNT: 32,262 PROCESS: BiCMOS TOP VIEW GND W1 L1 H V SS INTERFACE MAX5498 MAX V DD W2 L2 D. 5mm 5mm.8mm TQFN 18

19 1-Bit, Dual, Nonvolatile, Linear-Taper Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to QFN THIN.EPS 19

20 1-Bit, Dual, Nonvolatile, Linear-Taper Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 2 Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.