EVALUATION KIT AVAILABLE Dual, 256-Tap, Volatile, Low-Voltage Linear Taper Digital Potentiometers. S Dual, 256-Tap, Linear Taper Positions

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1 ; Rev 2; 1/1 EVAUATION KIT AVAIABE Dual, 256-Tap, Volatile, ow-voltage General Description The dual, 256-tap, volatile, low-voltage linear taper digital potentiometers offer three end-to-end resistance values of 1kI, 5kI, and 1kI. Operating from a single +2.6V to +5.5V power supply these devices provide a low 35ppm/NC end-to-end temperature coefficient. The devices feature an SPIK interface. The small package size, low supply voltage, low supply current, and automotive temperature range of the make the devices uniquely suitable for the portable consumer market, battery backup industrial applications, and the automotive market. The MAX5386 includes two digital potentiometers in a voltage-divider configuration. The MAX5388 includes one digital potentiometer in a voltage-divider configuration and one digital potentiometer in a variable-resistor configuration. The are specified over an extended -4NC to +125NC temperature range and are available in 16-pin, 3mm x 3mm TQFN or 1-pin, 3mm x 5mm FMAX M packages, respectively. ow-voltage Battery Applications Portable Electronics Applications Mechanical Potentiometer Replacement Offset and Gain Control Adjustable Voltage References/inear Regulators Automotive Electronics Functional Diagrams appear at end of data sheet. S Dual, 256-Tap, inear Taper Positions S Single +2.6V to +5.5V Supply Operation S ow (< 1µA) Quiescent Supply Current Features S 1kI, 5kI, 1kI End-to-End Resistance Values S SPI-Compatible Interface S Power-On Sets iper to Midscale S -4NC to +125NC Operating Temperature Range PART Ordering Information Note: All devices are specified over the -4 C to +125 C operating temperature range. +Denotes a lead(pb)-free/ros-compliant package. *EP = Exposed pad. PIN- PACKAGE END-TO-END RESISTANCE (ki) MAX5386ATE+ 16 TQFN-EP* 1 MAX5386MATE+ 16 TQFN-EP* 5 MAX5386NATE+ 16 TQFN-EP* 1 MAX5388AUB+ 1 FMAX 1 MAX5388MAUB+ 1 FMAX 5 MAX5388NAUB+ 1 FMAX 1 SPI is a trademark of Motorola, Inc. µmax is a registered trademark of Maxim Integrated Products, Inc. Pin Configurations TOP VIE N.C. A A A VDD B B N.C. SCK DIN MAX5386 *EP 4 B I.C N.C. N.C. GND TOP VIE GND 1 B 2 B 3 B MAX5388 µmax A A V DD SCK DIN *EP = EXPOSED PAD. TQFN Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at , or visit Maxim s website at

2 Dual, 256-Tap, Volatile, ow-voltage ABSOUTE MAXIMUM RATINGS V DD to GND...-.3V to +6V _, _, _ to GND...-.3V to the lower of (V DD +.3V) and +6V All Other Pins to GND...-.3V to +6V Continuous Current in to _, _, and _ MAX5386/MAX ±5mA MAX5386M/MAX5388M... Q2mA MAX5386N/MAX5388N... Q1mA Continuous Power Dissipation (T A = +7NC) 16 TQFN (derate 14.7m/NC above +7NC) m 1 FMAX (derate 8.8m/NC above +7NC) m Operating Temperature Range... -4NC to +125NC Junction Temperature...+15NC Storage Temperature Range NC to +15NC ead Temperature (soldering, 1s)...+3NC Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. EECTRICA CARACTERISTI (V DD = +2.6V to +5.5V, V _ = V DD, V _ = GND, T A = T MIN to T MAX, unless otherwise noted. Typical values are at V DD = +5V, T A = +25 C. ) (Note 1) PARAMETER SYMBO CONDITIONS MIN TYP MAX UNITS Resolution N 256 Tap DC PERFORMANCE (VOTAGE-DIVIDER MODE) Integral Nonlinearity IN (Note 2) SB Differential Nonlinearity DN (Note 2) SB Dual Code Matching Register A = register B SB Ratiometric Resistor Tempco (DV /V )/DT no load Q5 ppm/nc Full-Scale Error Zero-Scale Error Code = FF Code = DC PERFORMANCE (VARIABE-RESISTOR MODE) (Note 3) Integral Nonlinearity R-IN V DD > +2.6V V DD > +4.75V MAX5386/MAX MAX5386M/MAX5388M MAX5386N/MAX5388N MAX5386/MAX MAX5386M/MAX5388M MAX5386N/MAX5388N MAX5386/MAX5388 Q1. Q2.5 MAX5386M/MAX5388M Q.5 Q1. MAX5386N/MAX5388N Q.25 Q.8 MAX5386/MAX5388 Q.4 Q1.5 MAX5386M/MAX5388M Q.3 Q.75 MAX5386N/MAX5388N Q.25 Q.5 Differential Nonlinearity R-DN V DD R 2.6V SB DC PERFORMANCE (RESISTOR CARACTERISTI) V DD R 2.6V 25 6 iper Resistance (Note 4) R V DD > 4.75V 15 2 Terminal Capacitance C _, C _ Measured to GND 1 pf iper Capacitance C _ Measured to GND 5 pf End-to-End Resistor Tempco TC R No load 35 ppm/nc End-to-End Resistor Tolerance DR iper not connected % AC PERFORMANCE Crosstalk (Note 5) -9 db -3dB Bandwidth B Code = 8, 1pF load, V DD = +2.6V MAX5386/MAX MAX5386M/MAX5388M 15 MAX5386N/MAX5388N 75 2 SB SB SB I kz

3 Dual, 256-Tap, Volatile, ow-voltage EECTRICA CARACTERISTI (continued) (V DD = +2.6V to +5.5V, V _ = V DD, V _ = GND, T A = T MIN to T MAX, unless otherwise noted. Typical values are at V DD = +5V, T A = +25 C. ) (Note 1) PARAMETER SYMBO CONDITIONS MIN TYP MAX UNITS Total armonic Distortion Plus Noise TD+N Measured at, V _ = 1V RMS at 1kz.15 % iper Settling Time (Note 6) t S MAX5386M/MAX5388M 1 MAX5386/MAX POER SUPPIES MAX5386N/MAX5388N 2 Supply Voltage Range V DD V Standby Current Digital inputs = V DD or GND 1 FA DIGITA INPUTS Minimum Input igh Voltage V I 7 %V DD Maximum Input ow Voltage V I 3 %V DD Input eakage Current FA Input Capacitance 5 pf TIMING CARACTERISTI (Note 7) Maximum SCK Frequency f MAX 1 Mz SCK Clock Period t CP 1 ns SCK Pulse-idth igh t C 4 ns SCK Pulse-idth ow t C 4 ns Fall to SCK Rise Setup Time t S 4 ns SCK Rise to Rise old Time t ns DIN Setup Time t DS 4 ns DIN old Time t D ns SCK Rise to Fall Delay t 1 ns SCK Rise to SCK Rise old Time t 1 4 ns Pulse-idth igh t 1 ns Note 1: All devices are 1% production tested at T A = +25 C. Specifications over temperature limits are guaranteed by design and characterization. Note 2: DN and IN are measured with the potentiometer configured as a voltage-divider (Figure 1) with = V DD and = GND. The wiper terminal is unloaded and measured with an ideal voltmeter. Note 3: R-DN and R-IN are measured with the potentiometer configured as a variable resistor (Figure 1). DN and IN are measured with the potentiometer configured as a variable resistor. _ is unconnected and _ = GND. For V DD = +5V, the wiper terminal is driven with a source current of 4µA for the 1kI configuration, 8µA for the 5kI configuration, and 4µA for the 1kI configuration. For V DD = +2.6V, the wiper terminal is driven with a source current of 2µA for the 1kI configuration, 4µA for the 5kI configuration, and 2µA for the 1kI configuration. Note 4: The wiper resistance is the worst value measured by injecting the currents given in Note 3 in to with = GND. R = (V - V )/I. Note 5: Drive A with a 1kz GND to V DD amplitude tone. A = B = GND. No load. B is at midscale with a 1pF load. Measure B. Note 6: The wiper-settling time is the worst case to 5% rise time, measured between tap and tap 127. = V DD, = GND, and the wiper terminal is loaded with 1pF capacitance to ground. Note 7: Digital timing is guaranteed by design and characterization, not production tested. ns 3

4 Dual, 256-Tap, Volatile, ow-voltage (V DD = 5V, T A = +25 C, unless otherwise noted.) SUPPY CURRENT (µa) SUPPY CURRENT vs. TEMPERATURE V DD = 2.6V V DD = 5V TEMPERATURE ( C) MAX5386 toc1 SUPPY CURRENT (ma) SUPPY CURRENT vs. DIGITA INPUT VOTAGE V DD = 5V V DD = 2.6V DIGITA INPUT VOTAGE (V) Typical Operating Characteristics MAX5386 toc2 IDD (µa) SUPPY CURRENT vs. SUPPY VOTAGE V DD (V) MAX5386 toc , 1, -TO- RESISTANCE (kω) RESISTANCE ( TO ) vs. (1kΩ) MAX5386 toc4 -TO- RESISTANCE (kω) 55, 5, 45, 4, 35, 3, 25, 2, 15, RESISTANCE ( TO ) vs. (5kΩ) MAX5386 toc5 RESISTANCE (-TO-) (ki) 11k 1k 9k 8k 7k 6k 5k 4k 3k RESISTANCE (-TO-) vs. (1kI) MAX5386 toc6 2 1, 2k 1 5 1k IPER RESISTANCE (Ω) IPER RESISTANCE vs. IPER VOTAGE (1kΩ) V DD = 5V V DD = 2.6V MAX5386 toc7 END-TO-END RESISTANCE % CANGE END-TO-END RESISTANCE % CANGE vs. TEMPERATURE 1kI 1kI 5kI MAX5386 toc8 DN (SB) VARIABE-RESISTOR DN vs. (1kI) I IPER = 4µA MAX5386 toc IPER VOTAGE TEMPERATURE (NC)

5 Dual, 256-Tap, Volatile, ow-voltage (V DD = 5V, T A = +25 C, unless otherwise noted.) DN (SB) VARIABE-RESISTOR DN vs. (5kI) I IPER = 8µA MAX5386 toc1 DN (SB) Typical Operating Characteristics (continued) VARIABE-RESISTOR DN vs. (1kI) I IPER = 4µA MAX5386 toc11 IN (SB) VARIABE-RESISTOR IN vs. (1kI) I IPER = 4µA MAX5386 toc VARIABE-RESISTOR IN vs. (5kI) I IPER = 8µA MAX5386 toc VARIABE-RESISTOR IN vs. (1kI) I IPER = 4µA MAX5386 toc VOTAGE-DIVIDER DN vs. (1kI) MAX5386 toc IN (SB) IN (SB) DN (SB) VOTAGE-DIVIDER DN vs. (5kI) MAX5386 toc VOTAGE-DIVIDER DN vs. (1kI) MAX5386 toc VOTAGE-DIVIDER IN vs. (1kI) MAX5386 toc DN (SB) DN (SB) IN (SB)

6 Dual, 256-Tap, Volatile, ow-voltage (V DD = 5V, T A = +25 C, unless otherwise noted.) IN (SB) VOTAGE-DIVIDER IN vs. (5kI) MAX5386 toc19 IN (SB) Typical Operating Characteristics (continued) VOTAGE-DIVIDER IN vs. (1kI) MAX5386 toc2 TAP-TO-TAP SITCING TRANSIENT (CODE 127 TO 128) (MAX5386) 2ns/div MAX5386 toc21 V - 2mV/div 5V/div TAP-TO-TAP SITCING TRANSIENT (CODE 128 TO 128) (MAX5386M) MAX5386 toc22 TAP-TO-TAP SITCING TRANSIENT (CODE 127 TO 128) (MAX5386N) MAX5386 toc23 MAX5386 POER-ON IPER TRANSIENT CODE TO 128 MAX5386 toc24 V - 2mV/div V - 2mV/div OUTPUT 2V/div 5V/div 5V/div V DD 2V/div 4ns/div 1µs/div 2µs/div GAIN (db) MIDSCAE FREQUENCY RESPONSE V IN = 1V P-P C = 1pF MAX5386 MAX5386M MAX5386N MAX5386 toc25 CROSSTAK (db) CROSSTAK vs. FREQUENCY MAX5386 MAX5386N MAX5386M MAX5386 toc26 TD+N (%) TD+N vs. FREQUENCY MAX5386M MAX5386N MAX5386 MAX5386 toc , 1, FREQUENCY (kz) FREQUENCY (kz) FREQUENCY (kz) 6

7 MAX5386 PIN MAX5388 Dual, 256-Tap, Volatile, ow-voltage NAME 1 3 B 2 4 B Resistor B iper Terminal 3 2 B FUNCTION Pin Description Resistor B igh Terminal. The voltage at B can be higher or lower than the voltage at B. Current can flow in to or out of B. Resistor B ow Terminal. The voltage at B can be higher or lower than the voltage at B. Current can flow in to or out of B. 4 I.C. Internally Connected. Connect to GND. 5 1 GND Ground. Both pins must be grounded. 6, 7, 11, 13 N.C. No Connection. Not internally connected. 8 5 Active-ow Chip-Select Input 9 6 DIN Serial-Interface Data Input 1 7 SCK Serial-Interface Clock Input 12 8 V DD Power-Supply Input. Bypass V DD to GND with a.1µf capacitor close to the device. 14 A 15 9 A Resistor A iper Terminal 16 1 A Resistor A igh Terminal. The voltage at A can be higher or lower than the voltage at A. Current can flow in to or out of A. Resistor A ow Terminal. The voltage at A can be higher or lower than the voltage at A. Current can flow in to or out of A. EP Exposed Pad (TQFN Only). Internally connected to GND. Connect to ground. VOTAGE-DIVIDER CONFIGURATION VARIABE-RESISTOR CONFIGURATION N.C. Figure 1. Voltage-Divider/Variable-Resistor Configurations 7

8 Dual, 256-Tap, Volatile, ow-voltage Detailed Description The dual, 256-tap, volatile low-voltage linear taper digital potentiometers offer three end-toend resistance values of 1kI, 5kI, and 1kI. Each potentiometer consists of 255 fixed resistors in series between terminals and. The potentiometer wiper,, is programmable to access anyone of the 256 tap points on the resistor string. The potentiometers in each device are programmable independently of each other. The have an SPI interface. SPI Digital Interface The include an SPI interface, which provides a 3-wire write-only serial data interface to control the wiper tap position through inputs chip select (), data in (DIN), and data clock (SCK). Drive low to load data from DIN synchronously into the serial shift register on the rising edge of each SCK pulse. The load the last 9 bits of clocked data once transitions high. See Figures 2 and 3. After all the data bits are shifted in, data are latched into the appropriate potentiometer control register when goes from low to high. Data written to a memory register immediately updates the wiper position. Keep low during the entire data stream to prevent the data from being terminated. The first bit A (address bit) addresses one of the two potentiometers; writing a zero in A addresses control register A and writing a one in A addresses control register B. See Table 1. The power-on reset (POR) circuitry sets the wiper to midscale (D[7:] 1 ). The 8 data bits (D7 D) indicate the position of the wiper. For D[7:] =, the wiper moves to the position closest to. For D[7:] = , the wiper moves closest to. D[7:] is 1 following poweron for both registers A and B. Register A: The data byte writes to register A, and the wiper of potentiometer A moves to the appropriate position at the rising edge of. D[7:] indicates the position of the wiper. D[7:] = moves the wiper to the position closest to. D[7:] = moves the wiper to the position closest to. D[7:] is 1 following power-on. Register B: The data byte writes to register B, and the wiper of potentiometer B moves to the appropriate position at the rising edge of. D[7:] indicates the position of the wiper. D[7:] = moves the wiper to the position closest to. D[7:] = moves the wiper to the position closest to. D[7:] is 1 following power-on. Table 1. SPI Register Map Bit Number Bit Name A D7 D6 D5 D4 D3 D2 D1 D rite iper Register A D7 D6 D5 D4 D3 D2 D1 D rite iper Register B 1 D7 D6 D5 D4 D3 D2 D1 D 8

9 Dual, 256-Tap, Volatile, ow-voltage SCK COMMAND STARTED 9 BITS DIN A D7 D6 D5 D4 D3 D2 D D1 IPER REGISTER OADED Figure 2. SPI Digital Interface Format t t 1 t O ts t C t C t CP t t D SCK t DS DIN Figure 3. SPI Timing Diagram 9

10 Dual, 256-Tap, Volatile, ow-voltage Applications Information Variable-Gain Amplifier Figure 4 shows a potentiometer adjusting the gain of a noninverting amplifier. Figure 5 shows a potentiometer adjusting the gain of an inverting amplifier. V IN V OUT Adjustable Dual inear Regulator Figure 6 shows an adjustable dual linear regulator using a dual potentiometer as two variable resistors. Adjustable Voltage Reference Figure 7 shows an adjustable voltage reference circuit using a potentiometer as a voltage-divider. V+ IN MAX8866 OUT1 OUT2 SET1 V OUT1 V OUT2 SET2 Figure 4. Variable-Gain Noninverting Amplifier Figure 6. Adjustable Dual inear Regulator +5V V IN IN OUT MAX616 V REF V OUT GND Figure 5. Variable-Gain Inverting Amplifier Figure 7. Adjustable Voltage Reference 1

11 Dual, 256-Tap, Volatile, ow-voltage Variable Gain Current to Voltage Converter Figure 8 shows a variable gain current-to-voltage converter using a potentiometer as a variable resistor. CD Bias Control Figure 9 shows a positive CD bias control circuit using a potentiometer as a voltage-divider. IS R3 R1 R2 Programmable Filter Figure 1 shows a programmable filter using a dual potentiometer. Offset Voltage Adjustment Circuit Figure 11 shows an offset voltage adjustment circuit using a dual potentiometer. VIN B R3 B B A R1 VOUT VOUT A R2 VOUT = IS x ((R3 x (1 + R2/R1)) + R2) A Figure 8. Variable Gain I-to-V Converter Figure 1. Programmable Filter +5V A +5V A A +3V VOUT VOUT B B B Figure 9. Positive CD Bias Control Using a Voltage-Divider Figure 11. Offset Voltage Adjustment Circuit 11

12 Dual, 256-Tap, Volatile, ow-voltage B B B A A 256 DECODER 256 DECODER A V DD MAX5386 ATC SPI POR ATC GND SCK DIN Functional Diagrams A A V DD MAX5388 B 256 DECODER ATC SCK POR SPI B 256 DECODER ATC DIN B GND PROCESS: BiCMOS Chip Information Package Information For the latest package outline information and land patterns, go to PACKAGE TYPE PACKAGE CODE DOCUMENT NO. 1 µmax U TQFN-EP T

13 Dual, 256-Tap, Volatile, ow-voltage REVISION NUMBER REVISION DATE DESCRIPTION Revision istory PAGES CANGED 4/9 Initial release 1 11/9 2 1/1 Released MAX5386ATE+ and MAX5386NATE+ in Ordering Information; corrected specifications for Full-Scale Error, Zero-Scale Error, and Integral Nonlinearity in Electrical Characteristics; added I.C. row to Pin Description; corrected Figure 1 Released the MAX5388AUB+, MAX5388MAUB+, MAX5388NAUB+ + in Ordering Information. 1, 2, 7 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, 12 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.