Dual, 256-Tap, Nonvolatile, SPI-Interface, Linear-Taper Digital Potentiometers

Transcription

1 9-7; Rev ; /7 EVAUATION KIT AVAIABE Dual, 56-Tap, Nonvolatile, SPI-Interface, General Description The dual, linear-taper, digital potentiometers function as mechanical potentiometers with a simple -wire SPI -compatible digital interface that programs the wipers to any one of 56 tap positions. These digital potentiometers feature a nonvolatile memory (EEPROM) to return the wipers to their previously stored positions upon power-up. The MAX57 has an end-to-end resistance of kω, while the MAX5 and MAX59 have resistances of 5kΩ and kω, respectively. These devices have a low 5ppm/ C end-to-end temperature coefficient, and operate from a single +.7V to +5.5V supply. The are available in 6-pin mm x mm x.mm thin QFN or -pin TSSOP packages. Each device is guaranteed over the extended - C to +5 C temperature range. Applications CD Screen Adjustment Audio Volume Control Mechanical Potentiometer Replacement ow-drift Programmable Filters ow-drift Programmable-Gain Amplifiers PART TEMP RANGE PIN-PACKAGE Features Wiper Position Stored in Nonvolatile Memory (EEPROM) and Recalled Upon Power-Up or Recalled by an Interface Command mm x mm x.mm, 6-Pin Thin QFN or -Pin TSSOP Packages ± SB IN, ±.5 SB DN (Voltage-Divider Mode) 56 Tap Positions 5ppm/ C End-to-End Resistance Temperature Coefficient 5ppm/ C Ratiometric Temperature Coefficient kω, 5kΩ, and kω End-to-End Resistance Values SPI-Compatible Serial Interface Reliability, Wiper Store Cycles 5-Year Wiper Data Retention +.7V to +5.5V Single-Supply Operation SPI is a trademark of Motorola, Inc. Ordering Information/Selector Guide END-TO-END RESISTANCE (kω) TOP MARK PKG CODE MAX57ETE - C to +5 C 6 Thin QFN-EP* ABR T6F MAX57EUD** - C to +5 C TSSOP U- *EP = Exposed pad. **Future product contact factory for availabilty. Ordering Information/Selector Guide continued at end of data sheet. V DD GND SCK DIN SPI INTERFACE -BIT ATCH 6-BIT NV RAM -BIT ATCH Functional Diagram POR MAX57 MAX5 MAX59 DECODER DECODER HA WA A HB WB B TOP VIEW A WA HA I.C. 5 6 HB VDD SCK WB B Pin Configurations DIN N.C. 9 MAX57 MAX5 MAX59 THIN QFN mm x mm I.C. GND N.C. N.C. Pin Configurations continued at end of data sheet. Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 ABSOUTE MAXIMUM RATINGS V DD to GND...-.V to +6.V All Other Pins to GND...-.V to the lower of (V DD +.V) and +6.V Maximum Continuous Current into H_, W_, and _ MAX57...±5.mA MAX5...±.mA MAX59...±.6mA Continuous Power Dissipation (T A = +7 C) 6-Pin Thin QFN (derate 7.5mW/ C above +7 C)...9mW -Pin TSSOP (derate 9.mW/ C above +7 C)...77mW Operating Temperature Range...- C to +5 C Junction Temperature...+5 C Storage Temperature Range...-6 C to +5 C ead Temperature (soldering, s)...+ C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. DC EECTRICA CHARACTERISTI (V DD = +.7V to +5.5V, V H = V DD, V = GND, T A = - C to +5 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +5 C, unless otherwise noted.) (Note ) PARAMETER SYMBO CONDITIONS MIN TYP MAX UNITS DC PERFORMANCE (Voltage-Divider Mode, Figure ) Resolution N 56 Taps Integral Nonlinearity IN (Note ) ± SB Differential Nonlinearity DN (Note ) ±.5 SB Dual-Code Matching Register A = register B SB End-to-End Resistor Tempco TC R 5 ppm/ C Ratiometric Resistor Tempco 5 ppm/ C Full-Scale Error Zero-Scale Error DC PERFORMANCE (Variable-Resistor Mode, Figure ) MAX MAX MAX MAX MAX MAX59. Resolution 56 Taps Integral Nonlinearity (Note ) Differential Nonlinearity (Note ) DC PERFORMANCE (Resistor Characteristics) V DD = 5.V ±.5 V DD =.V ± V DD = 5.V ± V DD =.V ± V DD = 5.V 5 Wiper Resistance (Note ) R W V DD =.V SB SB SB SB Ω Wiper Capacitance C W 5 pf MAX End-to-End Resistance R H MAX MAX kω

3 DC EECTRICA CHARACTERISTI (continued) (V DD = +.7V to +5.5V, V H = V DD, V = GND, T A = - C to +5 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +5 C, unless otherwise noted.) (Note ) DIGITA INPUTS PARAMETER SYMBO CONDITIONS MIN TYP MAX UNITS V DD =.6V to 5.5V. Input High Voltage (Note 5) V IH.7 x V V DD =.7V to.6v V DD Input ow Voltage V I V DD =.7V to 5.5V (Note 5). V Input eakage Current I IN ±. µa Input Capacitance C IN 5. pf AC PERFORMANCE Crosstalk -db Bandwidth Total Harmonic Distortion TIMING CHARACTERISTI (Analog) BW THD f H_ = khz, _ = GND, measurement at W_ (Note 6) Wiper at midscale C W_ = pf Wiper-Settling Time t S Code to 7 (Note 7) TIMING CHARACTERISTI (Digital, Figure, Note ) V H_ = V RMS at khz, _ = GND, measurement at W_ MAX57 5 MAX5 9 MAX59 5 MAX57.5 MAX5.75 MAX db khz. % SCK Frequency 5 MHz SCK Clock Period t CP ns SCK Pulse-Width High t CH ns SCK Pulse-Width ow t C ns Fall to SCK Rise Setup t S ns SCK Rise to Rise Hold t H ns DIN to SCK Setup t DS 5 ns DIN Hold after SCK t DH ns SCK Rise to Fall Delay t ns Rise to SCK Rise Hold t ns Pulse-Width High t W ns Write NV Register Busy Time t BUSY ms Read NV Register Access Time t ACC µs W r i te W i p er Reg i ster to O utp ut D el ay t WO µs NONVOATIE MEMORY REIABIITY Data Retention T A = +5 C 5 Years Endurance T A = +5 C, T A = +5 C 5, µs Stores

4 DC EECTRICA CHARACTERISTI (continued) (V DD = +.7V to +5.5V, V H = V DD, V = GND, T A = - C to +5 C, unless otherwise noted. Typical values are at V DD = +5.V, T A = +5 C, unless otherwise noted.) (Note ) POWER SUPPIES PARAMETER SYMBO CONDITIONS MIN TYP MAX UNITS Power-Supply Voltage V DD V Supply Current I DD During write cycle only, digital inputs = V DD or GND µa Standby Current Digital inputs = V DD or GND, T A = +5 C.5 µa Note : All devices are production tested at T A = +5 C and are guaranteed by design and characterization for - C < T A < +5 C. Note : DN and IN are measured with the potentiometer configured as a voltage-divider with H_ = V DD and _ =. The wiper terminal is unloaded and measured with an ideal voltmeter. Note : DN and IN are measured with the potentiometer configured as a variable resistor. H_ is unconnected and _ =. For V DD = +5V, the wiper terminal is driven with a source current of µa for the kω configuration, µa for the 5kΩ configuration, and µa for the kω configuration. For V DD = +V, the wiper terminal is driven with a source current of µa for the kω configuration, µa for the 5kΩ configuration, and µa for the kω configuration. Note : The wiper resistance is the worst value measured by injecting the currents given in Note into W_ with _ = GND. R W = (V W - V H ) / I W. Note 5: The device draws higher supply current when the digital inputs are driven with voltages between (V DD -.5V) and (GND +.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics section. Note 6: Wiper at midscale with a pf load. Note 7: Wiper-settling time is the worst-case -to-5% rise time, measured between tap and tap 7. H_ = V DD, _ = GND, and the wiper terminal is unloaded and measured with a pf oscilloscope probe (see Tap-to-Tap Switching Transient in the Typical Operating Characteristics section). Note : Digital timing is guaranteed by design and characterization, and is not production tested. VOTAGE-DIVIDER CONFIGURATION H VARIABE-RESISTOR CONFIGURATION H W Figure. Voltage-Divider/Variable-Resistor Configurations

5 (V DD = +5.V, T A = +5 C, unless otherwise noted.) SUPPY CURRENT (μa) V DD = 5V V DD = V SUPPY CURRENT vs. TEMPERATURE TEMPERATURE ( C) TAP-TO-TAP SWITCHING TRANSIENT (MAX57) V H_ = 5.V MAX57-9 toc MAX57-9 toc.v/div SUPPY CURRENT (μa),.v/div SUPPY CURRENT vs. DIGITA INPUT VOTAGE V CC = V V CC = 5V 5 DIGITA INPUT VOTAGE (V) TAP-TO-TAP SWITCHING TRANSIENT (MAX5) MAX57-9 toc5 V H_ = 5.V Typical Operating Characteristics MAX57-9 toc WIPER RESISTANCE (Ω) V/div WIPER RESISTANCE vs TAP-TO-TAP SWITCHING TRANSIENT (MAX59) MAX57-9 toc6 V H_ = 5.V MAX57-9 toc WIPER mv/div WIPER mv/div WIPER mv/div μs/div.μs/div.μs/div V DD.V/div WIPER.V/div WIPER TRANSIENT AT POWER-ON V H_ = V DD.μs/div MAX57-9 toc7 GAIN (db) MIDSCAE FREQUENCY RESPONSE (MAX57) MAX57-9 toc C W = pf C W_ = 5pF FREQUENCY (khz) 5

6 Typical Operating Characteristics (continued) (V DD = +5.V, T A = +5 C, unless otherwise noted.) GAIN (db) IN (SB) MIDSCAE FREQUENCY RESPONSE (MAX5) -5 C W_ = pf - -5 C W_ = 5pF FREQUENCY (khz) VARIABE-RESISTOR IN vs. (MAX5) MAX57-9 toc9 MAx57-9 toc GAIN (db) DN (SB) MIDSCAE FREQUENCY RESPONSE (MAX59) -5 C W_ = pf - -5 C W_ = 5pF FREQUENCY (khz) VOTAGE-DIVIDER DN vs. (MAX57) MAX57-9 toc MAX57-9 toc DN (SB) IN (SB) VARIABE-RESISTOR DN vs. (MAX5) VOTAGE-DIVIDER IN vs. (MAX57) MAx57-9 toc MAX57-9 toc DN (SB) VOTAGE-DIVIDER DN vs. (MAX5) MAx57-9 toc5 IN (SB) VOTAGE-DIVIDER IN vs. (MAX5) MAx57-9 toc

7 Typical Operating Characteristics (continued) (V DD = +5.V, T A = +5 C, unless otherwise noted.) DN (SB) IN (SB) VARIABE-RESISTOR DN vs. (MAX59) VOTAGE-DIVIDER IN vs. (MAX59) MAx57-9 toc7 MAx57-9 toc IN (SB) CROSSTAK (db) VARIABE-RESISTOR IN vs. (MAX59) C W_ = pf CROSSTAK vs. FREQUENCY MAX59 MAX5 MAX57 -. FREQUENCY (khz) MAx57-9 toc MAX57-9 toc DN (SB) RESISTANCE CHANGE (%) VOTAGE-DIVIDER DN vs. (MAX59) END-TO-END RESISTANCE CHANGE vs. TEMPERATURE (MAX57) TEMPERATURE ( C) MAx57-9 toc9 MAX57-9 toc RESISTANCE CHANGE (%) END-TO-END RESISTANCE CHANGE vs. TEMPERATURE (MAX5) TEMPERATURE ( C) MAX57-9 toc RESISTANCE CHANGE (%) END-TO-END RESISTANCE CHANGE vs. TEMPERATURE (MAX59) TEMPERATURE ( C) MAX57-9 toc 7

8 PIN TQFN TSSOP NAME FUNCTION V DD Power Supply. Bypass to GND with a.µf capacitor as close to the device as possible. SCK Serial-Interface Clock Input DIN Serial-Interface Data Input Active-ow Chip-Select Digital Input 5, 6, 9 7, 9, N.C. No Connection. Not internally connected. 7 GND Ground, 6 I.C. Internally connected to EP. eave unconnected. 6 B ow Terminal of Resistor B. The voltage at can be greater than or less than the voltage at H. Current can flow into or out of. 5 WB Wiper Terminal of Resistor B HB Pin Description High Terminal of Resistor B. The voltage at H can be greater than or less than the voltage at. Current can flow into or out of H. A ow Terminal of Resistor A. The voltage at can be greater than or less than the voltage at H. Current can flow into or out of. WA Wiper Terminal of Resistor A 5 HA High Terminal of Resistor A. The voltage at H can be greater than or less than the voltage at. Current can flow into or out of H. EP EP Exposed Pad. Internally connected to pins and 6. eave unconnected. Detailed Description The contain two resistor arrays, with 55 resistive elements each. The MAX57 has an end-to-end resistance of kω, while the MAX5 and MAX59 have resistances of 5kΩ and kω, respectively. The allow access to the high, low, and wiper terminals on both potentiometers for a standard voltage-divider configuration. Connect the wiper to the high terminal, and connect the low terminal to ground, to make the device a variable resistor (see Figure ). A simple -wire serial interface programs either wiper directly to any of the 56 tap points. The nonvolatile memory stores the wiper position prior to power-down and recalls the wiper to the same point upon power-up or by using an interface command (see Table ). The nonvolatile memory is guaranteed for, wiper store cycles and 5 years for wiper data retention. SPI Digital Interface The use a -wire SPIcompatible serial data interface (Figures and ). This write-only interface contains three inputs: chip-select (), data clock (SCK), and data in (DIN). Drive low to enable the serial interface and clock data synchronously into the shift register on each SCK rising edge. The WRITE commands (C, C = or ) require 6 clock cycles to clock in the command, address, and data (Figure a). The COPY commands (C, C =, ) can use either eight clock cycles to transfer only command and address bits (Figure b) or 6 clock cycles, with the device disregarding data bits (Figure a). After loading data into the shift register, drive high to latch the data into the appropriate potentiometer control register and disable the serial interface. Keep low during the entire serial data stream to avoid corruption of the data. Digital-Interface Format The data format consists of three elements: command bits, address bits, and data bits (see Table and Figure ). The command bits (C and C) indicate the action to be taken such as changing or storing the wiper position. The address bits (A and A) specify which potentiometer the command affects and the data bits (D7 to D) specify the wiper position.

9 Table. Register Map COCK EDGE C C A A D7 D6 D5 D D D D D Write Wiper Register A D7 D6 D5 D D D D D Write Wiper Register B D7 D6 D5 D D D D D Write NV Register A D7 D6 D5 D D D D D Write NV Register B D7 D6 D5 D D D D D Copy Wiper Register A to NV Register A Copy Wiper Register B to NV Register B Copy Both Wiper Registers to NV Registers Copy NV Register A to Wiper Register A Copy NV Register B to Wiper Register B Copy Both NV Registers to Wiper Registers t O t S t C t CH t CP t H t W t SCK t DS t DH DIN Figure. Timing Diagram Write-Wiper Register (Command ) Data written to the write-wiper registers (C, C = ) controls the wiper positions. The data bits (D7 to D) indicate the position of the wiper. For example, if DIN =, the wiper moves to the position closest to _. If DIN =, the wiper moves closest to H_. This command writes data to the volatile RAM, leaving the NV registers unchanged. When the device powers up, the data stored in the NV registers transfers to the volatile wiper register, moving the wiper to the stored position. Write-NV Register (Command ) This command (C, C = ) stores the position of the wipers to the NV registers for use at power-up. Alternatively, the copy wiper register to NV register command can be used to store the position of the wipers to the NV registers. Writing to the NV registers does not affect the position of the wipers. Copy Wiper Register to NV Register (Command ) This command (C, C = ) stores the current position of the wiper to the NV register, for use at power-up. 9

10 A) 6-BIT COMMAND/DATA WORD SCK DIN B) -BIT COMMAND WORD SCK DIN Figure. Digital-Interface Format This command may affect one potentiometer at a time, or both simultaneously, depending on the state of A and A. Alternatively, the write NV register command can be used to store the current position of the wiper to the NV register. Copy NV Register to Wiper Register (Command ) This command (C, C = ) restores the wiper position to the previously stored position in the NV register. This command may affect one potentiometer at a time, or both simultaneously, depending on the state of A and A. Nonvolatile Memory The internal EEPROM consists of a nonvolatile register that retains the last stored value prior to power-down. The nonvolatile register is programmed to midscale at the factory. The nonvolatile memory is guaranteed for, wiper write cycles and 5 years for wiper data retention. Power-Up Upon power-up, the load the data stored in the nonvolatile wiper register into the volatile memory register, updating the wiper position with the data stored in the nonvolatile wiper register. This initialization period takes 5µs C C A A D7 D6 D5 D D D D D 5 C C A A 6 7 Standby The feature a low-power standby mode. When the device is not being programmed, it enters into standby mode and supply current drops to.5µa (typ). Applications Information The are ideal for circuits requiring digitally controlled adjustable resistance, such as CD contrast control (where voltage biasing adjusts the display contrast), or for programmable filters with adjustable gain and/or cutoff frequency. Positive CD Bias Control Figures and 5 show an application where the provide an adjustable, positive CD-bias voltage. The op amp provides buffering and gain to the resistor-divider network made by the potentiometer (Figure ) or by a fixed resistor and a variable resistor (Figure 5). Programmable Filter Figure 6 shows the in a st-order programmable-filter application. Adjust the gain of the filter with R, and set the cutoff frequency with R. 5 6

11 MAX57 MAX5 MAX59 5V H W_ V OUT Figure. Positive CD-Bias Control Using a Voltage-Divider MAX57 MAX5 MAX59 H 5V W_ V MAX V MAX V OUT Use the following equations to calculate the gain (A) and the -db cutoff frequency (f C ): Adjustable Voltage Reference Figure 7 shows the used as the feedback resistors in multiple adjustable voltage-reference applications. Independently adjust the output voltages of the MAX66s from.v to V IN -.V by changing the wiper positions of the MAX57/ MAX5/MAX59. Offset Voltage and Gain Adjustment Connect the high and low terminals of one potentiometer of a to the NU inputs of a MAX, and connect the wiper to the op amp s positive supply to nullify the offset voltage over the operating temperature range. Install the other potentiometer in the feedback path to adjust the gain of the MAX (see Figure ). Chip Information TRANSISTOR COUNT:,77 PROCESS: BiCMOS R A = + R f C = π R C Figure 5. Positive CD-Bias Control Using a Variable Resistor Pin Configurations (continued) V IN HA R WA A C V+ MAX V OUT TOP VIEW HA WA V DD SCK / MAX57 / MAX5 / MAX59 R, R = R H x D / 56 WHERE R H = END-TO-END RESISTANCE AND D = DECIMA VAUE OF WIPER CODE / MAX57 / MAX5 / MAX59 R HB B V- R WB A HB WB B N.C MAX57 MAX5 MAX59 TSSOP 9 DIN N.C. N.C. GND Figure 6. Programmable Filter

12 5V IN MAX66 GND OUT ADJ WA Figure 7. Adjustable Voltage Reference HB 7 5V MAX HA R WA HA R A V OUT / MAX57 / MAX5 / MAX59 / 6 A R = R H x D / 56 WHERE R H = END-TO-END RESISTANCE AND = D DECIMA VAUE OF WIPER CODE IN MAX66 GND OUT ADJ WB HB R B V OUT / MAX57 / MAX5 / MAX59 V OUT_ =.V x kω R V OUT_ =.V x 5kΩ R V OUT_ =.V x kω R FOR THE MAX57 FOR THE MAX5 FOR THE MAX59 R = R H x D / 56 WHERE R H = END-TO-END RESISTANCE AND D = DECIMA VAUE OF WIPER CODE Revision History Pages changed at Rev:,,, 5 R WB / B Figure. Offset Voltage and Gain Adjustment Ordering Information/Selector Guide (continued) PART TEMP RANGE PIN-PACKAGE END-TO-END RESISTANCE (kω) TOP MARK PKG CODE MAX5ETE - C to +5 C 6 Thin QFN-EP* 5 ABS T6F MAX5EUD** - C to +5 C TSSOP 5 U- MAX59ETE - C to +5 C 6 Thin QFN-EP* ABT T6F MAX59EUD** - C to +5 C TSSOP U- *EP = Exposed pad **Future product contact factory for availabilty.

13 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to TSSOP.mm.EPS PACKAGE OUTINE, TSSOP.mm BODY -66 I

14 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to MARKING D D/ E/ E AAAA. C. C C A A A C C e (ND - ) X e e k (NE - ) X e E E/ e C D/ b D. M C A B PACKAGE OUTINE,, 6 THIN QFN, xx.mm -6 I x6 QFN THIN.EPS PKG x x REF. MIN. NOM. MAX. MIN. NOM. MAX. A b D E e.65 BSC..5 BSC N ND NE A A. REF. REF k x MIN. NOM. MAX BSC REF PKG. CODES MIN. EXPOSED PAD VARIATIONS D E PIN ID NOM. MAX. MIN. NOM. MAX. JEDEC TQ x 5 WEEC T x 5 WEED- T x 5 WEED- T-.95 T x 5.5 WEED- T6F-.65 T x 5 WEED x 5 WEED- T6FH x WEED-.5.5 x 5 WEED T x 5 WEED- NOTES:. DIMENSIONING & TOERANCING CONFORM TO ASME Y.5M-99.. A DIMENSIONS ARE IN MIIMETERS. ANGES ARE IN DEGREES.. N IS THE TOTA NUMBER OF TERMINAS.. THE TERMINA # IDENTIFIER AND TERMINA NUMBERING CONVENTION SHA CONFORM TO JESD 95- SPP-. DETAIS OF TERMINA # IDENTIFIER ARE OPTIONA, BUT MUST BE OCATED WITHIN THE ZONE INDICATED. THE TERMINA # IDENTIFIER MAY BE EITHER A MOD OR MARKED FEATURE. 5. DIMENSION b APPIES TO METAIZED TERMINA AND IS MEASURED BETWEEN. mm AND.5 mm FROM TERMINA TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINAS ON EACH D AND E SIDE RESPECTIVEY. 7. DEPOPUATION IS POSSIBE IN A SYMMETRICA FASHION.. COPANARITY APPIES TO THE EXPOSED HEAT SINK SUG AS WE AS THE TERMINAS. 9. DRAWING CONFORMS TO JEDEC MO REVISION C.. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONY.. NUMBER OF EADS SHOWN ARE FOR REFERENCE ONY.. WARPAGE NOT TO EXCEED.mm. PACKAGE OUTINE,, 6 THIN QFN, xx.mm -6 I

15 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to PKG REF. A b D E e N ND NE A A k x MIN. NOM. MAX BSC REF - - x MIN. NOM. MAX BSC REF x MIN. NOM. MAX BSC REF PKG. CODES MIN. EXPOSED PAD VARIATIONS D NOM. MAX. MIN. E NOM. MAX. PIN ID JEDEC TQ x 5 WEEC T x 5 WEED- T x 5 WEED- T-.95 T x 5 WEED- T6F-.65 T x 5 WEED x 5 WEED- T6FH x 5 WEED- NOTES:. DIMENSIONING & TOERANCING CONFORM TO ASME Y.5M-99.. A DIMENSIONS ARE IN MIIMETERS. ANGES ARE IN DEGREES.. N IS THE TOTA NUMBER OF TERMINAS.. THE TERMINA # IDENTIFIER AND TERMINA NUMBERING CONVENTION SHA CONFORM TO JESD 95- SPP-. DETAIS OF TERMINA # IDENTIFIER ARE OPTIONA, BUT MUST BE OCATED WITHIN THE ZONE INDICATED. THE TERMINA # IDENTIFIER MAY BE EITHER A MOD OR MARKED FEATURE. 5. DIMENSION b APPIES TO METAIZED TERMINA AND IS MEASURED BETWEEN. mm AND.5 mm FROM TERMINA TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINAS ON EACH D AND E SIDE RESPECTIVEY. 7. DEPOPUATION IS POSSIBE IN A SYMMETRICA FASHION.. COPANARITY APPIES TO THE EXPOSED HEAT SINK SUG AS WE AS THE TERMINAS. 9. DRAWING CONFORMS TO JEDEC MO REVISION C.. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONY.. NUMBER OF EADS SHOWN ARE FOR REFERENCE ONY.. WARPAGE NOT TO EXCEED.mm..5.5 x 5 WEED- T x 5 WEED- PACKAGE OUTINE,, 6 THIN QFN, xx.mm -6 I Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. Maxim Integrated Products, San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.