MAX5533 TOP VIEW. Maxim Integrated Products 1

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1 9-362; Rev ; /7 EVALUATION KIT AVAILABLE Dual, Ultra-Low-Power, General Description The are dual, 2-bit, ultra-lowpower, voltage-output, digital-to-analog converters (s) offering rail-to-rail buffered voltage outputs. The s operate from a.8v to 5.5V supply and consume less than 5µA, making the devices suitable for lowpower and low-voltage applications. A shutdown mode reduces overall current, including the reference input current, to just.8µa. The use a 3-wire serial interface that is compatible with SPI, QSPI, and MICROWIRE. Upon power-up, the outputs are driven to zero scale, providing additional safety for applications that drive valves or for other transducers that need to be off during power-up. The zero-scale outputs enable glitch-free power-up. The MAX5532 accepts an external reference input and provides unity-gain outputs. The MAX5533 contains a precision internal reference and provides a buffered external reference output with unity-gain outputs. The MAX5534 accepts an external reference input and provides force-sense outputs. The MAX5535 contains a precision internal reference and provides a buffered external reference output with force-sense outputs. The MAX5534/MAX5535 are available in a 4mm x 4mm x.8mm, 2-pin, thin QFN package. The MAX5532/ MAX5533 are available in an 8-pin µmax package. All devices are guaranteed over the extended -4 C to +85 C temperature range. For -bit compatible devices, refer to the MAX5522 MAX5525 data sheet. For 8-bit compatible devices, refer to the MAX552 MAX555 data sheet. Applications Portable Battery-Powered Devices Instrumentation Automatic Trimming and Calibration in Factory or Field Programmable Voltage and Current Sources Industrial Process Control and Remote Industrial Devices Remote Data Conversion and Monitoring Chemical Sensor Cell Bias for Gas Monitors Programmable LCD Bias SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. µmax is a registered trademark of Maxim Integrated Products, Inc. Features Ultra-Low 5µA Supply Current Shutdown Mode Reduces Supply Current to.8µa (max) Single +.8V to +5.5V Supply Small 4mm x 4mm x.8mm Thin QFN Package Internal Reference Sources 8mA of Current (MAX5533/MAX5535) Flexible Force-Sense-Configured Rail-to-Rail Output Buffers Fast 6MHz, 3-Wire, SPI-/QSPI-/MICROWIRE- Compatible Serial Interface TTL- and CMOS-Compatible Digital Inputs with Hysteresis Glitch-Free Outputs During Power-Up Ordering Information PART TEMP RANGE PIN-PACKAGE PKG CODE MAX5532EUA -4 C to +85 C 8 µmax U8C-3 MAX5533EUA -4 C to +85 C 8 µmax U8C-3 MAX5534ETC -4 C to +85 C 2 Thin QFN-EP* T244-4 MAX5535ETC -4 C to +85 C 2 Thin QFN-EP* T244-4 *EP = Exposed paddle (internally connected to GND). Selector Guide PART OUTPUTS REFERENCE TOP MARK MAX5532EUA Unity gain External MAX5533EUA Unity gain Internal MAX5534ETC Force sense External AACM MAX5535ETC Force sense Internal AACN TOP VIEW CS SCLK 2 DIN 3 REFIN(MAX5532) 4 REFOUT(MAX5533) Pin Configurations MAX5532 MAX5533 μmax 8 OUTA 7 GND 6 V DD 5 OUTB Pin Configurations continued at end of data sheet. Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATINGS V DD to GND...-.3V to +6V OUTA, OUTB to GND...-.3V to (V DD +.3V) FBA, FBB to GND...-.3V to (V DD +.3V) SCLK, DIN, CS to GND...-.3V to (V DD +.3V) REFIN, REFOUT to GND...-.3V to (V DD +.3V) Continuous Power Dissipation (T A = +7 C) 2-Pin Thin QFN (derate 6.9mW/ C above +7 C)...349mW 8-Pin µmax (derate 5.9mW/ C above +7 C)...47mW ELECTRICAL CHARACTERISTICS Operating Temperature Range...-4 C to +85 C Storage Temperature Range C to +5 C Junction Temperature...+5 C Lead Temperature (soldering, s)...+3 C Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (V DD = +.8V to +5.5V, OUT_ unloaded, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS STATIC ACCURACY (MAX5532/MAX5534 EXTERNAL REFERENCE) Resolution N 2 Bits Integral Nonlinearity (Note ) Differential Nonlinearity (Note ) INL DNL V DD = 5V, V REF = 4.96V ±4 ±8 V DD =.8V, V REF =.24V ±4 ±8 Guaranteed monotonic, V DD = 5V, V REF = 4.96V Guaranteed monotonic, V DD =.8V, V REF =.24V ±.2 ± ±.2 ± V DD = 5V, V REF = 4.96V ± ±2 Offset Error (Note 2) V OS V DD =.8V, V REF =.24V ± ±2 LSB LSB mv Offset-Error Temperature Drift ±2 µv/ C Gain Error (Note 3) GE V DD = 5V, V REF = 4.96V ±2 ±4 V DD =.8V, V REF =.24V ±2 ±4 Gain-Error Temperature ±4 ppm/ C Power-Supply Rejection Ratio PSRR.8V V DD 5.5V 85 db STATIC ACCURACY (MAX5533/MAX5535 INTERNAL REFERENCE) Resolution N 2 Bits Integral Nonlinearity (Note ) Differential Nonlinearity (Note ) INL DNL V DD = 5V, V REF = 3.9V ±4 ±8 V DD =.8V, V REF =.2V ±4 ±8 Guaranteed monotonic, V DD = 5V, V REF = 3.9V Guaranteed monotonic, V DD =.8V, V REF =.2V ±.2 ± ±.2 ± V DD = 5V, V REF = 3.9V ± ±2 Offset Error (Note 2) V OS V DD =.8V, V REF =.2V ± ±2 Offset-Error Temperature Drift ±2 µv/ C Gain Error (Note 3) GE V DD = 5V, V REF = 3.9V ±2 ±4 V DD =.8V, V REF =.2V ±2 ±4 LSB LSB LSB mv LSB 2

3 ELECTRICAL CHARACTERISTICS (continued) (V DD = +.8V to +5.5V, OUT_ unloaded, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Gain-Error Temperature Coefficient ±4 ppm/ C Power-Supply Rejection Ratio PSRR.8V V DD 5.5V 85 db REFERENCE INPUT (MAX5532/MAX5534) Reference-Input Voltage Range V REFIN V DD V Normal operation 4. MΩ Reference-Input Impedance R REFIN In shutdown 2.5 GΩ REFERENCE OUTPUT (MAX5533/MAX5535) Initial Accuracy Output-Voltage Temperature Coefficient V REFOUT No external load, V DD =.8V No external load, V DD = 2.5V No external load, V DD = 3V No external load, V DD = 5V V TEMPCO T A = -4 C to +85 C (Note 4) 2 3 ppm/ C Line Regulation V REFOUT < V DD - 2mV (Note 5) 2 2 µv/v Load Regulation Output Noise Voltage Short-Circuit Current (Note 6) I REFOUT ma, sourcing, V DD =.8V, V REF =.2V I REFOUT 8mA, sourcing, V DD = 5V, V REF = 3.9V -5µA I REFOUT, sinking.2.hz to Hz, V REF = 3.9V 5 Hz to khz, V REF = 3.9V 6.Hz to Hz, V REF =.2V 5 Hz to khz, V REF =.2V 45 V DD = 5V 3 V DD =.8V Capacitive Load Stability Range (Note 7) to nf Thermal Hysteresis (Note 8) 2 ppm Reference Power-Up Time REFOUT unloaded, V DD = 5V 5.4 (from Shutdown) REFOUT unloaded, V DD =.8V 4.4 V µv/µa µv P-P ma ms Long-Term Stability 2 ppm/ khrs 3

4 ELECTRICAL CHARACTERISTICS (continued) (V DD = +.8V to +5.5V, OUT_ unloaded, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS OUTPUTS (OUTA, OUTB) Capacitive Driving Capability C L pf Short-Circuit Current (Note 6) Power-Up Time V DD = 5V, V OUT set to full scale, OUT shorted to GND, source current V DD = 5V V OUT set to V, OUT shorted to V DD, sink current V DD =.8V, V OUT set to full scale OUT shorted to GND, source current V DD =.8V, V OUT set to V, OUT shorted to V DD, sink current Coming out of shutdown V DD = 5V 3 (MAX5532/MAX5534) V DD =.8V 3.8 Coming out of standby (MAX5533/MAX5535) V DD =.8V to 5.5V Output Power-Up Glitch C L = pf mv FB_ Input Current pa DIGITAL INPUTS (SCLK, DIN, CS) 4.5V V DD 5.5V 2.4 Input High Voltage V IH 2.7V < V DD 3.6V 2..8V V DD 2.7V.7 x V DD ma µs V 4.5V V DD 5.5V.8 Input Low Voltage V IL 2.7V < V DD 3.6V.6.8V V DD 2.7V.3 x V DD V Input Leakage Current I IN (Note 9) ±.5 ±.5 µa Input Capacitance C IN pf DYNAMIC PERFORMANCE Voltage-Output Slew Rate SR Positive and negative (Note ) V/ms Voltage-Output Settling Time Output Noise Voltage. to.9 of full scale to within.5 LSB (Note ).Hz to Hz Hz to khz V DD = 5V 8 V DD =.8V 55 V DD = 5V 62 V DD =.8V µs µv P-P 4

5 ELECTRICAL CHARACTERISTICS (continued) (V DD = +.8V to +5.5V, OUT_ unloaded, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS POWER REQUIREMENTS Supply Voltage Range V DD V Supply Current (Note 9) I DD MAX5533/MAX5535 MAX5532/MAX5534 Standby Supply Current I DDSD MAX5533/MAX5535 (Note 9) V DD = 5V V DD = 3V V DD =.8V V DD = 5V V DD = 3V V DD =.8V V DD = 5V V DD = 3V V DD =.8V Shutdown Supply Current I DDPD (Note 9).5.25 µa µa µa TIMING CHARACTERISTICS (V DD = +4.5V to +5.5V, T A = T MIN to T MAX, unless otherwise noted. Typical values are at T A = +25 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS TIMING CHARACTERISTICS (V DD = 4.5V to 5.5V ) Serial Clock Frequency f SCLK 6.7 MHz DIN to SCLK Rise Setup Time t DS 5 ns DIN to SCLK Rise Hold Time t DH ns SCLK Pulse-Width High t CH 24 ns SCLK Pulse-Width Low t CL 24 ns CS Pulse-Width High t CSW ns SCLK Rise to CS Rise Hold Time t CSH ns CS Fall to SCLK Rise Setup Time t CSS 2 ns SCLK Fall to CS Fall Setup t CSO ns CS Rise to SCLK Rise Hold Time t CS 2 ns 5

6 TIMING CHARACTERISTICS (VDD = +.8V to +5.5V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25 C.) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS TIMING CHARACTERISTICS (V DD =.8V to 5.5V ) Serial Clock Frequency f SCLK MHz DIN to SCLK Rise Setup Time t DS 24 ns DIN to SCLK Rise Hold Time t DH ns SCLK Pulse-Width High t CH 4 ns SCLK Pulse-Width Low t CL 4 ns CS Pulse-Width High t CSW 5 ns SCLK Rise to CS Rise Hold Time t CSH ns CS Fall to SCLK Rise Setup Time t CSS 3 ns SCLK Rise to CS Fall Setup t CSO ns CS Rise to SCK Rise Hold Time t CS 3 ns Note : Linearity is tested within codes 96 to 48. Note 2: Offset is tested at code 96. Note 3: Gain is tested at code 495. For the MAX5534/MAX5535, FB_ is connected to its respective OUT_. Note 4: Guaranteed by design. Not production tested. Note 5: V DD must be a minimum of.8v. Note 6: Outputs can be shorted to V DD or GND indefinitely, provided that package power dissipation is not exceeded. Note 7: Optimal noise performance is at 2nF load capacitance. Note 8: Thermal hysteresis is defined as the change in the initial +25 C output voltage after cycling the device from T MAX to T MIN. Note 9: All digital inputs at V DD or GND. Note : Load = kω in parallel with pf, V DD = 5V, VREF = 4.96V (MAX5532/MAX5534) or V REF = 3.9V (MAX5533/MAX5535). 6

7 Typical Operating Characteristics (V DD = 5.V, V REF = 4.96V (MAX5532/MAX5534), V REF = 3.9V (MAX5533/MAX5535), T A = +25 C, unless otherwise noted.) SUPPLY CURRENT (μa) SUPPLY CURRENT vs. SUPPLY VOLTAGE (MAX5532/MAX5534) SUPPLY VOLTAGE (V) MAX5532 toc SUPPLY CURRENT (μa) SUPPLY CURRENT vs. TEMPERATURE (MAX5532/MAX5534) TEMPERATURE ( C) MAX5532 toc2 SUPPLY CURRENT (μa) SUPPLY CURRENT vs. SUPPLY VOLTAGE (MAX5533/MAX5535) SUPPLY VOLTAGE (V) MAX5532 toc3 SUPPLY CURRENT (μa) SUPPLY CURRENT vs. TEMPERATURE (MAX5533/MAX5535) MAX5532 toc4 SHUTDOWN SUPPLY CURRENT (na) SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE (MAX5532/MAX5534) MAX5532 toc5 SHUTDOWN SUPPLY CURRENT (na) SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE (MAX5533/MAX5535) MAX5532 toc TEMPERATURE ( C) TEMPERATURE ( C) TEMPERATURE ( C) STANDBY SUPPLY CURRENT (μa) STANDBY SUPPLY CURRENT vs. TEMPERATURE (MAX5533/MAX5535) V REF = 3.9V V REF = 2.4V V REF =.9V V REF =.2V MAX5532 toc7 SUPPLY CURRENT (μa) SUPPLY CURRENT vs. CLOCK FREQUENCY CS = LOGIC LOW CODE = V DD = 5V V DD =.8V MAX5532 toc8 SUPPLY CURRENT (ma) SUPPLY CURRENT vs. LOGIC INPUT VOLTAGE V DD = 5V ALL DIGITAL INPUTS SHORTED TOGETHER MAX5532 toc TEMPERATURE ( C).. FREQUENCY (khz) LOGIC INPUT VOLTAGE (V) 7

8 INL (LSB) Dual, Ultra-Low-Power, Typical Operating Characteristics (continued) (V DD = 5.V, V REF = 4.96V (MAX5532/MAX5534), V REF = 3.9V (MAX5533/MAX5535), T A = +25 C, unless otherwise noted.) INL vs. INPUT CODE (V DD = V REF =.8V) DIGITAL INPUT CODE MAX5532 toc INL (LSB) INL vs. INPUT CODE (V DD = V REF = 5V) DIGITAL INPUT CODE MAX5532 toc DNL (LSB) DNL vs. INPUT CODE (V DD = V REF =.8V) DIGITAL INPUT CODE MAX5532 toc2 DNL (LSB) DNL vs. INPUT CODE (V DD = V REF = 5V) DIGITAL INPUT CODE MAX5532 toc3 OFFSET VOLTAGE (mv) OFFSET VOLTAGE vs. TEMPERATURE V DD = 5V V REF = 3.9V TEMPERATURE ( C) MAX5532 toc4 GAIN ERROR CHANGE (LSB) GAIN ERROR CHANGE vs. TEMPERATURE.5 V DD = 5V.4 V REF = 3.9V TEMPERATURE ( C) MAX5532 toc5 DIGITAL FEEDTHROUGH RESPONSE 2μs/div MAX5532 toc6 ZERO SCALE CS 5V/div SCLK 5V/div DIN 5V/div OUT 5mV/div OUTPUT VOLTAGE (V) OUTPUT LOAD REGULATION vs. OUTPUT CURRENT V DD =.8V CODE = MIDSCALE V REF =.2V OUTPUT CURRENT (μa) MAX5532 toc7 OUTPUT VOLTAGE (V) OUTPUT LOAD REGULATION vs. OUTPUT CURRENT V DD = 5.V CODE = MIDSCALE V REF = 3.9V OUTPUT CURRENT (ma) MAX5532 toc8 8

9 OUTPUT VOLTAGE (V) Typical Operating Characteristics (continued) (V DD = 5.V, V REF = 4.96V (MAX5532/MAX5534), V REF = 3.9V (MAX5533/MAX5535), T A = +25 C, unless otherwise noted.) OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT V REF = V DD CODE = MIDSCALE V DD = 5V V DD = 3V V DD =.8V... OUTPUT SOURCE CURRENT (ma) MAX5532 toc9 OUTPUT VOLTAGE (V) OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT V REF = V DD CODE = MIDSCALE V DD = 5V V DD = 3V V DD =.8V... OUTPUT SINK CURRENT (ma) MAX5532 toc2 OUTPUT LARGE-SIGNAL STEP RESPONSE (V DD =.8V, V REF =.2V) μs/div MAX5532 toc2 V OUT 2mV/div OUTPUT LARGE-SIGNAL STEP RESPONSE (V DD = 5V, V REF = 3.9V) MAX5532 toc22 V OUT 5mV/div MINIMUM SERIES RESISTANCE (Ω) OUTPUT MINIMUM SERIES RESISTANCE vs. LOAD CAPACITANCE FOR NO OVERSHOOT MAX5532 toc23 POWER-UP OUTPUT VOLTAGE GLITCH MAX5532 toc24 V DD 2V/div V OUT mv/div 2μs/div MAJOR CARRY OUTPUT VOLTAGE GLITCH (CODE 7FFh TO 8h) (V DD = 5V, V REF = 3.9V) MAX5532 toc25 V OUT AC-COUPLED 5mV/div REFERENCE OUTPUT VOLTAGE (V) CAPACITANCE (μf) REFERENCE OUTPUT VOLTAGE vs. TEMPERATURE V DD = 5V MAX5532 toc26 REFERENCE OUTPUT VOLTAGE (V) ms/div REFERENCE OUTPUT VOLTAGE vs. REFERENCE OUTPUT CURRENT V DD =.8V MAX5532 toc27 μs/div TEMPERATURE ( C) REFERENCE OUTPUT CURRENT (μa) 9

10 Typical Operating Characteristics (continued) (V DD = 5.V, V REF = 4.96V (MAX5532/MAX5534), V REF = 3.9V (MAX5533/MAX5535), T A = +25 C, unless otherwise noted.) REFERENCE OUTPUT VOLTAGE (V) REFERENCE OUTPUT VOLTAGE vs. REFERENCE OUTPUT CURRENT V DD = 5V , 4,5 REFERENCE OUTPUT CURRENT (μa) MAX5532 toc28 REFERENCE OUTPUT VOLTAGE (V) REFERENCE OUTPUT VOLTAGE vs. SUPPLY VOLTAGE.275 NO LOAD SUPPLY VOLTAGE (V) MAX5532 toc29 REFERENCE LINE-TRANSIENT RESPONSE (V REF =.2V) μs/div MAX5532 toc3 2.8V V DD.8V V REF 5mV/div REFERENCE LINE-TRANSIENT RESPONSE (V REF = 3.9V) MAX5532 toc3 REFERENCE LOAD TRANSIENT (V DD =.8V) MAX5532 toc32 5.5V V DD 4.5V V REF 5mV/div 3.9V REFOUT SOURCE CURRENT.5mA/div V REF 5mV/div μs/div REFERENCE LOAD TRANSIENT (V DD = 5V) MAX5532 toc33 2μs/div REFERENCE LOAD TRANSIENT (V DD =.8V) MAX5532 toc34 REFOUT SOURCE CURRENT.5mA/div REFOUT SINK CURRENT 5μA/div V REF 5mV/div 3.9V V REF 5mV/div 2μs/div 2μs/div

11 Typical Operating Characteristics (continued) (V DD = 5.V, V REF = 4.96V (MAX5532/MAX5534), V REF = 3.9V (MAX5533/MAX5535), T A = +25 C, unless otherwise noted.) REFERENCE LOAD TRANSIENT (V DD = 5V) 2μs/div MAX5532 toc35 REFOUT SINK CURRENT μa/div V REF 5mV/div 3.9V POWER-SUPPLY REJECTION RATIO (db) V DD =.8V REFERENCE PSRR vs. FREQUENCY.. FREQUENCY (khz) MAX5532 toc36 POWER-SUPPLY REJECTION RATIO (db) V DD = 5V REFERENCE PSRR vs. FREQUENCY MAX5532 toc37 REFERENCE OUTPUT NOISE (.Hz TO Hz) (V DD =.8V, V REF =.2V) MAX5532 toc38 μv/div.. FREQUENCY (khz) REFERENCE OUTPUT NOISE (.Hz TO Hz) (V DD = 5V, V REF = 3.9V) MAX5532 toc39 s/div -TO- CROSSTALK MAX5532 toc4 OUTA V/div μv/div OUTB AC-COUPLED mv/div OUTB AT FULL SCALE s/div 4μs/div

12 PIN MAX5532 MAX5533 MAX5534 MAX5535 NAME Pin Description FUNCTION CS Active-Low Digital Chip-Select Input SCLK Serial-Interface Clock Input DIN Serial-Interface Data Input 4 4 REFIN Reference Input 4 4 REFOUT Reference Output 5, 5, N.C. No Connection. Leave N.C. inputs unconnected (floating) or connected to GND. 6 6 FBB Channel B Feedback Input OUTB Channel B Analog Voltage Output V DD Power Input. Connect V DD to a.8v to 5.5V power supply. Bypass V DD to GND with a.µf capacitor GND Ground 8 8 OUTA Channel A Analog Voltage Output 2 2 FBA Channel A Feedback Input EP EP Exposed Paddle Exposed Paddle. Connect EP to GND. Functional Diagrams V DD REFIN POWER- DOWN CONTROL MAX5532 SCLK DIN CS CONTROL LOGIC AND SHIFT INPUT INPUT 2-BIT 2-BIT OUTA OUTB GND 2

13 SCLK DIN CS POWER- DOWN CONTROL CONTROL LOGIC AND SHIFT INPUT INPUT V DD 2-BIT PROGRAMMABLE REFERENCE Functional Diagrams (continued) REF BUF 2-BIT 2-BIT MAX5533 REFOUT OUTA OUTB GND V DD REFIN POWER- DOWN CONTROL MAX5534 SCLK DIN CS CONTROL LOGIC AND SHIFT INPUT INPUT 2-BIT 2-BIT OUTA FBA OUTB FBB GND 3

14 SCLK DIN CS POWER- DOWN CONTROL CONTROL LOGIC AND SHIFT INPUT INPUT V DD 2-BIT PROGRAMMABLE REFERENCE Functional Diagrams (continued) REF BUF 2-BIT 2-BIT MAX5535 REFOUT OUTA FBA OUTB FBB GND Detailed Description The dual, 2-bit, ultra-low-power, voltage-output s offer rail-to-rail buffered voltage outputs. The s operate from a.8v to 5.5V supply and require only 5µA (max) supply current. These devices feature a shutdown mode that reduces overall current, including the reference input current, to just.8µa (max). The MAX5533/MAX5535 include an internal reference that saves additional board space and can source up to 8mA, making it functional as a system reference. The 6MHz, 3-wire serial interface is compatible with SPI, QSPI, and MICROWIRE protocols. When V DD is applied, all outputs are driven to zero scale with virtually no output glitch. The MAX5532/ MAX5533 output buffers are configured in unity gain and come in µmax packages. The MAX5534/MAX5535 output buffers are configured in force sense allowing users to externally set voltage gains on the output (an output-amplifier inverting input is available). The MAX5534/MAX5535 come in 4mm x 4mm thin QFN packages. Digital Interface The use a 3-wire serial interface that is compatible with SPI/QSPI/MICROWIRE protocols (Figures and 2). The include a single, 6-bit, input shift register. Data loads into the shift register through the serial interface. CS must remain low until all 6 bits are clocked in. The 6 bits consist of 4 control bits (C3 C) and 2 data bits (D D) (Table ). Following the control bits, the data loads MSB first, D D. The control bits C3 C control the, as outlined in Table 2. Each channel includes two registers: an input register and a register. The input register holds input data. The register contains the data updated to the output. The double-buffered register configuration allows any of the following: Loading the input registers without updating the registers Updating the registers from the input registers Updating all the input and registers simultaneously 4

15 Table. Serial Write Data Format CONTROL DATA BITS MSB LSB C3 C2 C C D D D9 D8 D7 D6 D5 D4 D3 D2 D D t CH SCLK t CL t DS DIN C3 C2 C D t CS t DH t CSH t CSS CS t CSW t CS Figure. Timing Diagram SCLK DIN C3 C2 C C D D D9 D8 D7 D6 D5 D4 D3 D2 D D CONTROL BITS DATA BITS CS COMMAND EXECUTED Figure 2. Register Loading Diagram 5

16 Table 2. Serial-Interface Programming Commands CONTROL BITS INPUT DATA C3 C2 C C D D XXXXXXXXXXXX No operation; command is ignored. 2-bit data FUNCTION Load input register A from shift register; registers unchanged; outputs unchanged. 2 bit data Load input register B from shift register; registers unchanged; outputs unchanged. Command reserved. Do not use. Command reserved. Do not use. Command reserved. Do not use. Command reserved. Do not use. Command reserved. Do not use. 2-bit data Load registers A and B from respective input registers; outputs A and B updated; MAX5533/MAX5535 enter normal operation if in standby or shutdown; MAX5532/MAX5534 enter normal operation if in shutdown. 2-bit data 2-bit data Load input register A and register A from shift register; output A updated; Load register B from input register B; output B updated; MAX5533/MAX5535 enter normal operation if in standby or shutdown; MAX5532/MAX5534 enter normal operation if in shutdown. Load input register B and register B from shift register; output B updated; Load register A from input register A; output A updated; MAX5533/MAX5535 enter normal operation if in standby or shutdown; MAX5532/MAX5534 enter normal operation if in shutdown. Command reserved. Do not use. D, D, XXXXXXXXXX D, D, XXXXXXXXXX D, D, XXXXXXXXXX MAX5533/MAX5535 enter standby*, MAX5532/MAX5534 enter shutdown. For the MAX5533/MAX5535, D and D configure the internal reference voltage (Table 3). enter normal operation; outputs reflect existing contents of registers. For the MAX5533/MAX5535, D and D configure the internal reference voltage (Table 3). enter shutdown; outputs set to high impedance. For the MAX5533/MAX5535, D and D configure the internal reference voltage (Table 3). 2-bit data Load input registers A and B and registers A and B from shift register; outputs A and B updated; MAX5533/MAX5535 enter normal operation if in standby or shutdown; MAX5532/MAX5534 enter normal operation if in shutdown. X = Don t care. *Standby mode can be entered from normal operation only. It is not possible to enter standby mode from shutdown. 6

17 Power Modes The feature two power modes to conserve power during idle periods. In normal operation, the device is fully operational. In shutdown mode, the device is completely powered down, including the internal voltage reference in the MAX5533/MAX5535. The MAX5533/MAX5535 also offer a standby mode in which all circuitry is powered down except the internal voltage reference. Standby mode keeps the reference powered up while the remaining circuitry is shut down, allowing it to be used as a system reference. It also helps reduce the wake-up delay by not requiring the reference to power up when returning to normal operation. Shutdown Mode The feature a software-programmable shutdown mode that reduces the supply current and the reference input current to.8µa (max). Writing an input control word with control bits C[3:] = (Table 2) places the device in shutdown mode. In shutdown, the MAX5532/MAX5534 reference input and output buffers go high impedance. Placing the MAX5533/MAX5535 into shutdown turns off the internal reference and the output buffers go high impedance. The serial interface still remains active for all devices. Table 2 shows several commands that bring the back to normal operation. The power-up time from shutdown is required before the outputs are valid. Note: For the MAX5533/MAX5535, standby mode cannot be entered directly from shutdown mode. The device must be brought into normal operation first before entering standby mode. For the MAX5533/MAX5535, standby mode cannot be entered directly from shutdown mode. The device must be brought into normal operation first before entering standby mode. To enter standby from shutdown, issue the command to return to normal operation followed immediately by the command to go into standby. Table 2 shows several commands that bring the MAX5533/MAX5535 back to normal operation. When transitioning from standby mode to normal operation, only the power-up time is required before the outputs are valid. Reference Input The MAX5532/MAX5534 accept a reference with a voltage range extending from to V DD. The output voltage (V OUT ) is represented by a digitally programmable voltage source as: V OUT = (V REF x N / 496) x gain where N is the numeric value of the s binary input code ( to 495), V REF is the reference voltage, gain is the externally set voltage gain for the MAX5534, and gain is one for the MAX5532. In shutdown mode, the reference input enters a highimpedance state with an input impedance of 2.5GΩ (typ). Reference Output The MAX5533/MAX5535 internal voltage reference is software configurable to one of four voltages. Upon powerup, the default reference voltage is.24v. Configure the reference voltage using D and D data bits (Table 3) when the control bits are as follows C[3:] =,, or (Table 2). V DD must be kept at a minimum of 2mV above V REF for proper operation. Standby Mode (MAX5533/MAX5535 Only) The MAX5533/MAX5535 feature a software-programmable standby mode that reduces the typical supply current to 3µA (max). Standby mode powers down all circuitry except the internal voltage reference. Place the device in standby mode by writing an input control word with control bits C[3:] = (Table 2). The internal reference and serial interface remain active while the output buffers go high impedance. Table 3. Reference Output Voltage Programming D D REFERENCE VOLTAGE (V)

18 Applications Information -Cell and 2-Cell Circuits See Figure 3 for an illustration of how to power the with either one lithium-ion battery or two alkaline batteries. The low current consumption of the devices make the ideal for battery-powered applications..μf.8v V ALKALINE 3.3V 2.2V V LITHIUM 3.3V MAX66 (μa,.25v SHUNT REFERENCE) 536kΩ +.25V REFIN.μF Programmable Current Source See the circuit in Figure 4 for an illustration of how to configure the MAX5534/MAX5535 as a programmable current source for driving an LED. The MAX5534/ MAX5535 drive a standard NPN transistor to program the current source. The current source (I LED ) is defined in the equation in Figure 4. /2 MAX5534 V DD GND VOUT V OUT (.3mV / LSB) V OUT = V REFIN N 496 N IS THE NUMERIC VALUE OF THE INPUT CODE. Figure 3. Portable Application Using Two Alkaline Cells or One Lithium Coin Cell V+ REFIN VOUT LED I LED 2N394 REFIN /2 MAX5534 VOUT V OUT V OUT = V BIAS + (I T R) /2 MAX5534 FB FB R I LED = V REFIN N 496 R N IS THE NUMERIC VALUE OF THE INPUT CODE. R V BIAS TRANSDUCER I T V BIAS = V REFIN N 496 N IS THE NUMERIC VALUE OF THE INPUT CODE. Figure 4. Programmable Current Source Driving an LED Figure 5. Transimpedance Configuration for a Voltage-Biased Current-Output Transducer 8

19 Voltage Biasing a Current-Output Transducer See the circuit in Figure 5 for an illustration of how to configure the MAX5534/MAX5535 to bias a current-output transducer. In Figure 5, the output voltage of the MAX5534/MAX5535 is a function of the voltage drop across the transducer added to the voltage drop across the feedback resistor R. Unipolar Output Figure 6 shows the MAX5534 in a unipolar output configuration with unity gain. Table 4 lists the unipolar output codes. Bipolar Output The MAX5534 output can be configured for bipolar operation as shown in Figure 7. The output voltage is given by the following equation: V OUT_ = V REFIN x [(N A - 248) / 248] where N A represents the decimal value of the s binary input code. Table 5 shows the digital codes (offset binary) and the corresponding output voltage for the circuit in Figure 7. Configurable Output Gain The MAX5534/MAX5535 have force-sense outputs, which provide a connection directly to the inverting terminal of the output op-amp, yielding the most flexibility. The advantage of the force-sense output is that specific gains can be set externally for a given application. The gain error for the MAX5534/MAX5535 is specified in a unitygain configuration (op-amp output and inverting terminals connected), and additional gain error results from external resistor tolerances. Another advantage of the force-sense is that it allows many useful circuits to be created with only a few simple external components. An example of a custom fixed gain using the MAX5534/ MAX5535 force-sense output is shown in Figure 8. In this example, R and R2 set the gain for V OUTA. V OUTA = [(V REFIN x N A ) / 496] x [ + (R2 / R)] where N A represents the numeric value of the input code. Self-Biased Two-Electrode Potentiostat Application See the circuit in Figure for an illustration of how to use the MAX5535 to bias a two-electrode potentiostat on the input of an ADC. Power Supply and Bypassing Considerations Bypass the power supply with a.µf capacitor to GND. Minimize lengths to reduce lead inductance. If noise becomes an issue, use shielding and/or ferrite beads to increase isolation. For the thin QFN package, connect the exposed pad to ground. Layout Considerations Digital and AC transient signals coupling to GND can create noise at the output. Use proper grounding techniques, such as a multilayer board with a low-inductance ground plane. Wire-wrapped boards and sockets are not recommended. For optimum system performance, use printed circuit (PC) boards. Good PC board ground layout minimizes crosstalk between outputs, reference inputs, and digital inputs. Reduce crosstalk by keeping analog lines away from digital lines. Table 4. Unipolar Code Table (Gain = +) MSB CONTENTS LSB ANALOG OUTPUT +V REF (495/496) +V REF (249/496) +V REF (248/496) = +V REF / 2 +V REF (247/496) +V REF (/496) V REFIN MAX5534 Figure 6. Unipolar Output Circuit FB_ OUT_ V OUT = V REFIN N A 496 N A IS THE INPUT CODE ( TO 495 DECIMAL). Table 5. Bipolar Code Table (Gain = +) CONTENTS MSB LSB ANALOG OUTPUT +V REF (247/248) +V REF (/248) V -V REF (/248) -V REF (247/248) -V REF (248/248) = -V REF 9

20 REFIN /2 MAX5534 kω OUT_ FB_ kω V+ V- V OUT CS SCLK DIN CS2 REFIN N IS THE NUMERIC VALUE OF THE INPUT CODE. N POT IS THE NUMERIC VALUE OF THE POT INPUT CODE..8V V DD 5.5V /2 MAX5534 FB V OUT = V REFIN N 496 ( N POT ) 255 W VOUT H L MAX54 SOT-POT kω 5PPM/ C RATIOMETRIC TEMPCO V OUT Figure 7. Bipolar Output Circuit Figure 9. Software-Configurable Output Gain REFIN MAX5534 VOUTA FBA R2 V OUT V OUT = V REFIN N A 496 ( + R2 R ) N A IS THE NUMERIC VALUE OF THE A INPUT CODE. R REF OUT_ FB_ I F R F TO ADC TO ADC VOUTB V OUT2 /2 MAX5535 WE SENSOR FBB V OUT2 = V REFIN N B 496 N B IS THE NUMERIC VALUE OF THE B INPUT CODE. BAND GAP REFOUT CE C L TO ADC Figure 8. Separate Force-Sense Outputs Create Unity and Greater-than-Unity Gains Using the Same Reference Figure. Self-Biased Two-Electrode Potentiostat Application 2

21 REF REF MAX5535 OUTA FBA OUTB FBB I F RF WE SENSOR CE TO ADC Pin Configurations (continued) TOP VIEW CS SCLK DIN 2 3 FBA 2 N.C. MAX5534 MAX REFIN(MAX5534) N.C. REFOUT(MAX5535) OUTA 6 FBB GND V DD OUTB BAND GAP REFOUT C L TO ADC THIN QFN Figure. Driven Two-Electrode Potentiostat Application Chip Information TRANSISTOR COUNT:,688 PROCESS: BiCMOS Revision History Pages changed at Rev :, 6, 4, 2, 24. 2

22 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to 24L QFN THIN.EPS PACKAGE OUTLINE, 2, 6, 2, 24, 28L THIN QFN, 4x4x.8mm 2-39 E 2 22

23 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to PACKAGE OUTLINE, 2, 6, 2, 24, 28L THIN QFN, 4x4x.8mm E 2 23

24 Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to 8 Ø.5±. D TOP VIEW E H 4X S BOTTOM VIEW 8 DIM A A INCHES MIN MAX BSC A2.3 b c D e E.6 H.88 L.6 α S.27 BSC MILLIMETERS MIN MAX BSC BSC 8LUMAXD.EPS A2 A A e b c L α FRONT VIEW SIDE VIEW PROPRIETARY INFORMATION TITLE: PACKAGE OUTLINE, 8L umax/usop APPROVAL DOCUMENT CONTROL NO. REV J Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 24 Maxim Integrated Products, 2 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products is a registered trademark of Maxim Integrated Products, Inc.