Jack Wong, Rick Dunnegan US Army RDECOM CERDEC S&TCD, Ft. Monmouth, NJ. and. Elmsford, NY. performing analog-to-digital conversion and a digital

Transcription

1 HIGH PERFORMANCE, ALL DIGIAL RF RECEIVER ESED A 7.5 GIGAHERZ Jack Wong, Rick Dunnegan US Army RDECOM CERDEC S&CD, F. Monmouh, NJ and Deepnarayan Gupa, Dmiri Kirichenko, Vladimir Dosenko, Rober Webber, Rober Miller, Oleg Mukhanov, and Richard Hi Hypres, Inc. Elmsford, NY ABSRAC Wireless applicaions would be less expensive, more flexible, and more robus ifhey had more digial and less analog circuiry. he problem is implemening digial signal processing a radio frequencies. Convenional daa converers (ADCs and DACs) and digial circuis are simply no fas enough, especially a SACOMfrequencies. However, superconducors can provide ulra fas mixed signal and digial circuis wih he lineariy and dynamic range required for rue direc, digial-rf processing. hese superconducing circuis are digial ICs based on Josephson juncions and "rapid-single-flux-quanum" logic (RSFQ), where simple circui swiching speeds up o 750 GHz have been demonsraed. his permis direc conversion beween analog RF and digial baseband signals, replacing frequency and proocolspecific analog hardware wih flexible digial processors. HYPRES recenly developed and delivered an X-band All RF Receiver (XADR) prooype sysem for he US Army CERDEC and PM DCAS. he concep of his ADR is o replace he enire analog RF receive chain beween he anenna and he baseband demodulaor wih a high performance digial RF equivalen. he firs XADR prooype sysem has been successfully demonsraed a he Join SACOM engineering Cener (JSEC). End o end link esing, over he saellie has been successfully compleed using an exising ANIGSC-39 X-band earh erminal, an XAR saellie, he X-band ADR and a SACOM modem. INRODUCION Fuure miliary and commercial radio frequency (RF) sysems demand beer uilizaion of he RF specrum, moving owards higher frequency, greaer bandwidh, and greaer flexibiliy o accommodae diverse modaliies (e.g. voice, daa, video, deecion and ranging, elecronic counermeasures). his requires exension of digial processing o he radiionally analog RF domain. Superconducor rapid single flux quanum (RSFQ) elecronics, feauring ulrafas digial logic and highlineariy analog-o-digial converers, allows direc conversion of RF signals and digial processing of he digiized RF signal up o SACOM frequencies [1]. Recenly, a family of digial-rf receivers (called ADRs), comprising an oversampled dela or dela-sigma modulaor performing analog-o-digial conversion and a digial channelizer circui performing digial down-conversion and filering, have been realized using superconducor inegraed circui echnology [2]. Among hese, he one wih he highes inpu frequency is he X-band digial-rf receiver (called XADR). Unil now, hese ADR chips were esed in he laboraory, primarily by immersion in a liquid helium dewar, and evaluaed wih inpu signals generaed from es equipmen. We have buil a complee sysem prooype by inegraing he XADR chip wih a commercial cryogen-free closed cycle refrigeraor (called cryocooler). Here, we repor he firs demonsraion of his superconducor digial-rf receiver prooype wih live X-band saellie signals a he Join SACOM Engineering Cener (JSEC). X-BAND DIGIAL-RF RECEIVER Direc digiizaion of X-band SACOM signals is performed by a single 1-cm2 superconducor inegraed circui, called he XADR chip (Fig. 1). Mixer- Band pass Dela-Sig ma ADC Modulaor Exernal Clock- Clock Divider Fig. 1. Am plifiers Decimaion (I) Decim aion (Q) Single-chip digial-rfx-band receiver (XADR) /07/$ IEEE I OF 5

2 Channelizer Jupul) fd= I- Q Mixer flq Lo Amplifiers Decimaion gai Graphical Exernal o User * Inerface Inerface + Modem Daa Acquisiion and Processing Board (FPGA) f Decimaion ccc n CCO 1/2n f fd= fif :I Ampier I Fig. 2. Block Diagram ofhe XADR chip. Based on his XADR chip, we have developed a saellie communicaion digial receiver demonsraor. he chip is cooled by a commercial wo-sage closed-cycle refrigeraor (Sumiomo SRDK-100) o abou 4 K. he chip (Fig. 2) comprises a bandpass second-order dela-sigma analog-o-digial converer (AZ ADC) circui, and a digial channelizer circui, boh clocked by a common highfrequency clock (fclk). Analog RF inpu is applied direcly o he AZ ADC modulaor, and is convered ino an oversampled single-bi daa sream. he channelizer circui digially down convers and filers his digial-rf daa sream o produce a pair of digial in-phase (1) and quadraure (Q) words a a reduced (decimaed) oupu clock rae of fd =fc/k!2', where 2' is he decimaion raio. I and Q mixing is performed by muliplying he ADC oupu by wo digial local oscillaor sreams wih exacly 90 phase difference, derived from he ADC sampling clock. In his design, he local oscillaor frequency is 1/4h of he clock frequency. he muli-bi digial I and Q oupus of he decimaion filers are amplified o abou 2 mv wih a se of on-chip drivers. he chip consumes less han 4 mw of power, far less han he cooling capaciy ( K) of he commercial cryocooler. hese mv-level digial I and Q oupus, along wih he corresponding clock signal (fd), are amplified by a se of cusom-designed high-gain amplifiers o abou 3.3 V. he signals are hen acquired using a commercial circui board wih field programmable gae array (FPGA) chips. We have buil a programmable daa acquisiion inerface ha can also funcion as a second-level channelizer for exracion of sub-bands. In addiion o acquiring he digial I and Q daa, he inerface board permis heir ransfer o any back-end signal processor, such as a digial MODEM. he block diagram of he XADR demonsraor uni is shown in Fig. 3. Fig. 3. Inerface AmplifiE RF Inpu- Exernal Clock- Q Clocklil ii I Cryocooler DC Brs DC Bias Curren emperaure Monior Block diagram ofhe XADR sysem prooype. SUPERCONDUCOR BANDPASS DELA-SIGMA ANALOG-O-DIGIAL CONVERER DESIGN A bandpass ADC was chosen o minimize he quanizaion noise in he band-of-ineres ( GHz). he ADC modulaor is a coninuous-ime bandpass dela-sigma modulaor wih wo lumped LC resonaors. In his implemenaion of he bandpass ADC, he firs and he second resonaors were designed o be 7.4 GHz and 7.6 GHz respecively. he qualiy facor of he resonaor was esimaed o be around 100. We inroduced a sring of juncions as a unable inducor for possible uning of he resonan frequency, bu did no use i in his es. One of he unique feaures of he superconducor delasigma ADC modulaors is implici feedback: when he boom juncion (J2) of he wo-juncion clocked comparaor swiches, i subracs a single flux quanum (SFQ, (Do = 2.07 fwb) from he inpu while producing a digial oupu SFQ pulse. herefore, no explici feedback loop is needed o consruc a firs-order ADC modulaor. A second-order modulaor was designed o improve signalo-noise raio (SNR) by furher suppression of quanizaion noise. Fig. 4 and Fig. 5 show a block diagram and he corresponding schemaic diagram of our second-order ADC modulaor. he feedback pah includes Josephson ransmission lines (JLs) as acive delay elemens in addiion o a D flip-flop o conrol he phase of he feedback signal. 2 OF 5

3 RF In pu Am plifier + - Resonaor2 + p 2nd-order Feedback Implici Feedback Clock ;7 Comparaor I_ I -C Clock Fig. 4. Block diagram of he second-order bandpass D1 ADC modulaor. RF Inpu Clock Resonaor 1 ii/~.'.9 -F +. JL Amplifier 2nd-order Feedback OD J2 >\Fw ~~~~~L JL I- Clock Fig. 5 Schemaic diagram of he second-order bandpass DS ADC modulaor. In is simples implemenaion, he clock frequency for a bandpass AZ ADC is chosen o be fk= 4fo, where fo is he cener of he band-of-ineres. For X-band, his clock frequency is abou 30 GHz. One can also use a lower clock frequency wih some performance penaly. In his scheme, called RF undersampling, we ake advanage of he sampling process ha replicaes he inpu analog frequency band, cenered a fo, ranslaed by muliples of he sampling frequency (fclk). In general, he sampled specrum consiss of an infinie number of band replicas a +fo nfclk, where n =0, 1, 2,..., bu we are primarily ineresed in he firs Nyquis zone 0 <f<fc.k/2. For fck > fo> fc. /2, he band cener is shifed from fo o f/ck - fo. We will hen need o apply a digial local oscillaor a ha frequency (L/ = fck -fo) o mix i down o baseband. Furhermore, he local oscillaor should be a submuliple of he clock frequency o preven unwaned mixer arifacs, preferably by a facor divisible by 4 o ensure convenien generaion of in-phase and quadraure componens. Under hese consrains, he clock frequency is given by fc/k - fo =fclk4, or/clk=4fo13, which for X-band is abou 10 GHz. We designed wo versions of he XADR chip, for fabricaion using our firs-generaion (1 ka/cm2) and L- J second-generaion (4.5 ka/cm2) processes, for arge clock frequencies of 10 GHz and 30 GHz respecively. DIGIAL-RECEIVER DEMONSRAION In collaboraion wih L-3 Communicaions, we have successfully inerfaced he superconducor X-band digial- RF receiver wih L-3's 3rd generaion digial modem, which was specially configured o accep and demodulae digial I and Q digial daa. he complee receiver sysem demonsraor uni was esed wih live saellie signals a HYPRES firs, and hen a he Join Saellie Engineering Cener (JSEC) in F. Monmouh, NJ, where i received signals from he XAR saellie a he GSC-39 erminal. Fig. 6. XAR Saellie 8326 MHz Waveguide \/ FrequerncypUponverer s Combiners HPA 7676 MHz 11i ransmier 11-m Dish Waveguide Pach Panel Room AN/GSC MHz 1' L-3 Communicaions Saellie Modem Model Mod ul aor + Rou er L-3 Communicaions Lapop (Daa ransmier arid Display) L-3 Cormmunicaions Lapop (Daa Receiver andk Display) UDP Clock L-3 Coimunicaions Clk L--3Cornmmun icaion s Rouer <Gen3Saellie X ModeModem ldemodulaed Demodulaor 3 Daa P RF Splifer Aenuaors A-bancU uigilal-kr Configuraion for he X-band -RF. Keceiver he seup for he demonsraion is shown in Fig. 6 above. We sared by generaing a daa enriched RF sream, originaing from a ypical user daa sream from a compuer feeding ino a modulaor hrough a ypical rouer. We chose an uncoded binary phase shif keying (BPSK) modulaion ono a 70-MHz inermediae frequency (IF) carrier a a modulaion rae of 1544 kbps (I). From here, he signal was injeced ino a wo-sage frequency upconverer. he firs sage heerodyne mixer performed mixing of he 70 MHz (modem oupu) wih an inernally oscillaed 630 MHz, producing he sum (700 MHz) and he difference (570 MHz) frequencies in addiion o frequency componens a he inpus of he mixer. he signal was hen band pass filered o allow only he sum (700 MHz) o coninue. he signal hen raversed o anoher heerodyne mixer ha again produced he sum, he difference and he wo original inpus bu having one primary difference: he inernal oscillaing inpu for his second sage mixer was unable ranging from 7.2 GHz o 7.7 GHz wih he filered oupu ranging from 7.9 GHz o 8.4 GHz. From here he analog signal is daa enriched X-band. For our es, we chose he cener frequency o be 8326 Mhz. 3 OF 5

4 he modulaed X-band RF signal was amplified o high power using a raveling wave ube (W) amplifier. he amplified signal hen raversed a low-loss waveguide o an anenna, wih an effecive gain of 57 db, and was radiaed o space wih a circular polarizaion. he loss o he saellie, approximaely 22,380 miles away, is 202 db. On he saellie, he signal was amplified, frequency shifed down by 650 MHz, o a range of 7.25 o 7.75 GHz, and amplified again before being ransmied back down o earh. Deparing he saellie, he signal underwen circular polarizaion again and anoher 202 db of loss. he signal was colleced by he 57 db gain aperure much in he same fashion as i was ransmied excep is lower frequency and opposie polarizaion. Immediaely upon arrival, he signal was amplified by a 73 db low-noise amplifier (LNA). he signal hen raversed more waveguide o a bank of RF spliers and a se of fixed and variable aenuaors before being applied o he X-band digial-rf receiver. For our chosen carrier, he inpu RF signal wasfo = 7676 MHz. he XADR chip sampled he GHz analog RF inpu direcly wih an applied/f/k 4fo /3 = GHz, and digially down convered down o baseband. he decimaion filer raio was 256, and consequenly, he oupu (decimaed) clock rae was fd = f/ik!256 = MHz. he oupu digial I and Q daa a Msample/s were amplified and passed hrough he FPGA daa acquisiion board and inerface o he L-3 digial modem. Upon demodulaion, he signal was passed hrough he rouer in is packe form o be acquired and displayed by he desinaion compuer. We also acquired he daa from he daa acquisiion and processing board and performed 0 ±fd/2 0 Normalized Frequency (f/fd) Fig. 7 he graphical user inerface displays he specra of he digial I (op lef) and Q (op righ) oupus shown along wih ha ofi+jq (boom). Fig. 7 shows he performance of he XADR chip in erms of signal-o-noise raio (SNR) and spur-free dynamic range (SFDR) over he 40 MHz band wih a single-one RF inpu signal. In addiion o esing wih pseudo-random paerns, we demonsraed he XADR sysem wih live ransmission and recepion of a video file. he specrum (Fig. 8) shows he digially down-convered signal-of-ineres on eiher side off= 0. During his demonsraion, here were oher communicaion signals presen in he same band. he closes in frequency was a ransmission cenered a 7679 MHz, from GSC-39 o a small mobile erminal, wih 10 db more power han our signal-of-ineres. hese signals were also digiized by he XADR chip, and could be exraced from he same digiized daa using a se of second-level channelizers [2]. In oher words, he ADR permis exracion of muliple sub-bands from a broad digiized band. Also, he XADR chip suppors much higher daa raes han he Mbps used for he live demonsraion based on available saellie bandwidh. In he laboraory, we have digiized X-band carriers modulaed a raes up o 6.5 Mbps, limied by he available modulaor equipmen. 0 ±fdi2 0 Normalized Frequency (f/fd) Mbps wih a packeized video file. he XADR also capured oher signals in he same ransmied band, a and GHz respecively. he clock-frequency is MHz. We also noed ha he level of noise received from he anenna was significanly higher (by abou 20 db) han he ADC quanizaion noise floor. We esimaed he oal losses beween he receive LNA and he RF inpu por of he cryopackage uni o be db. his does no include he RF cable loss inside he cryopackage, beween he inpu por a room emperaure and he 4-K chip, which was no minimized o keep he conducive hea load on he cryocooler low. herefore, we expec ha his XADR sysem could be placed direcly behind he anenna, eliminaing he need for amplificaion. Finally, beer performance is expeced from an XADR chip clocked a higher frequency. Fig. 9 shows he specrum of a GHz RF inpu signal ha has been 4 OF 5

5 digiized a fclk=4flo = GHz and digially downconvered o 5 MHz. he decimaion raio is 256 and he oupu sampling rae is MHz. Compared o he resuls obained wih 10 GHz clock, boh SNR and SFDR are higher over a larger bandwidh. m - 0~ a1) N m 0 z sofware-defined plaform from RF o baseband. In erms of increased capabiliy, his will allow us o have programmable and flexible muli-band muli-mode communicaions across muliple saellie ransponders or differen saellie payloads simulaneously. In erms of increased performance, his will allows us o have greaer G/ improvemen on he receive-side and greaer power efficiency on he ransmi side, due o he inrinsic low noise emperaure and direc digial-rf processing using superconducing digial circuis. In erms of program acquisiion and logisic cos, his will eliminae muliple racks of legacy equipmen, such as, IF cablings, analog RF swich panels, analog IF up/down converers, and analog IF modems. Fig. 10 below shows he concep of he muliband All -RF ransceiver archiecure for fuure SACOM earh erminal..r~~~~~~~~~~~~~~~~~~~~~~~~~~~i '...F 0 Normalized Frequency (f/fd) Fig. 9 Specrum of he digiized oupu from an XADR chip clocked above 30 GHz. he applied analog inpu signal is GHz. CONCLUSION We have developed and demonsraed a complee digial receiver prooype sysem, feauring direc digiizaion of X-band Miliary Saellie Communicaions (MILSACOM) signals. A superconducor inegraed circui chip, consising of a bandpass dela-sigma ADC modulaor and a digial channelizing circui boh clocked above 10 GHz, was used o conver RF signals in he GHz range o digial and perform down-conversion and filering compleely in digial domain. his sysem was inerfaced wih a MIL-SD A modem, and was used o demonsrae live daa and video raffic in an exising Army Earh erminal, i.e., AN/GSC-39 erminal over a live Saellie link. I has achieved iniial echnology Readiness Level (RL) 6 capabiliy by operaing in a relevan environmen. More esing will be performed in he near fuure when he opimized version of he XADR chip o be clocked a 30 GHz is ready for sysem inegraion. he X-band ADR concep is jus a firs sepping sone oward an All--RF ransceiver (AD) archiecure for fuure SACOM Earh erminals. he overall goal of he AD is a rue sofware-defined SACOM Earh erminal, which will provide direc RF digiizaion of he whole saellie payload bandwidh for all incoming signal carriers from he anenna and consolidae all digial-rf disribuions from he anenna ino a single all-digial I~~~~~~~~~~~~~~~~~~~~~~~~~~~ Band-m - 11> dil Band-1 V IuADC Band-2 r A,DC 2 ADC Band P-Pedisoer 2 IDAC I _ P-Predisorer Band-m m - ID0AC M Fig. 10 Muli-band, archiecure. Channelizer Uni I - Down Decimaion Channelizer Uni n Down Decimaion D ig al ransmier Un i I - Up Inerpolabon D ig al ransmier Un i h - Up - Inerpolabon muli-channel digial-rf receiver ACKNOWLEDGM EN he work was suppored in par by CERDEC Small Business Innovaion Research (SBIR) Conracs, and by he Projec Manager Defense Communicaions Army ransmissions Sysem (PM DCAS). he auhors hank Mr. John Deewall for his encouragemen and suppor. REFERENCES [1] 0. A. Mukhanov, D. Gupa, A. M. Kadin, and V. K. Semenov, "Superconducor Analog-o- s," Proceedings of he IEEE, vol. 92, pp , Oc [2] D. Gupa,. V. Filippov, A. F. Kirichenko, D. E. Kirichenko, I. V. Vernik, A. Sahu, S. Sarwana, P. Shevchenko, A. alalaevski, and 0. A. Mukhanov, " channelizing radio frequency (RF) receiver," IEEE rans. Appl. Supercon., June 2007, o be published. 5 OF 5