PT8A261/262 PIR Sensor Light Switch Controller. General Description. Features. Applications. Ordering Information. Block Diagram
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1 Feature 2-tage operational amplifier a filter Built-in noie rejection circuit On-chip regulator Override function Synchronou with AC 220/50Hz and 110/60Hz Pule output (PT8A261) for TRIAC drive or level output (PT8A262) for relay drive to enable/diable output Adjutable output on time duration ON/AUTO/OFF electable by MODE pin Auto-reet if the ZC ignal diappear over 3 econd 40 econd warm-up Quick check mode for initial intallation Operating voltage: 5 Stand-by current: 80µA General Decription The PT8A261 and PT8A262 are low power mixed ignal CMOS LSI deigned for the automatic lamp control uing PIR enor a motion detector. With on chip noie filter and voltage regulator, the IC provide table operation throughout temperature range. input to diable day time operation i deired. Application Energy aving auto-witch in Garden, kitchen, bathroom, corridor, torage or yard Auto light in meeting room Ordering Information P art Number Packag e PT8A261PE/PT8A262PE PT8A261WE/PT8A262WE Lead free 16 - Pin PDIP Lead free and Green 16 - Pin SOIC Block Diagram PT8A261DE / PT8A262DE Note: Adding X uffix=tape/reel Die Form OP2O OP2N OP2P _ + Comparator latch circuit Mode and control circuit MODE OP1O OP1P OP1N + _ oltage divider Regulator Control circuit Output circuit RELAY (for 262 only) TRIAC (for 261 only) EE OSCD delay ocillator Delay circuit OSCS Sytem ocillator Counter circuit Zero cro debounce ZC 1
2 Pad Location Pad Location of PT8A261DE 1470um Die No. ZC OSCS OSCD MODE TRIAC GND OP2O 1710um NC OP2N OP2P EE OPIP OPIN OPIO Pad Coordinate Pad Name X Coordinate Y Coordinate Pad Name X Coordinate Y Coordinate GND NC TRIAC EE OSCD OSCS OP1P ZC OP1N OP1O MODE OP2P OP2N OP2O Note: Subtrate i connected to GND 2
3 Pad Location of PT8A262DE 1470um Die No. ZC OSCS OSCD MODE RELAY GND OP2O 1710um NC OP2N OP2P EE OPIP OPIN OPIO Pad Coordinate Pad Name X Coordinate Y Coordinate Pad Name X Coordinate Y Coordinate GND NC RELAY EE OSCD OSCS OP1P ZC OP1N OP1O MODE OP2P OP2N OP2O Note: Subtrate i connected to GND 3
4 Pin Aignment Figure 2 PT8A261P/PT8A261W PT8A262P/PT8A262W GND TRIAC OSCD OSCS ZC MODE OP2O OP2N OP2P OP1O OP1N OP1P EE GND RELAY OSCD OSCS ZC MODE OP2O OP2N OP2P OP1O OP1N OP1P EE Top view Top view Pin Decription Table 1 Pin/Pa in/pad N ame T yp e Decriptio n 1 1 GND Ground Ground 2 RELAY O RELAY drive output through an external NPN tranitor, active high 2 TRIAC O TRIAC drive two-pule output, active negative pule. 3 3 OSCD I / O Output timing ocillator I/O, connected to an external RC to adjut output duration. 4 4 OSCS I/ O Sytem ocillator I/O, connected to an external RC to et the ytem frequency. The ytem frequency = 16kHz for normal application. 5 5 ZC I Schmitt input for AC zero croing detection MODE EE I I Power O Connected to a voltage divider for daytime/night auto-detection. Low input to thi pin can diable PIR input. i a chmitt trigger input with 5-econd input debounce time. Mode elect, connecting to open - auto detection Power upply - output alway on, connection GND - output alway off, C C Internal voltage regulator output, 3.6 with repect to ground. Connected to the drain of PIR enor I Chip reet input, active low, kept floating or connected an RC network OP1P I Non-inverted input of firt operational amplifier, connected directly to ource of PIR enor OP1N I Inverted input of firt operational amplifier OP1O O Output of firt operational amplifier OP2P I Non-inverted input of econd operational amplifier OP2N I Inverted input of econd operational amplifier OP2O O Output of econd operational amplifier 4
5 Functional Decription The PT8A261 and PT8A262 are CMOS LSI chip deigned for automatic PIR lamp control. They can operate in 2-wire configuration for triac application or in 3-wire configuration for relay application. The device conit of operational amplifier, a comparator, timer, a zero croing detector, control circuit, a voltage regulator, a ytem ocillator, and an output timing ocillator. The PIR enor detect infrared power variation caued by motion of a human body and tranfer to a voltage variation. If the PIR output voltage variation conform to criteria, the lamp i turned on for an adjutable duration. The PT8A261 (or 262) offer three operating mode (ON, AUTO, OFF) which can be et through a MODE pin. When the device i working in AUTO mode, the uer can override the mode to witch it to TEST mode or manual ON mode, or return to the AUTO mode by witching power witch. Figure 3. Sytem Ocillator OSCS and OSCD Pin OSCS i a ytem ocillator I/O pin connected to an external RC to generate ytem frequency of 16kHz. OSCD i an output timing ocillator I/O pin. It connected to an external RC to obtain the deired turn-on duration by electing variou value of RC or uing a variable reitor.foscd i the frequency of OSCD pin, output timing can be caculated a the formula: TD = 21504/FOSCD Input Circuit i a CMOS chmitt trigger input pin. It i ued to ditinguih between day time and night time. When the input voltage of i high the PIR input i enabled, when low the PIR input diabled. The input diable-to-enable debounce time i 5 econd. Connect thi pin to when not uing it. The input i ignored when the TRIAC or RELAY output i active. Figure 4. Output Timing Ocillator TD = 21504/FOSCD RS 560K OSCS PT8A261/ 262 RD OSCD PT8A261/ 262 CS 200P CD Figure 5. Input Circuit Table 2. Pin Function Rp Schmitt Driver Control Circuit C DS L OW H IGH S tatu Day Time Night PR PI I Diabled Enabled PT8A261/262 Figure 6. Enable Debounce PIREnable Diable < 5 > 5 Enable 5
6 MODE MODE i a tri-tate input pin for operation mode election. See the following table 3. Override Control: The term override refer to the change of operating mode by witching the power witch twice within 3 econd. When the chip i working in the AUTO mode (MODE pin openned), the output i activated by a valid PIR trigger ignal and the output active duration i controlled by the OSCD ocillation period. The lamp can be witched to ON from the AUTO mode by either witching the MODE pin to or witching the power witch twice within 3 econd. The device can be toggled from ON to AUTO by witching the power witch twice within 3 econd again (override operation). If the chip i overridden to ON and there i no further override operation, it will return to AUTO automatically after an internal preet ON time duration (8 hour). The override operation will caue the lamp flah (for TRIAC verion only). It will flah 3 time at 1Hz rate when changing AUTO mode to other mode, and flah 3 time at 2Hz rate when returning to AUTO mode. But no flah if mode i changed by witching the MODE witch. See Figure 7 for override timing. Table 3. Operation Mode by MODE Pin MOD ODE Statu GND Open Operatio peration Mode ON OFF AUTO Decriptio ecription Output i alway ON: RELAY pin end high level for relay driving; TRIAC pule train output i ynchronized by ZC for triac driving. Output i alway OFF: RELAY pin end low level for relay driving; TRIAC pin end high level for triac driving. Output remain in the OFF tate until activated by a valid PIR trigger input ignal. When working in the AUTO mode, the device allow override control by witching the ZC ignal. Figure 7. Override Timing flah flah flah flah Operating Mode AUTO ON AUTO ON AUTO 8 hour ZC Flah i only for TRIAC verion Pin i ued to reet the device. It i internal pull-high and active low. The ue of C can extend the power-on initial time. If the pin i openned (without C), the initial time i 40 econd. See Figure 8. Figure 8. Application Example REST C GND 6
7 Power On Initial The PIR ignal amplifier require a warm up period after poweron. The input hould be diabled during thi period. In the AUTO mode within the firt 10 econd of the initial time the chip allow override control to enter the quickly intall mode.after 40 of the initial time the chip allow override control between ON and AUTO. It will remain in the warm up period if the total initial time ha not elaped after returning to AUTO. In cae that the ZC ignal diappear more than 3 econd, the chip will retart the initialization operation. However, the retart initial time i alway 40 econd and cannot be extended by adding C to the pin a hown in Figure 6. Trigger The trigger timing i hown in Figure 9. Retrigger -- If another ignal i attained in trigger hold time, the circuit will be retriggered, and the trigger hold time will be retarted from thi time. Figure 9. Trigger Timing 5 Output Enable Comparator Input +trigger level -trigger level Comparator Output >24m <24m (Note1) Detect Enable Tet Enable power on delay time tet enable RELAY ON TRIAC ON pule out (Note2) Note: 1. The output i activated if the trigger ignal conform to the following criteria: - More than 3 trigger within 2 econd, - A trigger ignal utain duration > 0.34 econd, and - 2 trigger within 2 econd with pule duration of one > 0.16 econd. - The effective comparator output width i 24m.(Foc=16KHz) 2. The output duration i et by an external RC connected to the OSCD pin. 7
8 Maximum Rating (Above which the ueful life may be impaired. For uer guideline, not teted) Storage Temperature o C to +125 o C Supply oltage to Ground Potential (Input & Only) to +6.0 Supply oltage to Ground Potential (Output & D/O Only) -0.3 to +6.0 DC Input oltage to +6.0 DC Output Current... 20mA Power Diipation mW PT8A261/262 Note: Stree greater than thoe lited under MAXIMUM RATINGS may caue permanent damage to the device. Thi i a tre rating only and functional operation of the device at thee or any other condition above thoe indicated in the operational ection of thi pecification i not implied. Expoure to abolute maximum rating condition for extended period may affect reliability. Recommended Operation Condition Sm ym D ecriptio n Mn i Tp y Mx a Unit Supply oltag e I H Input HIGH oltage (MODE, ) I L nput LOW oltage (MODE, ) fs YS ytem Ocillator Frequency f DOSC T A CC I CC S khz Delay Ocillator Frequency khz Operation Temperatur e O C DC Electrical Characteritic Sm ym D ecriptio n T et Condition Mn i Tp y Mx a Unit I I H Input high level leakage current(zc, ) IH = µ Α I I L Input low level leakage current(zc, ) I O H Output Source Current (RELAY, TRIAC) I O L Output Sink Current (RELAY, TRIAC) TH1 DS Tranfer High oltag e TL1 DS Tranfer Low oltag e TH2 C Tranfer High oltag e TL2 C Tranfer Low oltag e TH3 SCS Tranfer High oltag e TL3 SCS Tranfer Low oltag e TH4 SCD Tranfer High oltag e TL4 SCD Tranfer Low oltag e IL OH OL = µ Α = ma = ma C C Z Z O O O O Note: Thee pecification apply for = 5.0 and -25 O C T A 70 O C, unle otherwie pecified. 8
9 AC Electrical Characteritic oltage Regulator Sm ym D ecriptio n T et Condition Mn i Tp y Mx a Unit EE Output oltag e No load OP2P Noninverting input of OP2 No load Ο LDR I L Line Regulation Load Regulation Regulator Output Current , I = 1mA m L = 5, 0.5mA I L 2mA m = ma Operational Amplifier and Window Comparator Sm ym D ecriptio n T et Condition Mn i Tp y Mx a Unit BW 3dB Bandwidth khz TH TL Window Comparator Threhold = =
10 Ocillator and ZC Input Pule and Trigger Output Pule Sm ym D ecriptio n T et Condition Mn i Tp y Mx a Unit fo SC Ocillator Frequency khz t ZR t ZF t ZP t ZW t OR t OF t OP t OW ZC Pule Rie Time n ZC Pule Fall Time n ZC Pule Period m ZC Pule Width = 5, R = 560Ω, S C S = 200pF, ee above fig m TRIAC Pule Rie Time n TRIAC Pule Fall Time n TRIAC Pule Period m TRIAC Pule Width µ Figure 10. Timing Diagram t ZR t ZF ZC t ZW t ZP t OF t OR TRIAC t OW top Power Diipation Sm ym D ecriptio n T et Condition Mn i Tp y Mx a Unit I CC Power Supply Current = 5, R = 560kΩ, C =200P, S S R D = 560kΩ, C = 200P, D other input pin = GND, all output float. ee fig 3, µa IC CQ Quiecent Power Supply Current C C = 5, All Input Pin = GND, all output float µa 10
11 Typical Application Circuit Figure 11. Two-Wire Application Circuit of PT8A261 AC 110~230 SW1 ON/OFF OERRIDE 20~100W LAMP Q1 TRIAC 2 1 C8 104 R14 68/2W 3 R1 20K 1N4007 D3 R9 200K C U/350 D2 1N4007 R9 1M D5 1N4007 C11 470UF/16 R2 2.4M D4 1N4148 R10 D P C7 PT8A261 R6 1M C C6 201 GND OP2O 16 C5 2 22UF/16 TRIAC OP2N 15 R5 R7 3 C9 OSCD OP2P 14 22K 1M 4 10UF/16 OSCS OP1O 13 R8 560K ZC OP1N 12 R4 C2 6 1M OP1P 11 OF F MODE AUT O O N 7 MODE 10 9 R12 E 8 R3 22K E SW2 C4 56K 100UF/16 D SG C12 R13 C1 100UF/16 SD6222 C UF/ 16 11
12 Figure 12. Three-Wire Application Circuit of PT8A262 C6 22UF/16 ON AUTO OFF AC 110~230 SW1 D7 5.1 R13 R1 D6 1N4007 C9 ON/OFF OERRIDE C5 470UF/16 100UF/35 20~100W LAMP C U/350 R5 22K R4 1M 203 C2 R3 56K C P G C6 R6 PT8A262 IN C3 1 1M R14 4.7K 201 GND OP2O 16 D1 Q1 203 K1 2 RELAY OP2N 15 C5 R10 1M 3 OSCD OP2P 14 C10 R9 560K 10UF/16 4 OSCS OP1O 13 R8 5 ZC OP1N 12 1M 6 OP1P 11 7 MODE 10 R6 MODE 1N D5 SW2 CC EE 9 68/2W R7 C4 100UF/16 D S 24 D2 D4 R12 2.4M 24 D3 1N K SD6222 C13 3.3nf/63 R12 22K C12 22UF/16 12
13 Mechanical Information P(DIP-16) 13
14 W(SOIC-16) Pericom Semiconductor Corparation Pericom Technology Incorporation reerve the right to make change to it product or pecification at any time, without notice, in order to improve deign or performance and to upply the bet poible product. Pericom Technology doe not aume any reponibility for ue of any circuitry decribed other than the circuitry embodied in Pericom Technology product. The company make no repreentation that circuitry decribed herein i free from patent infringement or other right, of Pericom. 14
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