Features. Introduction. Applications. Ordering Information

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1 80/809/80-8/8/-8/8/8-6/6/6/6 Features Precision supply-voltage monitor -.6V (8xxL, 6xL) -.8V (8xxM, 6xM) -.08V (8xxT, 6xT) -.9V (8xxS, 6xS) -.6V (8xxR, 6xR) -.V (8xxZ, 6xZ) -.0V (8xxY, 6xY) 00ms reset pulse width Debounced CMOS-compatible manual-reset input (8, 8, 8, 8, 6-6) Reset Output Signal for Watchdog and Power Abnormal, Manual Reset Reset Push-Pull output (809,8,8, 8,8,6,6) Reset Open-Drain output (80/6) Voltage monitor for power-fail or low battery warning Guaranteed / valid at V CC =.0V Introduction The xxx family microprocessor (µp) supervisory circuits are targeted to improve reliability and accuracy of power-supply circuitry in µp systems. These devices reduce the complexity and number of components required to monitor power-supply and battery functions. The main functions are:. Asserting reset output during power-up, powerdown and brownout conditions for µp system;. Detecting power failure or low-battery conditions with a.v threshold detector;. Watchdog functions;. Manual reset. Applications Power-supply circuitry in µp systems Ordering Information Part No. Push-Pull output Open-Drain output (push-pull) Manual Reset Input Power Fail Detector (.V) 80X X X X X X X X X X X X Watchdog Input Package SOT- SOT- SOT-6 Suffix: X -- Monitored Voltage Suffix X L M T S R Z Y Reset threshold (V)

2 80/809/80-8/8/-8/8/8-6/6/6/6 Contents Features... Ordering Information... Introduction... Block Diagram... Marking Information... Pin Information... Pin Configuration... Pin Description... 6 Functional Description... 7 Reset Output... 7 Watchdog Timer... 7 Manual Reset... 7 Power-Fail Comparator... 7 Recommended Operation Condition... 8 Detailed Specifications... 8 Absolute Maximum Ratings... 8 DC Electrical Characteristics... 9 AC Electrical Characteristics... 0 Mechanical Information... Notes...

3 80/809/80-8/8/-8/8/8-6/6/6/6 Block Diagram Figure. Block Diagram Watchdog Transition Detector Vcc Watchdog Timer Timebase for Reset & Watchdog Vcc Reset Generator () V RST PFI PFO.V

4 80/809/80-8/8/-8/8/8-6/6/6/6 Marking Information C ode Descriptio n Part Number Yea r Work Week Part Number Code Code Part No. Code Part No. Code Part No. AA 809L BC 80L CE 6L AB 809M BD 80M CF 6M AC 809T BE 80T CG 6T AD 809S BF 80S CH 6S AE 809R BG 80R CI 6R AF 809Z BH 80Z CJ 6Z AG 809Y BI 80Y CK 6Y AH 80L BJ 8L CL 6L AI 80M BK 8M CM 6M AJ 80T BL 8T CN 6T AK 80S BM 8S CO 6S AL 80R BN 8R CP 6R AM 80Z BO 8Z CQ 6Z AN 80Y BP 8Y CR 6Y AO 8L BQ 8L CS 6L AP 8M BR 8M CT 6M AQ 8T BS 8T CU 6T AR 8S BT 8S CV 6S AS 8R BU 8R CW 6R AT 8Z BV 8Z CX 6Z AU 8Y BW 8Y CY 6Y AV 8L BX 8L CZ 6L AW 8M BY 8M DA 6M AX 8T BZ 8T DB 6T AY 8S CA 8S DC 6S AZ 8R CB 8R DD 6R BA 8Z CC 8Z DE 6Z BB 8Y CD 8Y DF 6Y

5 80/809/80-8/8/-8/8/8-6/6/6/6 Pin Information Pin Configuration Figure. Pin Configuration SOT SOT- 8 8 NC NC SOT PFI PFO PFI PFO PFI PFO

6 80/809/80-8/8/-8/8/8-6/6/6/6 Pin Description Table. Pin Description P in Name Vcc PFI PFO T yp e I Power Ground I O I Descriptio n M anual-reset: (CMOS). Active low. Pull low to force a reset. Reset remains asserted for the duration of the Reset Timeout Period after transitions from low to high. Leave unconnected or connected to if not used. P ower Supply: Reset is asserted when V remains asserted until V rises above V CC R Period (t once V rises above V ) RS CC G round Referenc e for all signals. R ST CC P ower-fail Voltage Monitor Input. When PFI < when not used. ST drops below the Reset Threshold Voltage ( V ). Reset RST and keep asserted for the duration of the Reset Timeout V PFT, PFO goes low. Connect PFI to or Vcc P ower-fail Output: it gets low and sinks current when PFI is less than.v; otherwise PFO stays high. Watchdog Input (CMOS). If remains high or low for the duration of the watchdog timeout period ( t ), the internal watchdog timer trigger a reset output. Floating or connecting to a high- WD impedance three-state buffer disables the watchdog feature. The internal watchdog timer clears whenever reset is asserted or occurs a rising or falling edge. O A ctive-low Reset Output (Push-Pull or Open-Drain). It goes low when Vcc is below the reset threshold. It remains low for about 00ms after one of the following occurs: Vcc rises above the reset threshold (V ), the watchdog triggers a reset, or goes from low to high. R ST O T he inverse of RES E T, active high. Whenever is high, is low. NC - No connectio n 6

7 80/809/80-8/8/-8/8/8-6/6/6/6 Functional Description Reset Output A microprocessor s (µp s) reset input starts the µp in a known state. Whenever the µp is in an unknown state, it should be held in reset. The supervisory circuits assert reset during powerup and prevent code execution errors during power-down or brownout conditions. On power-up, once Vcc reaches about.0v, is a guaranteed logic low of 0.V or less. As Vcc rises, stays low. When Vcc rises above the reset threshold, an internal timer releases after about 00ms. pulses low whenever Vcc drops below the reset threshold, i.e. brownout condition. If brownout occurs in the middle of a previously initiated reset pulse, the pulse continues for at least another 00ms. On powerdown, once Vcc falls below the reset threshold, stays low and is guaranteed to be 0.V or less until Vcc drops below.0v. Fig shows the timing relationship. The active-high output is simply the inverse of the output, and is guaranteed to be valid with Vcc down to.0v. Watchdog Timer The 8/8 watchdog circuit monitors the µp s activity. If the µp does not toggle the watch-dog input () within.6s, reset asserts. As long as reset is asserted or the input is toggled, the watchdog timer will stay clear and will not count. As soon as reset is released, the timer will start counting. input pulses as short as 0ns can be detected. Disable the watchdog function by leaving unconnected or by three-stating driver connected to. Manual Reset The manual-reset input () allows reset to be triggered by a push button switch. has an internal pullup resistor, so it can be left open when not used. Power-Fail Comparator The power-fail comparator can be used for various purposes because its output and noninverting input are not internally connected. The inverting input is internally connected to a.v reference. Figure. Typical Application Circuit IN DC Linear Regulator µp Vcc Vcc µp Supervisory PFI Circuit I/O Line PFO Interrupt 7

8 80/809/80-8/8/-8/8/8-6/6/6/6 Detailed Specifications Absolute Maximum Ratings Storage Temperature o C to +0 o C Ambient Temperature with Power Applied o C to +8 o C Supply Voltage to Ground Potential (Vcc to ) V to +7.0V DC Input Voltage (All inputs except Vcc and ) V to V CC +0.V DC Output Current (All outputs)... 0mA Power Dissipation... 0mW (Depend on package) Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Recommended Operation Condition Table. DC Electrical Characteristics Sm ym D escriptio n T est Condition s Mn i Tp y p Mx a Uni t Supply Voltage for x x x L, x x x M.. 0. V V CC Supply Voltage for x x T, x x x S. 0.. V Supply Voltage for x x x R V Supply Voltage for x x x Z, x x x Y... V V IH V IL T A Input High Voltag e Input Low Voltag e 0.7VC C 0.VC C Operating Temperatur e -0 8 O C V V 8

9 80/809/80-8/8/-8/8/8-6/6/6/6 DC Electrical Characteristics Table. DC Electrical Characteristics (Vcc=V RN +% to.v, T A = -0~8 C, unless otherwise noted) Symbol Description Test Conditions Min Typ Max Unit V CC Operating Voltage Range.0. V I CC Supply Current Vcc = V, No load 0 0 µa V IH Input High Voltage Pin:, 0.7 Vcc V V IL Input Low Voltage Pin:, 0. Vcc V V RST V RTH Reset Threshold Voltage (Note ) T A = -0 ~ 8 C Reset Threshold Hysteresis(Note ) V RN-.% V RN V RN+.% xxxl xxxm xxxt xxxs xxxr xxxz xxxy..0. Vcc varies between V RN ±% 70 mv Vcc.V Isource=800µA Vcc-. V OH Output High Voltage Vcc.7V Isource=00µA 0.8 Vcc V Vcc.8V Isource=0µA 0.8 Vcc Vcc.V Isink=.mA 0. V OL Output Low Voltage Vcc.7V Isink=.mA 0. V Vcc.V Isink=00µA 0. I LKG Open-Drain Output V CC > V TH(MAX) Leakage Current for 80 and 6 µa V PFT PFI Input Threshold V PFI varies from.v and.0v.0..0 V I PFI I PFI Input Leakage Current Average Input connected to V CC :.V 0 60 Current (Note ) connected to -0 - V ± na µa r pull-up resistor (internal) 8/ /8/8 7 6/6/6 60 * Valid for both and. V RN is nominal reset threshold voltage. ** is internally serviced within the watchdog period if is left unconnected. kω 9

10 80/809/80-8/8/-8/8/8-6/6/6/6 AC Electrical Characteristics Table. AC Electrical Characteristics Sm ym D escriptio n T est Condition s Mn i Tp y Mx a Unit s t RS Reset Pulse Width from low to High ms t WD Watchdog Timeout Period and tied to V V + V CC > % R N, C C.. 6. s t Pulse Width µs t MD to Delay V CC =.0V 0 ns t WP Pulse Width 0 ns Figure. Watchdog Timing Diagram V CC V RST V RST t RS t WD t RS t RS t WP t MD t 0

11 80/809/80-8/8/-8/8/8-6/6/6/6 Mechanical Information Figure. SOT BSC Datum A 0 o - 0 o BSC MAX SEATING PLANE X.XX Denotes Dimensions X.XX In Millimeters Notes: )Controlling dimensions in millimeters )Ref: EIAJ SC-7A )Foot length is measured at flat portion of foot, reference to Datum A

12 80/809/80-8/8/-8/8/8-6/6/6/6 Figure 6. SOT BSC Datum A 0 o - 0 o BSC MAX SEATING PLANE X.XX Denotes Dimensions X.XX In Millimeters Notes: )Controlling dimensions in millimeters )Ref: EIAJ SC-7A )Foot length is measured at flat portion of foot, reference to Datum A

13 80/809/80-8/8/-8/8/8-6/6/6/6 Figure 7. SOT BSC Datum A 0 o - 0 o BSC MAX SEATING PLANE X.XX Denotes Dimensions X.XX In Millimeters Notes: )Controlling dimensions in millimeters )Ref: EIAJ SC-7A )Foot length is measured at flat portion of foot, reference to Datum A

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