PART. Maxim Integrated Products 1
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1 ; Rev 1; 7/00 Pin-Selectable Watchdog Timer General Decription The are pin-electable watchdog timer that upervie microproceor (µp) activity and ignal when a ytem i operating improperly. During normal operation, the microproceor hould repeatedly toggle the watchdog input (WDI) before the elected watchdog timeout period elape to demontrate that the ytem i proceing code properly. If the µp doe not provide a valid watchdog input tranition before the timeout period expire, the upervior aert a watchdog (WDO) output to ignal that the ytem i not executing the deired intruction within the expected time frame. The watchdog output pule can be ued to reet the µp or interrupt the ytem to warn of proceing error. The are flexible watchdog timer upervior that can increae ytem reliability through notification of code execution error. The family offer everal pin-electable watchdog timing option to match a wide range of ytem timing application: Watchdog tartup delay: provide an initial delay before the watchdog timer i tarted. Watchdog timeout period: normal operating watchdog timeout period after the initial tartup delay. Watchdog output/timing option: open drain (100m) or puh-pull (1m). The operate over a +2.5V to +5.5V upply range and are available in miniature 8-pin SOT23 package. Application Embedded Control Sytem Indutrial Controller Critical µp and Microcontroller (µc) Monitoring Automotive Telecommunication Networking Feature Preciion Watchdog Timer for Critical µp Application Pin-Selectable Watchdog Timeout Period Pin-Selectable Watchdog Startup Delay Period Ability to Change Watchdog Timing Characteritic Without Power Cycling Open-Drain or Puh-Pull Puled Active-Low Watchdog Output Watchdog Timer Diable Feature +2.5V to +5.5V Operating Voltage 8µA Low Supply Current No External Component Required Miniature 8-Pin SOT23 Package PART Ordering Information TEMP. RANGE PIN- PACKAGE TOP MARKS MAX6369KA-T -40 C to +85 C 8 SOT23-8 AADC MAX6370KA-T -40 C to +85 C 8 SOT23-8 AADD MAX6371KA-T -40 C to +85 C 8 SOT23-8 AADE MAX6372KA-T -40 C to +85 C 8 SOT23-8 AADF MAX6373KA-T -40 C to +85 C 8 SOT23-8 AADG MAX6374KA-T -40 C to +85 C 8 SOT23-8 AADH Note: All device are available in tape-and-reel only. Required order increment i 2,500 piece. Pin Configuration appear at end of data heet. Selector Guide PART OUTPUT WDO PULSE WIDTH (m) MINIMUM STARTUP DELAY MINIMUM WATCHDOG TIMEOUT MAX6369 Open Drain 100 Selectable: 1m to 60 S el ectab l e: 1m to 60 MAX6370 Puh-Pull 1 Selectable: 1m to 60 S el ectab l e: 1m to 60 MAX6371 Open Drain S el ectab l e: 1m to 60 MAX6372 Puh-Pull 1 60 S el ectab l e: 1m to 60 MAX6373 Open Drain 100 S el ectab l e: 200µ to 60 or fi r t ed g e S el ectab l e: 30µ to 10 MAX6374 Puh-Pull 1 S el ectab l e: 200µ to 60 or fi r t ed g e S el ectab l e: 30µ to 10 Maxim Integrated Product 1 For free ample and the latet literature, viit or phone For mall order, phone
2 ABSOLUTE MAXIMUM RATINGS Terminal Voltage (with repect to GND) V CC V to +6V WDI V to +6V WDO (Open Drain: MAX6369/71/73) V to +6V WDO (Puh-Pull: MAX6370/72/ V to (V CC + 0.3V) SET0, SET1, SET V to (V CC + 0.3V) Maximum Current, Any Pin (input/output)...20ma Stree beyond thoe lited under Abolute Maximum Rating may caue permanent damage to the device. Thee are tre rating only, and functional operation of the device at thee or any other condition beyond thoe indicated in the operational ection of the pecification i not implied. Expoure to abolute maximum rating condition for extended period may affect device reliability. ELECTRICAL CHARACTERISTICS Continuou Power Diipation (T A = +70 C) SOT23-8 (derate 8.75mW/ C above +70 C)...700mW Operating Temperature Range C to +85 C Storage Temperature Range C to +150 C Junction Temperature C Lead Temperature (oldering, 10) C V CC Rie or Fall Rate V/µ (V CC = +2.5V to +5.5V, SET_ = V CC or GND, T A = -40 C to +85 C, unle otherwie noted. Typical value are at T A = +25 C and V CC = +3V.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Operating Voltage Range V CC V Supply Current I CC No load 8 20 µa Input High Voltage V IH WDI, SET0, SET1, SET2 0.8 V CC V WDI, SET0, SET1, V CC 3.3V 0.8 Input Low Voltage V IL SET2 V CC 2.5V 0.6 Logic Input Current (Note 2) WDI or SET_ = 0 or V CC 0 ±10 na WDO Output Low Voltage V OL I SINK = 1.2mA, V CC > 2.7V, watchdog output aerted I SINK = 6mA, V CC > 4.5V, watchdog output aerted V 0.3 V 0.4 V WDO Leakage Current I LKG V NDO = 0 to +5.5V, output deaerted, MAX6369/MAX6371/MAX µa WDO Output High Voltage MAX6369/MAX6370 Startup Delay Period V OH t DELAY I SOURCE = 500µA, V CC > 2.7V, watchdog output deaerted I SOURCE = 800µA, V CC > 4.5V, watchdog output deaerted 0.8 V CC V CC SET2 = 0, SET1 = 0, SET0 = SET2 = 0, SET1 = 0, SET0 = V CC SET2 = 0, SET1 = V CC, SET0 = Watchdog Diabled SET2 = V CC, SET1 = 0, SET0 = m SET2 = V CC, SET1 = 0, SET0 = V CC 1 3 SET2 = V CC, SET1 = V CC, SET0 = SET2 = V CC, SET1 = V CC, SET0 = V CC V m 2
3 ELECTRICAL CHARACTERISTICS (continued) (V CC = +2.5V to +5.5V, SET_ = V CC or GND, T A = -40 C to +85 C, unle otherwie noted. Typical value are at T A = +25 C and V CC = +3V.) (Note 1) Watchdog Timeout Period PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS MAX6371/MAX6372 SET2 = 0, SET1 = 0, SET0 = SET2 = 0, SET1 = 0, SET0 = V CC SET2 = 0, SET1 = V CC, SET0 = Watchdog Diabled SET2 = V CC, SET1 = 0, SET0 = m SET2 = V CC, SET1 = 0, SET0 = V CC 1 3 SET2 = V CC, SET1 = V CC, SET0 = SET2 = V CC, SET1 = V CC, SET0 = V CC Watchdog Diabled Startup Delay Period t DELAY All other SET_ condition Watchdog Time-Out Period MAX6373/MAX6374 Startup Delay Period Watchdog Timeout Period t DELAY SET2 = 0, SET1 = 0, SET0 = SET2 = 0, SET1 = 0, SET0 = V CC 3 9 SET2 = 0, SET1 = V CC, SET0 = Watchdog Diabled SET2 = V CC, SET1 = 0, SET0 = SET2 = V CC, SET1 = 0, SET0 = V CC SET2 = V CC, SET1 = V CC, SET0 = SET2 = V CC, SET1 = V CC, SET0 = V CC SET2 = 0, SET1 = 0, SET0 = m SET2 = 0, SET1 = 0, SET0 = V CC 3 9 SET2 = 0, SET1 = V CC, SET0 = Watchdog Diabled SET2 = V CC, SET1 = 0, SET0 = µ SET2 = V CC, SET1 = 0, SET0 = V CC Firt Edge (Note 3) SET2 = V CC, SET1 = V CC, SET0 = 0 Firt Edge (Note 3) SET2 = V CC, SET1 = V CC, SET0 = V CC SET2 = 0, SET1 = 0, SET0 = m SET2 = 0, SET1 = 0, SET0 = V CC 3 9 SET2 = 0, SET1 = V CC, SET0 = Watchdog Diabled SET2 = V CC, SET1 = 0, SET0 = µ SET2 = V CC, SET1 = 0, SET0 = V CC 1 3 SET2 = V CC, SET1 = V CC, SET0 = SET2 = V CC, SET1 = V CC, SET0 = V CC m m m 3
4 ELECTRICAL CHARACTERISTICS (continued) (V CC = +2.5V to +5.5V, SET_ = V CC or GND, T A = -40 C to +85 C, unle otherwie noted. Typical value are at T A = +25 C and V CC = +3V.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Watchd og Inp ut P ul e Wi d th ( N ote 2) I After WDO deaerted 100 n MAX6369/MAX6371/MAX m Watchdog Output Pule Width O MAX6370/MAX6372/MAX m Internal Setup Time (Note 4) t SETUP After WDO deaerted m Note 1: Production teted at T A = +25 C. Guaranteed by deign over temperature limit. Note 2: Guaranteed by deign. Note 3: In thi etting the watchdog timer i inactive and tartup delay end when WDI ee it firt level tranition. See Selecting Device Timing for more information. Note 4: After power-up, or a etting change, there i an internal etup time during which WDI i ignored. (Circuit of Figure 1, T A = +25 C, unle otherwie noted.) Typical Operating Characteritic SUPPLY CURRENT (µa) SUPPLY CURRENT v. TEMPERATURE V CC = +5.5V V CC = +2.5V TEMPERATURE ( C) MAX6369/74-01 NORMALIZED WATCHDOG TIMEOUT PERIOD WATCHDOG TIMEOUT PERIOD v. TEMPERATURE TEMPERATURE ( C) MAX6369/
5 PIN NAME FUNCTION 1 WDI 2 GND Ground Watchdog Input. If WDI remain either high or low for the duration of the watchdog timeout period ( ), WDO trigger a pule. The internal watchdog timer clear whenever a WDO i aerted or whenever WDI ee a riing or falling edge. 3 N.C. Not Connected. Do not make any connection to thi pin. 4 SET0 S et Z er o. Log i c i np ut for el ecti ng tar tup d el ay and w atchd og ti m eout p er i od. S ee Tab l e 1 for ti m i ng d etai l. 5 SET1 S et One. Log i c i np ut for el ecti ng tar tup d el ay and w atchd og ti m eout p er i od. S ee Tab l e 1 for ti m i ng d etai l. 6 SET2 S et Tw o. Log i c i np ut for el ecti ng tar tup d el ay and w atchd og ti m eout p er i od. S ee Tab l e 1 for ti m i ng d etai l. 7 WDO Watchdog Output. Pule low for the watchdog output pule width, O, when the internal watchdog time out. The MAX6369/MAX6371/MAX6373 have open-drain output and require a pull-up reitor. The MAX6370/MAX6372/MAX6374 output are puh-pull. 8 V CC Supply Voltage (+2.5V to +5.5V) Pin Decription Table 1. Minimum Timeout Setting LOGIC INPUTS MAX6369/MAX6370 MAX6371/MAX6372 MAX6373/MAX6374 SET2 SET1 SET0 t DELAY, t DELAY = 60, t DELAY m 1m 3m 3m m 3m m 10m Diabled Diabled Diabled Diabled m 100m 200µ 30µ m Firt Edge Firt Edge Detailed Decription The are flexible watchdog circuit for monitoring µp activity. During normal operation, the internal timer i cleared each time the µp toggle the WDI with a valid logic tranition (low to high or high to low) within the elected timeout period ( ). The WDO remain high a long a the input i trobed within the elected timeout period. If the input i not trobed before the timeout period expire, the watchdog output i aerted low for the watchdog output pule width (O ). The device type and the tate of the three logic control pin (SET0, SET1, and SET2) determine watchdog timing characteritic. The three baic timing variation for the watchdog tartup delay and the normal watchdog timeout period are ummarized below (ee Table 1 for the timeout characteritic for all device in the family): Watchdog Startup Delay: Provide an initial delay before the watchdog timer i tarted. Allow time for the µp ytem to power up and initialize before auming reponibility for normal watchdog timer update. Include everal fixed or pin-electable tartup delay option from 200µ to 60, and an option to wait for the firt watchdog input tranition before tarting the watchdog timer. 5
6 SET 2 SET 1 SET 0 Figure 1. Functional Diagram CONTROL LOGIC V CC WDI TRANSITION DETECTOR CLEAR ENABLE SET WATCHDOG TIMEOUT SET STARTUP DELAY WATCHDOG TIMER CIRCUITRY GND EN OUT OUTPUT WDO V CC t SETUP t DELAY WDI WDO A A B C D E F G E O A B C TRANSITIONS ON WDI IGNORED DURING SETUP DELAY. TRANSITION(S) ON WDI IGNORED DURING STARTUP DELAY PERIOD. WATCHDOG TIMER STARTS AFTER STARTUP DELAY AND WDO IS DEASSERTED. D TRANSITION OCCURS BEFORE WATCHDOG TIMEOUT PERIOD. WATCHDOG TIMER CLEARS AND STARTS TIMER AGAIN. E F G WATCHDOG TIMES OUT, WDO ASSERTS. TRANSITIONS ON WDI IGNORED WHEN WDO ASSERTED. WATCHDOG TIMER STARTS AFTER WDO DEASSERTS. Figure 2. Watchdog Timing Watchdog Timeout Period: Normal operating watchdog timeout period after the initial tartup delay. A watchdog output pule i aerted if a valid watchdog input tranition i not received before the timeout period elape. Eight pin-electable timeout period option for each device, from 30µ to 60. Pin-electable watchdog timer diable feature. Watchdog Output/Timing Option: Open drain, active low with 100m minimum watchdog output pule (MAX6369/MAX6371/MAX6373). Puh-pull, active low with 1m minimum watchdog output pule (MAX6370/MAX6372/MAX6374). Each device ha a watchdog tartup delay that i initiated when the upervior i firt powered or after the uer modifie any of the logic control et input. The watchdog timer will not begin to count down until the 6
7 completion of the tartup delay period, and no watchdog output pule will be aerted during the tartup delay. When the tartup delay expire, the watchdog begin counting it normal watchdog timeout period and waiting for WDI tranition. The tartup delay allow time for the µp ytem to power up and fully initialize before auming reponibility for the normal watchdog timer update. Startup delay period vary between the different device and may be altered by the logic control et pin. To enure that the ytem generate no undeired watchdog output, the routine watchdog input tranition hould begin before the elected minimum tartup delay period ha expired. The normal watchdog timeout period countdown i initiated when the tartup delay i complete. If a valid logic tranition i not recognized ai before the watchdog timeout period ha expired, the upervior aert a watchdog output. Watchdog timeout period vary between the different device and may be altered by the logic control et pin. To enure that the ytem generate no undeired watchdog output, the watchdog input tranition hould occur before the elected minimum watchdog timeout period ha expired. The tartup delay and the watchdog timeout period are determined by the tate of the SET0, SET1, and SET2 pin, and by the particular device within the family. For the MAX6369 and MAX6370, the tartup delay i equal to the watchdog timeout period. The tartup and watchdog timeout period are pin electable from 1m to 60 (minimum). For the MAX6371 and MAX6372, the tartup delay i fixed at 60 and the watchdog timeout period i pin electable from 1m to 60 (minimum). The MAX6373/MAX6374 provide two timing variation for the tartup delay and normal watchdog timeout. Five of the pin-electable mode provide tartup delay from 200µ to 60 minimum, and watchdog timeout delay from 3m to 10 minimum. Two of the electable mode do not initiate the watchdog timer until the device receive it firt valid watchdog input tranition (there i no fixed period by which the firt input mut be received). Thee two extended tartup delay mode are ueful for application requiring more than 60 for ytem initialization. All the device may be diabled with the proper logic control pin etting (Table 1). Application Information Input Signal Conideration Watchdog timing i meaured from the lai riing or falling edge aociated with a pule of at leat 100n in width. WDI tranition are ignored when WDO i aerted, and during the tartup delay period (Figure 2). Watchdog input tranition are alo ignored for a etup period, t SETUP, of up to 300µ after power-up or a etting change (Figure 3). Selecting Device Timing SET2, SET1, and SET0 program the tartup delay and watchdog timeout period (Table 1). Timeout etting can be hard wired, or they can be controlled with logic gate and modified during operation. To enure mooth tranition, the ytem hould trobe WDI immediately before the timing etting are changed. Thi minimize the rik of initializing a etting change too late in the timer countdown period and generating undeired watchdog output. After changing the timing etting, two outcome are poible baed on WDO. If the change i made while WDO i aerted, the previou etting i allowed to finih, the characteritic of the new etting are aumed, and the new tartup phae i entered after a 300µ etup time (t SETUP ) elape. If the change i made while WDO i not aerted, the new etting i initiated immediately, and the new tartup phae i entered after the 300µ etup time elape. WDI WDO * * * * * SET_ *IGNORED EDGE t SETUP t DELAY t SETUP t DELAY Figure 3. Setting Change Timing 7
8 START SET WDI HIGH PROGRAM CODE SUBROUTINE OR PROGRAM LOOP SET WDI LOW RETURN Figure 4. Watchdog Flow Diagram POSSIBLE INFINITE LOOP PATH Selecting 011 (SET2 = 0, SET1 = 1, SET0 = 1) will diable the watchdog timer function on all device in the family. Operation may be reenabled without powering down by changing the et input to the new deired etting. The device will aume the new elected timing characteritic and enter the tartup phae after the 300µ etup time elape (Figure 3). The MAX6373/MAX6374 offer a firt-edge feature. In firt-edge mode (etting 101 or 110, Table 1), the internal timer doe not control the tartup delay period. Intead, tartup terminate when WDI ee a tranition. If changing to firt-edge mode while the device i operating, diable mode mut be entered firt. It i then afe to elect firt-edge mode. Entering diable mode firt enure the output will be unaerted when electing firt-edge mode and remove the danger of WDI being maked out. Output The MAX6369/MAX6371/MAX6373 have an active-low, open-drain output that provide a watchdog output pule of 100m. Thi output tructure will ink current when WDO i aerted. Connect a pull-up reitor from WDO to any upply voltage up to +5.5V. Select a reitor value large enough to regiter a logic low (ee Electrical Characteritic), and mall enough to regiter a logic high while upplying all input current and leakage path connected to the WDO line. A 10kΩ pull-up i ufficient in mot application. The MAX6370/ MAX6372/MAX6374 have puh-pull output that provide an active-low watchdog output pule of 1m. When WDO deaert, timing begin again at the beginning of the watchdog timeout period (Figure 2). Uage in Noiy Environment If uing the watchdog timer in an electrically noiy environment, a bypa capacitor of 0.1µF hould be connected between V CC and GND a cloe to the device a poible, and no further away than 0.2 inche. Watchdog Software Conideration To help the watchdog timer monitor oftware execution more cloely, et and reet the watchdog input at different point in the program, rather than puling the watchdog input high-low-high or low-high-low. Thi technique avoid a tuck loop, in which the watchdog timer would continue to be reet inide the loop, keeping the watchdog from timing out. Figure 4 how an example of a flow diagram where the I/O driving the watchdog input i et high at the beginning of the program, et low at the end of every ubroutine or loop, then et high again when the program return to the beginning. If the program hould hang in any ubroutine, the problem would be quickly corrected, ince the I/O i continually et low and the watchdog timer i allowed to time out, cauing WDO to pule. TOP VIEW WDI GND N.C. SET0 TRANSISTOR COUNT: 1500 PROCESS: BiCMOS MAX6369 MAX6370 MAX6371 MAX6372 MAX6373 MAX6374 SOT23-8 Pin Configuration V CC WDO SET2 SET1 Chip Information Maxim cannot aume reponibility for ue of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licene are implied. Maxim reerve the right to change the circuitry and pecification without notice at any time. 8 Maxim Integrated Product, 120 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Product Printed USA i a regitered trademark of Maxim Integrated Product.
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19-2440; Rev 4; 12/05 Low-Power, SC70/SOT µp Reset Circuits with General Description The low-power microprocessor supervisor circuits monitor system voltages from 1.6V to 5V. These devices perform a single
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19-3474; Rev 2; 8/07 Silicon Oscillator with Low-Power General Description The dual-speed silicon oscillator with reset is a replacement for ceramic resonators, crystals, crystal oscillator modules, and
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19-3491; Rev 1; 3/07 Silicon Oscillator with Reset Output General Description The silicon oscillator replaces ceramic resonators, crystals, and crystal-oscillator modules as the clock source for microcontrollers
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19-11; Rev ; 1/5 -Pin µp oltage Monitors General Description The are low-power microprocessor (µp) supervisory circuits used to monitor power supplies in µp and digital systems. They provide excellent
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