Extremely Accurate Power Surveillance, Software Monitoring and Sleep Mode Detection. Pin Assignment. Fig. 1

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1 EM MICOELECTONIC - MAIN SA Extremely Accurate Power Surveillance, Software Monitoring and Sleep Mode Detection Description The offers a high level of integration by voltage monitoring and software monitoring in an 8 lead package. A comparator monitors the voltage applied at the IN input comparing it with an internal reference. The poweron reset function is initialized after IN reaches and takes the reset output inactive after T PO depending of external resistance. The reset output goes active low when the IN voltage is less than The ES and outputs are guaranteed to be in a correct state for a supply voltage as low as 1.2. The watchdog function monitors software cycle time and execution. If software clears the watchdog too quickly (incorrect cycle time) or too slowly (incorrect execution), it will cause the system to be reset. The system enable output prevents critical control functions being activated until software has successfully cleared the watchdog three times. Such a security could be used to prevent motor controls being energized on repeated resets of a faulty system. If the microcontroller does not work that means no signal on the input the goes in a standby mode (CAN-bus sleep detector). Features Can-bus sleep mode detector Standby mode, maximum current 50 µa eset output guaranteed for DD voltage down to 1.2 Comparator for voltage monitoring, voltage reference ± 2.0% voltage reference accuracy at +25 C ± 2.7% voltage reference accuracy from 40 to +85 C (3 to 5.5 ) Programmable reset voltage monitoring Programmable power-on reset (PO) delay Watchdog with programmable time windows guarantees a minimum time and a maximum time between software clearing of the watchdog Time base accuracy ± 10% System enable output offers added security TTL / CMOS compatible 40 to +85 C temperature range On request extended temperature range, 40 to +125 C SO8 package Applications Automotive systems Cellular telephones Security systems Battery powered products High efficiency linear power supplies Industrial electronics Typical Operating Configuration Pin Assignment SS DD IN ES nf ES GND Fig. 1 Fig. 2 Copyright 2004, EM Microelectronic-Marin SA 1

2 Absolute Maximum atings Parameter Symbol Conditions Maximum voltage at DD DDmax SS + 8 Minimum voltage at DD DDmin SS 0.3 Max. voltage at any signal pin MAX DD Min. voltage at any signal pin MIN SS 0.3 Storage temperature T STO -65 to +150 C Electrostatic discharge max. to MIL-STD-883 method Smax 0 with ref. to SS Max. soldering conditions T Smax 250 C x 10s Table 1 Stresses above these listed maximum ratings may cause permanent damages to the device. Exposure beyond specified operating conditions may affect device reliability or cause malfunction. Operating Conditions Parameter Symbol Min. Max. Units Operating temperature 1) T A C Supply voltage 2) DD ES & guaranteed 3) DD 1.2 Comparator input voltage IN 0 DD C-oscillator programming 10 0 kω Table 2 1) The maximum operating temperature is confirmed by sampling at initial device qualification. In production, all devices are tested at +85 C. On request devices tested at +125 C can be supplied. 2) A nf decoupling capacitor is required on the supply voltage DD for stability. 3) ES must be pulled up externally to DD even if it is unused. (Note: ES and are used as inputs by EM test.) Handling Procedures This device has built-in protection against high static voltages or electric fields; however, it is advised that normal precautions be taken as for any other CMOS component. Unless otherwise specified, proper operation can only occur when all terminal voltages are kept within the voltage range. At any time, all inputs must be tied to a defined logic voltage level. Electrical Characteristics 3 DD = 5.5, C = nf, T A = -40 to +85 C, unless otherwise specified Parameter Symbol Test Conditions Min. Typ. Max. Units Supply current in standby mode (switched to INT) Supply current I SS I SS EXT = don t care, T CL = DD, IN = DD EXT = kω, I/Ps at DD, µa µa ES and Output Low oltage OL OL OL OL DD = 4.5, I OL = 20 ma DD = 4.5, I OL = 8 ma DD = 2.0, I OL = 4 ma DD = 1.2, I OL = 0.5 ma Output High oltage OH OH OH DD = 4.5, I OH = 1 ma DD = 2.0, I OH = µa DD = 1.2, I OH = 30 µa and IN T CL Input Low Level T CL Input High Level Leakage current T CL input IN input resistance IL IH I LI IN SS DD SS DD 1 µa MΩ Comparator reference 1) EF EF EF T A = +25 C T A = -40 to +125 C Comparator hysteresis 1) HY 2 m Table 3 1) The comparator reference is the power-down reset threshold. The power-on reset threshold equals the comparator reference voltage plus the comparator hysteresis (see Fig. 6). Copyright 2004, EM Microelectronic-Marin SA 2

3 I SS Standby versus Temperature at DD = 5.5 ISS [µa] T A [ C] Fig. 3 Timing Characteristics DD = 5.0 ± 3%, C = nf, T A = 40 to +85 C, unless otherwise specified Propagation delays: Parameter Symbol Test Conditions Min. Typ. Max. Units T CL to Output Pins T DIDO ns IN sensitivity T S µs Logic Transition Times on all Output Pins T T Load 10 kω, 50 pf 30 ns Power-on eset delay T PO EXT = 110 kω, ±1% ms Watchdog Time T WD EXT = 110 kω, ±1% ms Open Window Percentage OWP ±0.2 T WD Closed Window Time T CW T CW EXT = 110 kω, ±1% T WD ms Open Window Time T OW T OW EXT = 110 kω, ±1% T WD ms Watchdog eset Pulse T WD T WD EXT = 110 kω, ±1% T WD / ms T CL Input Pulse Width T 150 ns eset Pulse when switched to internal T I s Watchdog eset Pulse with internal ( I) T I T I/320 s Table 4 T I versus Temperature at DD = T I [s] T A [ C] Fig. 4 Copyright 2004, EM Microelectronic-Marin SA 3

4 Timing Waveforms Watchdog Timeout Period T WD = T PO OWP 20% + OWP + 20% Condition: EXT = kω Watchdog timer reset T CW closed window T OW open window t [ms] oltage Monitoring Fig. 5 EF IN HY Conditions: DD 3 No timeout T S T S T S T S T PO T PO ES Fig. 6 Timer eaction Conditions: IN > EF after power-up sequence T CW T OW T CW T CW+T OW T CW+T OW T CW+T OW T CW+T OW T T I T CW+T OW ES T WD T I T WD correct services goes active low Timeout After 3 reset pulse periods switch to internal After one edge (falling or rising) on input switch to input - Watchdog timer reset Fig. 7 Copyright 2004, EM Microelectronic-Marin SA 4

5 Combined oltage and Timer eaction IN EF Condition: DD 3 T PO =T WD T OW T CW T CW +T OW T I ES T I Watchdog timer reset too early 3 correct service goes active low After 3 reset pulse periods switch to internal Fig. 8 Block Diagram ES Fig. 9 Copyright 2004, EM Microelectronic-Marin SA 5

6 Pin Description Pin Name Function 1 Push-pull active low enable output Open drain active low reset output. 2 ES ES must be pulled up to DD even if unused 3 Watchdog timer clear input signal 4 SS GND terminal 5 NC No connection 6 DD oltage supply 7 EXT input for C oscillator tuning 8 IN oltage comparator input Table 5 Functional Description IN Monitoring The power-on reset and the power-down reset are generated as a response to the external voltage level applied on the IN input. The DD voltage at which reset is asserted or released is determined by the external voltage divider between DD and SS, as shown on Fig. 10. A part of DD is compared to the internal voltage reference. To determine the values of the divider, the leakage current at IN must be taken into account, as well as the current consumption of the divider itself. Low resistor values will need more current, but high resistor values will make the reset threshold less accurate at high temperature, due to a possible leakage current at the IN input. The sum of the two resistors should stay below 300 kω. The formula is: ESET = EF * (1 + 1/ 2). Example: choosing 1 = kω and 2 = 39 kω will result in a DD reset threshold of 4.54 (typ.). At power-up the reset output ( ES ) is held low (see Fig. 6). When IN becomes greater than EF, the ES output is held low for an additional power-on reset (PO) delay which is equal to the watchdog time T WD (typically ms with an external resistor of 110 kω connected at pin). The PO delay prevents repeated toggling of ES even if IN and the INPUT voltage drops out and recovers. The PO delay allows the microprocessor s crystal oscillator time to start and stabilize and ensures correct recognition of the reset signal to the microprocessor. The ES output goes active low generating the powerdown reset whenever IN falls below EF. The sensitivity or reaction time of the internal comparator to the voltage level on IN is typically 5 µs. Timer Programming The on-chip oscillator needs an external resistor EXT connected between the pin and SS (see Fig. 10). It allows the user to adjust the power-on reset (PO) delay, watchdog time T WD and with this also the closed and open time windows as well as the watchdog reset pulse width (T WD/40). With EXT = 110 kω, the typical values are: - Power-on reset delay: T PO is ms - Watchdog time: T WD is ms Closed window: T CW is 80 ms - Open window: T OW is 40 ms - Watchdog reset: T WD is 2.5 ms Note: the current consumption increases as the frequency increases. Watchdog Timeout Period Description The watchdog timeout period is divided into two parts, a closed window and an open window (see Fig. 5) and is defined by two parameters, T WD and the Open Window Percentage (OWP). The closed window starts just after the watchdog timer resets and is defined by T CW = T WD OWP(T WD). The open window starts after the closed time window finishes and lasts till T WD + OWP(T WD). The open window time is defined by T OW = 2 x OWP(T WD). For example if T WD = ms (actual value) and OWP = ± 20% this means the closed window lasts during first the 80 ms (T CW = 80 ms = ms 0.2 ( ms)) and the open window the next 40 ms (T OW = 2 x 0.2 ( ms) = 40 ms). The watchdog can be serviced between 80 ms and 120 ms after the timer reset. However as the time base is ± 10% accurate, software must use the following calculation for servicing signal during the open window: elated to curves (Fig. 11 to Fig. 21), especially Fig. 20 and Fig. 21, the relation between T WD and EXT could easily be defined. Let us take an example describing the variations due to production and temperature: 1. Choice, T WD = 26 ms. 2. elated to Fig. 21, the coefficient (T WD to EXT) is where EXT is in kω and T WD in ms. 3. EXT (typ.) = 26 x = 26.7 kω. 4. The ratio between T WD = 26 ms and the ( period) = 25.4 ms is Then the relation over the production and the full temperature range is, period = x T WD or x period = EXT, as typical value a) While PODUCTION value unknown for the customer when EXT 110 kω. b) While operating TEMPEATUE range -40 C T A +85 C. 5. If you fixed a period = 26 ms 26 x EXT = = 27.3 kω If during your production the T WD time can be measured at T A = + 25 C and the µc can adjust the period, then the period range will be much larger for the full operating temperature. Copyright 2004, EM Microelectronic-Marin SA 6

7 Timer Clearing and ES Action The watchdog circuit monitors the activity of the processor. If the user s software does not send a pulse to the input within the programmed open window timeout period, a short watchdog ES pulse is generated which is equal to T WD/40 = 2.5 ms typically (see Fig. 7). With the open window constraint, new security is added to conventional watchdogs by monitoring both software cycle time and execution. Should software clear the watchdog too quickly (incorrect cycle time) or too slowly (incorrect execution) it will cause the system to be reset. If the software is stuck in a loop which includes the routine to clear the watchdog, then a conventional watchdog will not reset even though the software is malfunctioning; the will generate a system reset because the watchdog is cleared too quickly. If no pulse is applied before the closed and open windows expire, ES will start to generate square waves of period (T CW + T OW + T WD). The watchdog will remain in this state until the next falling edge appears during an open window, or until a fresh power-up sequence. The system enable output,, can be used to prevent critical control functions being activated in the event of the system going into this failure mode (see section Enable Output ). The ES output must be pulled up to DD even if that output is not used by the system (see Fig. 10). Combined oltage and Timer Action The combination of voltage and timer actions is illustrated by the sequence of events shown in Fig. 8. On power-up, when the voltage at IN reaches EF, the power-on reset, PO, delay is initialized and holds ES active for the time of the PO delay. A pulse will have no effect until this power-on reset delay is completed. When the risk exists that temporarily floats, e.g. during T PO, a pull-up to DD is required on that pin. After the PO delay has elapsed, ES goes inactive and the watchdog timer starts acting. If no pulse occurs, ES goes active low for a short time T WD after each closed and open window period. A pulse coming during the open window clears the watchdog timer. When the pulse occurs too early (during the closed window), ES goes active and a new timeout sequence starts. A voltage drop below the EF level for longer than typically 5 µs, overrides the timer and immediately forces ES active and inactive. Any further pulse has no effect until the next power-up sequence has completed Enable Output The system enable output,, is inactive always when ES is active and remains inactive after a ES pulse until the watchdog is serviced correctly 3 consecutive times (i.e. the pulse must come in the open window). After three consecutive services of the watchdog with during the open window, the goes active low. A malfunctioning system would be repeatedly reset by the watchdog. In a conventional system critical motor controls could be energized each time reset goes inactive (time allowed for the system to restart) and in this way the electrical motors driven by the system could function out of control. The prevents the above failure mode by using the output to disable the motor controls until software has successfully cleared the watchdog three times (i.e. the system has correctly restarted after a reset condition). CAN-Bus Sleep Mode Detector If the microcontroller is in standby mode that means it does not have any pulses on the input. After 3 reset pulse periods (T CW + T OW +T WD) on the ES output, the switches on an internal resistor of 1 MΩ, and it will have a reset pulse of typically 3 ms every 1 second on the ES output. When a edge (rising or falling) appears on the input or the power supply goes down and up, the switches to the input. Typical Application Supply voltage DD nf kω SS IN ES 1 ES Address decoder µp 2 Motor controls GND Fig. 10 Copyright 2004, EM Microelectronic-Marin SA 7

8 EF versus DD at T A = -40 C, +25 C, 85 C 2.0 EF versus DD at T A = -40 C, +25 C, 85 C T A = -40 C T A = -40 C EF [] T A = +25 C T A = +85 C EF [] T A = +25 C T A = +85 C DD [] DD [] 8 Fig. 11 Fig. 12 EF versus Temperature at DD = 3, 5 and 8 EF versus Temperature at DD = 3, 5 and DD = DD = 3 EF [] DD = 5 and 3 DD = 8 EF [] DD = T A [ C] T A [ C] Fig. 13 Fig. 14 Copyright 2004, EM Microelectronic-Marin SA 8

9 T WD versus Supply oltage at T A +85 C T WD versus DD at T A = +125 C = 10 MΩ 00 = 10 MΩ 00 0 = 1 MΩ 0 = 1 MΩ T WD [ms] = kω TWD [ms] = kω = 10 kω DD [] 10 = 10 kω OUTPUT[] Fig. 15 Fig. 16 T WD versus Temperature at DD = T WD versus at DD = 5 00 T A = +125 C 00 = 10 MΩ 0 TWD [ms] 0 = 1 MΩ = kω TWD [ms] 10 = 10 kω T A[ C] 1 T A +85 C [kω] Fig. 17 Fig. 18 Copyright 2004, EM Microelectronic-Marin SA 9

12 Package and Ordering Information Dimensions of 8-pin SOIC Package D E A1 A C 0-8 B e H L Dimensions in mm Min Nom Max A A B C D E e 1.27 H L Fig. 7 Ordering Information When ordering, please specify the complete part number. Fig. 22 Part Number Package Delivery Form Package Marking SO8A Stick 8-pin SOIC 6155 SO8B Tape & eel EM Microelectronic-Marin SA cannot assume responsibility for use of any circuitry described other than circuitry entirely embodied in an EM Microelectronic-Marin SA product. EM Microelectronic-Marin SA reserves the right to change the circuitry and specifications without notice at any time. You are strongly urged to ensure that the information given has not been superseded by a more up-to-date version. EM Microelectronic-Marin SA, 07/04, ev. F Copyright 2004, EM Microelectronic-Marin SA 12

Low Power Windowed Watchdog with Reset, Sleep Mode Functions. Features. Applications. Selection Table. Part Number V REF

EM MICROELECTRONIC - MARIN SA Low Power Windowed Watchdog with Reset, Sleep Mode Functions Description The offers a high level of integration by combining voltage monitoring and software monitoring using