TOP VIEW RESET INPUT (RESET) RESET 2. Maxim Integrated Products 1

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1 19-11; Rev ; 1/5 -Pin µp oltage Monitors General Description The are low-power microprocessor (µp) supervisory circuits used to monitor power supplies in µp and digital systems. They provide excellent circuit reliability and low cost by eliminating external components and adjustments when used with 5powered or 3-powered circuits. The also provide a debounced manual reset input. These devices perform a single function: They assert a reset signal whenever the CC supply voltage falls below a preset threshold, keeping it asserted for at least 1ms after CC has risen above the reset threshold. The only difference between the two devices is that the has an active-low output (which is guaranteed to be in the correct state for CC down to 1), while the MAX81 has an active-high output. The reset comparator is designed to ignore fast transients on CC. Reset thresholds are available for operation with a variety of supply voltages. Low supply current makes the ideal for use in portable equipment. The devices come in a -pin SOT13 package. Applications Computers Controllers Intelligent Instruments Critical µp and µc Power Monitoring Portable/Battery-Powered Equipment Typical Operating Circuit Features Precision Monitoring of 3, 3.3, and 5 Power-Supply oltages 6µA Supply Current 1ms Min Power-On Reset Pulse Width; Output (), Output (MAX81) Guaranteed Over Temperature Guaranteed alid to CC = 1 () Power-Supply Transient Immunity No External Components -Pin SOT13 Package Ordering Information PART* TEMP RANGE PIN-PACKAGE _EUS-T MAX81_EUS-T - C to +85 C - C to +85 C SOT13 SOT13 *This part offers a choice of five different reset threshold voltages. Select the letter corresponding to the desired nominal reset threshold voltage, and insert it into the blank to complete the part number. Devices are available in both leaded and lead-free packaging. Specify lead-free by replacing -T with +T when ordering. Pin Configuration TOP IEW THRESHOLD SUFFIX OLTAGE () L.63 M.38 T 3.8 S.93 R.63 1 MR MAX81 () INPUT µp () MAX81 3 MR PUSHBUTTON SWITCH ( ) ARE FOR MAX81 SOT13 ( ) ARE FOR MAX81 NOTE: SEE LAST PAGE FOR MARKING INFORMATION. Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at , or visit Maxim s website at

2 ABSOLUTE MAXIMUM RATINGS Terminal oltage (with respect to ) to 6. All Other Inputs to ( +.3) Input Current,, MR...mA Output Current, or...ma Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS Continuous Power Dissipation (T A = +7 C) SOT13 (derate mw/ C above +7 C) 3mW Operating Temperature Range...- C to +85 C Storage Temperature Range C to +16 C Lead Temperature (soldering, 1sec)...+3 C ( = 5 for L/M versions, = 3.3 for T/S versions, = 3 for R version,, unless otherwise noted. Typical values are at.) (Note 1) Supply Current PARAMETER Operating oltage Range Reset Threshold Reset Threshold Tempco to Reset Delay (Note ) Reset Active Timeout Period MR Minimum Pulse Width MR Glitch Immunity (Note 3) MR to Reset Propagation Delay (Note ) MR Input Threshold MR Pull-Up Resistance Output oltage (MAX81) SYMBOL I CC TH t RP t MR t MD IH IL IH IL OH OL MAX81_L/M, = 5.5, I OUT = MAX81_R/S/T, = 3.6, I OUT = MAX81_L MAX81_M MAX81_S OD = 15m, MAX81_L/M OD = 15m, MAX81_R/S/T = TH(MAX) CONDITIONS I SOURCE = 15µA, 1.8 < < TH(MIN) MAX81R/S/T only, I SINK = 1.mA, = TH(MAX) MIN TYP MAX T A = C to +7 C MAX81_T MAX81_R > TH(MAX), MAX81_L/M > TH(MAX), MAX81_R/S/T MAX81L/M only, I SINK = 3.mA, = TH(MAX) x x UNITS µa ppm/ C µs ms µs ns µs kω

3 ELECTRICAL CHARACTERISTICS (continued) ( = 5 for L/M versions, = 3.3 for T/S versions, = 3 for R version,, unless otherwise noted. Typical values are at.) (Note 1) PARAMETER Output oltage () SYMBOL OL OH CONDITIONS R/S/T only, I SINK = 1.mA, = TH(MIN) L/M only, I SINK = 3.mA, = TH(MIN) I SINK = 5µA, > 1. R/S/T only, I SOURCE = 5µA, > TH(MAX) L/M only, I SOURCE = 8µA, > TH(MAX) MIN TYP MAX Note 1: Production testing done at, over temperature limits guaranteed by design using six sigma design limits. Note : output for, output for MAX81. Note 3: Glitches of 1ns or less typically will not generate a reset pulse UNITS 3

4 Typical Operating Characteristics (, unless otherwise noted.) SUPPLY CURRENT (µa) SUPPLY CURRENT vs. TEMPERATURE (MAX81_R/S/T) = 3.6 = 3.3 = 1 /1-TOC1 SUPPLY CURRENT (µa) 8 6 SUPPLY CURRENT vs. TEMPERATURE (MAX81_L/M) = 5.5 = 3 = 1 /1-TOC POWER-DOWN DELAY (µs) POWER-DOWN DELAY vs. TEMPERATURE (MAX81_R/S/T) 1 OD = TH OD = m OD = 15m OD = m /1-TOC3 POWER-DOWN DELAY (µs) POWER-DOWN DELAY vs. TEMPERATURE (MAX81_L/M) OD = TH OD = m OD = 15m /1-TOC POWER-UP TIMEOUT (ms) 3 1 POWER-UP TIMEOUT vs. TEMPERATURE MAX81_R/S/T MAX81_L/M /1-TOC5 NORMALIZED THRESHOLD () THRESHOLD DEIATION vs. TEMPERATURE /1-TOC6 OD = m

5 Pin Description 1 3 PIN MAX NAME MR Ground FUNCTION Active-Low Reset Output. remains low while is below the reset threshold or while MR is held low. remains low for the Reset Active Timeout Period (t RP ) after the reset conditions are terminated. Active-High Reset Output. remains high while is below the reset threshold or while MR is held low. remains high for Reset Active Timeout Period (t RP ) after the reset conditions are terminated. Manual Reset Input. A logic low on MR asserts reset. Reset remains asserted as long as MR is low and for 18ms after MR returns high. This active-low input has an internal kω pull-up resistor. It can be driven from a TTL or CMOS-logic line, or shorted to ground with a switch. Leave open if unused. +5, +3.3, or +3 Supply oltage Detailed Description Reset Output A microprocessor s (µp s) reset input starts the µp in a known state. These µp supervisory circuits assert reset to prevent code execution errors during power-up, power-down, or brownout conditions. is guaranteed to be a logic low for CC > 1. Once CC exceeds the reset threshold, an internal timer keeps low for the reset timeout period; after this interval, goes high. If a brownout condition occurs (CC dips below the reset threshold), goes low. Any time CC goes below the reset threshold, the internal timer resets to zero, and goes low. The internal timer starts after returns above the reset threshold, and remains low for the reset timeout period. The manual reset input (MR) can also initiate a reset. See the Manual Reset Input section. The MAX81 has an active-high output that is the inverse of the s output. Manual Reset Input Many µp-based products require manual reset capability, allowing the operator, a test technician, or external logic circuitry to initiate a reset. A logic low on MR asserts reset. Reset remains asserted while MR is low, and for the Reset Active Timeout Period (trp) after MR returns high. This input has an internal kω pull-up resistor, so it can be left open if it is not used. MR can be driven with TTL or CMOS-logic levels, or with opendrain/collector outputs. Connect a normally open momentary switch from MR to to create a manualreset function; external debounce circuitry is not required. If MR is driven from long cables or if the device is used in a noisy environment, connecting a.1µf capacitor from MR to ground provides additional noise immunity. Reset Threshold Accuracy The are ideal for systems using a 5 ±5% or 3 ±5% power supply with ICs specified for 5 ±1% or 3 ±1%, respectively. They are designed to meet worst-case specifications over temperature. The reset is guaranteed to assert after the power supply falls out of regulation, but before power drops below the minimum specified operating voltage range for the system ICs. The thresholds are pre-trimmed and exhibit tight distribution, reducing the range over which an undesirable reset may occur. 5

6 MAXIMUM TRANSIENT DURATION (ms) MAX81 _L/M 5 MAX81 _R/S/T COMPARATOR OERDRIE, TH - (m) R1 Figure 1. Maximum Transient Duration without Causing a Reset Pulse vs. Comparator Overdrive Applications Information Negative-Going CC Transients In addition to issuing a reset to the µp during power-up, power-down, and brownout conditions, the / MAX81 are relatively immune to short duration negative-going CC transients (glitches). Figure 1 shows typical transient durations vs. reset comparator overdrive, for which the do not generate a reset pulse. This graph was generated using a negative-going pulse applied to CC, starting above the actual reset threshold and ending below it by the magnitude indicated (reset comparator overdrive). The graph indicates the typical maximum pulse width a negative-going CC transient may have without causing a reset pulse to be issued. As the magnitude of the transient increases (goes farther below the reset threshold), the maximum allowable pulse width decreases. Typically, a CC transient that goes 15m below the reset threshold and lasts µs or less (MAX81_L/M) or µs or less (MAX81_T/S/R) will not cause a reset pulse to be issued. A.1µF capacitor mounted as close as possible to CC provides additional transient immunity. Figure. alid to = Ground Circuit Ensuring a alid Output Down to CC = When CC falls below 1, the output no longer sinks current it becomes an open circuit. Therefore, high-impedance CMOS-logic inputs connected to the output can drift to undetermined voltages. This presents no problem in most applications, since most µp and other circuitry is inoperative with CC below 1. However, in applications where the output must be valid down to, adding a pulldown resistor to the pin will cause any stray leakage currents to flow to ground, holding low (Figure ). R1 s value is not critical; 1kΩ is large enough not to load and small enough to pull to ground. A 1kΩ pull-up resistor to CC is also recommended for the MAX81 if is required to remain valid for CC < 1. 6

7 Interfacing to µps with Bidirectional Reset Pins µps with bidirectional reset pins (such as the Motorola 68HC11 series) can contend with the reset outputs. If, for example, the output is asserted high and the µp wants to pull it low, indeterminate logic levels may result. To correct such cases, connect a.7kω resistor between the (or MAX81 ) output and the µp reset I/O (Figure 3). Buffer the reset output to other system components. Chip Information TRANSISTOR COUNT: 31.7k BUFFER µp BUFFERED TO OTHER SYSTEM COMPONENTS Figure 3. Interfacing to µps with Bidirectional Reset I/O 7

8 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to ±.1. ±.1. ±.5 ø1.5 ±.1 ø1.1 ± ±.1 8. ±. 3.5 ±.5 NOTE: DIMENSIONS ARE IN MM. AND FOLLOW EIA81-1 STANDARD. ICs MAY ALSO BE MARKED WITH FULL PART NAME: 811L, 811M_ MARKING INFORMATION LOT SPECIFIC CODE X X X X AMAA or KABB = L ANAA or KABC = M APAA or KABD = T AQAA or KABE = S ARAA or KABF = R ASAA or KABG = MAX81L ATAA or KABH = MAX81M AAA or KABI = MAX81T AWAA or KABJ = MAX81S AXAA or KABK = MAX81R SOT-13 L.EPS PACKAGE OUTLINE, SOT-13, L 1-5 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 8 Maxim Integrated Products, 1 San Gabriel Drive, Sunnyvale, CA Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.