Features TABLE 1. SUMMARY OF FEATURES. PIN COUNT ISL8487 (No longer available or supported) SLEW-RATE LIMITED? Half Yes Yes 120 Yes 8

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1 DATASHEET ISL887, ISL88, ISL887 /8 Unit Load, V, Low Power, High Speed or Slew Rate Limited, RS-8/RS- Transceivers FN6 Rev 8. March, 6 These Intersil RS-8/RS- devices are fractional unit load (UL), BiCMOS, V powered, single transceivers that meet both the RS-8 and RS- standards for balanced communication. Unlike competitive devices, this Intersil family is specified for % tolerance supplies (.V to.v). The ISL88 and ISL887 present a /8 unit load to the RS-8 bus, which allows up to 6 transceivers on the network for large node count systems (e.g., process automation, remote meter reading systems). The / UL ISL887 allows up to 8 transceivers on the bus. In a remote utility meter reading system, individual (apartments for example) utility meter readings are routed to a concentrator via an RS-8 network, so the high allowed node count minimizes the number of repeaters required to network all the meters. Data for all meters is then read out from the concentrator via a single access port, or a wireless link. Slew rate limited drivers on the ISL887 and ISL88 reduce EMI, and minimize reflections from improperly terminated transmission lines, or unterminated stubs in multidrop and multipoint applications. Data rates up to kbps are achievable with these devices. Data rates up to Mbps are achievable by using the ISL887, which features higher slew rates. Receiver (Rx) inputs feature a fail-safe if open design, which ensures a logic high Rx output if Rx inputs are floating. Driver (Tx) outputs are short circuit protected, even for voltages exceeding the power supply voltage. Additionally, on-chip thermal shutdown circuitry disables the Tx outputs to prevent damage if power dissipation becomes excessive. These half duplex devices multiplex the Rx inputs and Tx outputs to allow transceivers with Rx and Tx disable functions in 8 lead packages. Features Fractional Unit Load Allows up to 6 Devices on the Bus Specified for % Tolerance Supplies Class ESD Protection (HBM) on all Pins >7kV High Data Rate Version (ISL887) up to Mbps Slew Rate Limited Versions for Error Free Data Transmission (ISL887, ISL88) up to kbps Low Current Shutdown Mode (Except ISL887)... A Low Quiescent Supply Current: - ISL887, ISL A (Max.) - ISL A (Max.) -7V to +V Common Mode Input Voltage Range Three State Rx and Tx Outputs ns Propagation Delays, ns Skew (ISL887) Half Duplex Pinouts Operate from a Single +V Supply (% Tolerance) Current Limiting and Thermal Shutdown for Driver Overload Protection Drop-In Replacements for: MAX87 (ISL887); MAX8 (ISL88); MAX87, LMS87 (ISL887) Pb-Free Plus Anneal Available (RoHS Compliant) Applications High Node Count Networks Automated Utility Meter Reading Systems Factory Automation Security Networks Building Environmental Control Systems Industrial/Process Control Networks TABLE. SUMMARY OF FEATURES PART NUMBER HALF/FULL DUPLEX NO. OF VICES ALLOWED ON BUS DATA RATE (Mbps) SLEW-RATE LIMITED? RECEIVER/ DRIVER ENABLE? QUIESCENT I CC ( A) LOW POWER SHUTDOWN? PIN COUNT ISL887 (No longer available or supported) Half 8. Yes Yes Yes 8 ISL88 Half 6. Yes Yes Yes 8 ISL887 Half 6 No Yes No 8 FN6 Rev 8. Page of March, 6

2 Pinout ISL887, ISL88, ISL887 (PP, SOIC) TOP VIEW RE R D B/Z A/Y GND Truth Tables TRANSMITTING INPUTS OUTPUTS RE Z Y X X X High-Z High-Z X High-Z * High-Z * *Shutdown Mode for ISL887, ISL88 (see Note 7) RECEIVING INPUTS OUTPUT RE A-B +.V -.V Inputs Open X High-Z * X High-Z *Shutdown Mode for ISL887, ISL88 (see Note 7) Ordering Information PART NO. PART MARKING TEMP. RANGE ( C) PACKAGE PKG. DWG. # ISL887IBZ (Note) (No longer available, recommended replacement ISL887EIBZ) ISL887IPZ (Note) (No longer available, recommended replacement ISL887EIPZ) 887IBZ - to 8 8 Ld SOIC* (Pb-free) M8. 887IPZ - to 8 8 Ld PP** (Pb-free) E8. ISL88IBZ (Note) 88IBZ - to 8 8 Ld SOIC* (Pb-free) M8. ISL88IPZ (Note) 88IPZ - to 8 8 Ld PP** (Pb-free) E8. ISL887IBZ (Note) 887IBZ - to 8 8 Ld SOIC* (Pb-free) M8. *SOIC also available in Tape and Reel; Add -T to suffix. **Pb-free PPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and % matte tin plate termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEC J STD-. FN6 Rev 8. Page of March, 6

3 Pin Descriptions PIN RE GND FUNCTION Receiver output: If A > B by at least.v, is high; If A < B by.v or more, is low; = High if A and B are unconnected (floating). Receiver output enable. is enabled when RE is low; is high impedance when RE is high. Driver output enable. The driver outputs, Y and Z, are enabled by bringing high. They are high impedance when is low. Driver input. A low on forces output Y low and output Z high. Similarly, a high on forces output Y high and output Z low. Ground connection. A/Y RS-8/ level, noninverting receiver input and noninverting driver output. Pin is an input (A) if = ; pin is an output (Y) if =. B/Z RS-8/ level, inverting receiver input and inverting driver output. Pin is an input (B) if = ; pin is an output (Z) if =. System power supply input (.V to.v). Typical Operating Circuits +V ISL887, ISL88, ISL887 +V 8 +. F. F + 8 RE R B/Z A/Y 7 6 R T R T 7 6 B/Z A/Y D RE D R GND GND FN6 Rev 8. Page of March, 6

4 Absolute Maximum Ratings to Ground V Input Voltages,, RE V to ( +.V) Input/Output Voltages A/Y, B/Z V to +.V V to ( +.V) Short Circuit Duration Y, Z Continuous ESD Rating HBM (Per MIL-STD-88, Method.7) >7kV Thermal Information Thermal Resistance (Typical, Note ) JA ( C/W) 8 Ld SOIC Package Ld PP Package* Maximum Junction Temperature (Plastic Package) C Maximum Storage Temperature Range C to C Maximum Lead Temperature (Soldering s) C (SOIC - Lead Tips Only) *Pb-free PPs can be used for through hole wave solder processing only. They are not intended for use in Reflow solder processing applications. Operating Conditions Temperature Range ISL8XXXIX C to 8 C CAUTION: Stresses above those listed in Absolute Maximum Ratings may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE:. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB79 for details. Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T A = C, (Note ) PARAMETER SYMBOL TEST CONTIONS TEMP ( C) MIN TYP MAX UNITS DC CHARACTERISTICS Driver Differential V OUT (no load) V OD Full - - V Driver Differential V OUT (with load) V OD R = (RS-), (Figure ) Full - V R = 7 (RS-8), (Figure ) Full.. V Change in Magnitude of Driver Differential V OUT for Complementary Output States V OD R = 7 or, (Figure ) Full -.. V Driver Common-Mode V OUT V OC R = 7 or, (Figure ) Full - - V Change in Magnitude of Driver Common-Mode V OUT for Complementary Output States V OC R = 7 or, (Figure ) Full -.. V Logic Input High Voltage V IH,, RE Full - - V Logic Input Low Voltage V IL,, RE Full V Logic Input Current I IN,, RE Full - - A Input Current (A/Y, B/Z), (Note ) (ISL88, ISL887) I IN = V, =. to.v V IN = V Full - - A V IN = -7V Full A I IN = V, = V V IN = V Full A V IN = -7V Full A Input Current (A/Y, B/Z), (Note ) (ISL887 Only) I IN = V, = V, or. to.v V IN = V Full - - A V IN = -7V Full A Receiver Differential Threshold Voltage V TH -7V V CM V Full V Receiver Input Hysteresis V TH V CM = V mv Receiver Output High Voltage V OH I O = -ma, V ID = mv Full. - - V Receiver Output Low Voltage V OL I O = -ma, V ID = mv Full - -. V Three-State (high impedance) Receiver Output Current I OZR.V V O.V Full - - A FN6 Rev 8. Page of March, 6

5 Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T A = C, (Note ) (Continued) PARAMETER SYMBOL TEST CONTIONS TEMP ( C) MIN TYP MAX UNITS Receiver Input Resistance R IN -7V V CM V ISL88, ISL887 Full k ISL887 Full k No-Load Supply Current, (Note ) I CC ISL887,, RE = V = Full - A or = V Full - A ISL887, ISL88,, = Full - 6 A RE = V or = V Full - A Shutdown Supply Current I SHDN (Note 7), = V, RE =, = V or Full -. 8 A Driver Short-Circuit Current, V O = High or Low I OSD =, -7V V Y or V Z V, (Note ) Full - ma Receiver Short-Circuit Current I OSR V V O Full 7-8 ma SWITCHING CHARACTERISTICS (ISL887) Driver Input to Output Delay t PLH, t PHL R FF =, C L = pf, (Figure ) Full ns Driver Output Skew t SKEW R FF =, C L = pf, (Figure ) Full - ns Driver Differential Rise or Fall Time t R, t F R FF =, C L = pf, (Figure ) Full ns Driver Enable to Output High t ZH C L = pf, SW = GND, (Figure ) Full - 7 ns Driver Enable to Output Low t ZL C L = pf, SW =, (Figure ) Full - 7 ns Driver Disable from Output High t HZ C L = pf, SW = GND, (Figure ) Full - 7 ns Driver Disable from Output Low t LZ C L = pf, SW =, (Figure ) Full - 7 ns Receiver Input to Output Delay t PLH, t PHL (Figure ) Full 9 ns Receiver Skew t PLH - t PHL t SKD (Figure ) - - ns Receiver Enable to Output High t ZH C L = pf, SW = GND, (Figure ) Full - 9 ns Receiver Enable to Output Low t ZL C L = pf, SW =, (Figure ) Full - 9 ns Receiver Disable from Output High t HZ C L = pf, SW = GND, (Figure ) Full - 9 ns Receiver Disable from Output Low t LZ C L = pf, SW =, (Figure ) Full - 9 ns Maximum Data Rate f MAX Full - - Mbps SWITCHING CHARACTERISTICS (ISL887, ISL88) Driver Input to Output Delay t PLH, t PHL R FF =, C L = pf, (Figure ) Full 6 ns Driver Output Skew t SKEW R FF =, C L = pf, (Figure ) Full ns Driver Differential Rise or Fall Time t R, t F R FF =, C L = pf, (Figure ) Full 9 ns Driver Enable to Output High t ZH C L = pf, SW = GND, (Figure, Note ) Full ns Driver Enable to Output Low t ZL C L = pf, SW =, (Figure, Note ) Full 86 ns Driver Disable from Output High t HZ C L = pf, SW = GND, (Figure ) Full 66 ns Driver Disable from Output Low t LZ C L = pf, SW =, (Figure ) Full 6 ns Receiver Input to Output Delay t PLH, t PHL (Figure ) Full ns Receiver Skew t PLH - t PHL t SKD (Figure ) ns Receiver Enable to Output High t ZH C L = pf, SW = GND, (Figure, Note 6) Full - ns Receiver Enable to Output Low t ZL C L = pf, SW =, (Figure, Note 6) Full - ns Receiver Disable from Output High t HZ C L = pf, SW = GND, (Figure ) Full - ns Receiver Disable from Output Low t LZ C L = pf, SW =, (Figure ) Full - ns Maximum Data Rate f MAX Full - - kbps Time to Shutdown t SHDN (Note 7) Full 6 ns FN6 Rev 8. Page of March, 6

6 Electrical Specifications Test Conditions: =.V to.v; Unless Otherwise Specified. Typicals are at = V, T A = C, (Note ) (Continued) PARAMETER SYMBOL TEST CONTIONS Driver Enable from Shutdown to Output High Driver Enable from Shutdown to Output Low Receiver Enable from Shutdown to Output High Receiver Enable from Shutdown to Output Low TEMP ( C) MIN TYP MAX UNITS t ZH(SHDN) C L = pf, SW = GND, (Figure, Notes 7, 8) Full - ns t ZL(SHDN) C L = pf, SW =, (Figure, Notes 7, 8) Full - ns t ZH(SHDN) C L = pf, SW = GND, (Figure, Notes 7, 9) Full - 8 ns t ZL(SHDN) C L = pf, SW =, (Figure, Notes 7, 9) Full - 8 ns NOTES:. All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to device ground unless otherwise specified.. Supply current specification is valid for loaded drivers when = V.. Applies to peak current. See Typical Performance Curves for more information.. When testing the ISL887 and ISL88, keep RE = to prevent the device from entering SHDN. 6. When testing the ISL887 and ISL88, the RE signal high time must be short enough (typically <ns) to prevent the device from entering SHDN. 7. The ISL887 and ISL88 are put into shutdown by bringing RE high and low. If the inputs are in this state for less than ns, the parts are guaranteed not to enter shutdown. If the inputs are in this state for at least 6ns, the parts are guaranteed to have entered shutdown. See Low-Power Shutdown Mode section. 8. Keep RE =, and set the signal low time >6ns to ensure that the device enters SHDN. 9. Set the RE signal high time >6ns to ensure that the device enters SHDN.. Devices meeting these limits are denoted as /8 unit load (/8 UL) transceivers. The RS-8 standard allows up to Unit Loads on the bus, so there can be 6 /8 UL devices on a bus.. Devices meeting these limits are denoted as / unit load (/ UL) transceivers. The RS-8 standard allows up to Unit Loads on the bus, so there can be 8 / UL devices on a bus. Test Circuits and Waveforms D Z Y V OD R R V OC FIGURE. DRIVER V OD AND V OC FN6 Rev 8. Page 6 of March, 6

7 Test Circuits and Waveforms (Continued).V.V V V t PLH t PHL SIGNAL GENERATOR D Z Y R FF C L = pf C L = pf OUT (Y) OUT (Z) t PHL % % t PLH % % V OH V OL VOH V OL FF OUT (Y - Z) 9% 9% % % t R t F +V OD -V OD SKEW = t PLH (Y or Z) - t PHL (Z or Y) FIGURE A. TEST CIRCUIT FIGURE B. MEASUREMENT POINTS FIGURE. DRIVER PPAGATION LAY AND FFERENTIAL TRANSITION TIMES SIGNAL GENERATOR D Z Y C L SW GND NOTE 7.V.V V V (SHDN) for ISL887 and ISL88 only. PARAMETER OUTPUT RE SW C L (pf) t HZ Y/Z X / GND t LZ Y/Z X / t ZH Y/Z (Note ) / GND t ZL Y/Z (Note ) / t ZH(SHDN) Y/Z (Note 7) / GND t ZL(SHDN) Y/Z (Note 7) / t ZH, t ZH(SHDN) t HZ NOTE 7 OUTPUT HIGH V OH -.V OUT (Y, Z).V t ZL, t ZL(SHDN) t LZ NOTE 7 OUT (Y, Z).V V OL +.V OUTPUT LOW FIGURE A. TEST CIRCUIT FIGURE B. MEASUREMENT POINTS FIGURE. DRIVER ENABLE AND SABLE TIMES V OH V V OL +.V B A RE R pf A.V.V V V t PLH t PHL SIGNAL GENERATOR % % V FIGURE A. TEST CIRCUIT FIGURE B. MEASUREMENT POINTS FIGURE. RECEIVER PPAGATION LAY FN6 Rev 8. Page 7 of March, 6

8 Test Circuits and Waveforms (Continued) SIGNAL GENERATOR RE A B R k pf SW GND RE NOTE 7.V.V V V (SHDN) for ISL887 and ISL88 only. PARAMETER A SW t HZ +.V GND t ZH, t ZH(SHDN) NOTE 7 OUTPUT HIGH.V t HZ V OH -.V V OH V t LZ -.V t ZH (Note 6) +.V GND t ZL (Note 6) -.V t ZH(SHDN) (Note 7) +.V GND t ZL, t ZL(SHDN) NOTE 7.V OUTPUT LOW t LZ V OL +.V V OL t ZL(SHDN) (Note 7) -.V FIGURE A. TEST CIRCUIT FIGURE B. MEASUREMENT POINTS FIGURE. RECEIVER ENABLE AND SABLE TIMES Application Information RS-8 and RS- are differential (balanced) data transmission standards for use in long haul or noisy environments. RS- is a subset of RS-8, so RS-8 transceivers are also RS- compliant. RS- is a pointto-multipoint (multidrop) standard, which allows only one driver and up to (assuming one unit load devices) receivers on each bus. RS-8 is a true multipoint standard, which allows up to one unit load devices (any combination of drivers and receivers) on each bus. To allow for multipoint operation, the RS-8 spec requires that drivers must handle bus contention without sustaining any damage. Another important advantage of RS-8 is the extended common mode range (CMR), which specifies that the driver outputs and receiver inputs withstand signals that range from +V to -7V. RS- and RS-8 are intended for runs as long as, so the wide CMR is necessary to handle ground potential differences, as well as voltages induced in the cable by external fields. Receiver Features These devices utilize a differential input receiver for maximum noise immunity and common mode rejection. Input sensitivity is mv, as required by the RS- and RS-8 specifications. Receiver input resistance of 96k surpasses the RS- spec of k, and is eight times the RS-8 Unit Load (UL) requirement of k minimum. Thus, these products are known as one-eighth UL transceivers, and there can be up to 6 of these devices on a network while still complying with the RS-8 loading spec. Receiver inputs function with common mode voltages as great as 7V outside the power supplies (i.e., +V and -7V), making them ideal for long networks where induced voltages are a realistic concern. All the receivers include a fail-safe if open function that guarantees a high level receiver output if the receiver inputs are unconnected (floating). Receivers easily meet the data rates supported by the corresponding driver, and receiver outputs are three-statable via the active low RE input. Driver Features The RS-8 and RS- driver is a differential output device that delivers at least.v across a load (RS-8), and at least V across a load (RS-). The drivers feature low propagation delay skew to maximize bit width, and to minimize EMI. Driver outputs are three-statable via the active high input. The ISL887 and ISL88 driver outputs are slew rate limited to minimize EMI, and to minimize reflections in unterminated or improperly terminated networks. Data rate on these slew rate limited versions is a maximum of kbps. ISL887 drivers are not limited, so faster output transition times allow data rates of at least Mbps. Data Rate, Cables, and Terminations RS-8 and RS- are intended for network lengths up to, but the maximum system data rate decreases as the transmission length increases. Devices operating at Mbps are limited to lengths less than a few hundred feet, while the FN6 Rev 8. Page 8 of March, 6

9 kbps versions can operate at full data rates with lengths in excess of. Twisted pair is the cable of choice for RS-8/RS- networks. Twisted pair cables tend to pick up noise and other electromagnetically induced voltages as common mode signals, which are effectively rejected by the differential receivers in these ICs. To minimize reflections, proper termination is imperative when using the Mbps device. Short networks using the kbps versions need not be terminated, but, terminations are recommended unless power dissipation is an overriding concern. In point-to-point, or point-to-multipoint (single driver on bus) networks, the main cable should be terminated in its characteristic impedance (typically ) at the end farthest from the driver. In multi-receiver applications, stubs connecting receivers to the main cable should be kept as short as possible. Multipoint (multi-driver) systems require that the main cable be terminated in its characteristic impedance at both ends. Stubs connecting a transceiver to the main cable should be kept as short as possible. Built-In Driver Overload Protection As stated previously, the RS-8 spec requires that drivers survive worst case bus contentions undamaged. These devices meet this requirement via driver output short circuit current limits, and on-chip thermal shutdown circuitry. The driver output stages incorporate short circuit current limiting circuitry which ensures that the output current never exceeds the RS-8 spec, even at the common mode voltage range extremes. Additionally, these devices utilize a foldback circuit which reduces the short circuit current, and thus the power dissipation, whenever the contending voltage exceeds either supply. In the event of a major short circuit condition, these devices also include a thermal shutdown feature that disables the drivers whenever the die temperature becomes excessive. This eliminates the power dissipation, allowing the die to cool. The drivers automatically re-enable after the die temperature drops about degrees. If the contention persists, the thermal shutdown/re-enable cycle repeats until the fault is cleared. Receivers stay operational during thermal shutdown. Low Power Shutdown Mode (Excluding ISL887) These CMOS transceivers all use a fraction of the power required by their bipolar counterparts, but the ISL887 and ISL88 include a shutdown feature that reduces the already low quiescent I CC to a na trickle. They enter shutdown whenever the receiver and driver are simultaneously disabled (RE = and = GND) for a period of at least 6ns. Disabling both the driver and the receiver for less than ns guarantees that shutdown is not entered. Note that receiver and driver enable times increase when enabling from shutdown. Refer to Notes -9, at the end of the Electrical Specification table, for more information. Typical Performance Curves = V, T A = C, ISL887, ISL88 and ISL887; Unless Otherwise Specified 9.6 DRIVER OUTPUT CURRENT (ma) FFERENTIAL OUTPUT VOLTAGE (V) FIGURE 6. DRIVER OUTPUT CURRENT vs FFERENTIAL OUTPUT VOLTAGE FFERENTIAL OUTPUT VOLTAGE (V) R FF = TEMPERATURE ( C) R FF = FIGURE 7. DRIVER FFERENTIAL OUTPUT VOLTAGE vs TEMPERATURE FN6 Rev 8. Page 9 of March, 6

10 Typical Performance Curves = V, T A = C, ISL887, ISL88 and ISL887; Unless Otherwise Specified (Continued) OUTPUT CURRENT (ma) 6 ISL887E Y OR Z = LOW 8 ISL887E, ISL887L 6 - Y OR Z = HIGH - -6 ISL887E -8 ISL887E, ISL887L OUTPUT VOLTAGE (V) FIGURE 8. DRIVER OUTPUT CURRENT vs SHORT CIRCUIT VOLTAGE I CC (µa) ISL887E, =, RE = X ISL887E, = GND, RE = X ISL887E, ISL887L, =, RE = X ISL887E, ISL887L, = GND, RE = GND TEMPERATURE ( C) FIGURE 9. SUPPLY CURRENT vs TEMPERATURE 7 PPAGATION LAY (ns) t PLHY t PLHZ t PHLY t PHLZ SKEW (ns) t PLHY - t PHLZ t PHLY - t PLHZ CSS PT. OF Y & Z - CSS PT. OF Y & Z TEMPERATURE ( C) FIGURE. DRIVER PPAGATION LAY vs TEMPERATURE (ISL887, ISL88) TEMPERATURE ( C) FIGURE. DRIVER SKEW vs TEMPERATURE (ISL887, ISL88) PPAGATION LAY (ns) t PLHY t PLHZ t PHLY TEMPERATURE ( C) t PHLZ FIGURE. DRIVER PPAGATION LAY vs TEMPERATURE (ISL887) SKEW (ns) TEMPERATURE ( C) t PHLY - t PLHZ t PLHY - t PHLZ CSSING PT. OF Y & Z - CSSING PT. OF Y & Z FIGURE. DRIVER SKEW vs TEMPERATURE (ISL887) FN6 Rev 8. Page of March, 6

11 Typical Performance Curves = V, T A = C, ISL887, ISL88 and ISL887; Unless Otherwise Specified (Continued) RECEIVER OUTPUT (V) R FF =, C L = pf DRIVER INPUT (V) RECEIVER OUTPUT (V) R FF =, C L = pf DRIVER INPUT (V) DRIVER OUTPUT (V) B/Z A/Y TIME (ns/v) FIGURE. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL887, ISL88) DRIVER OUTPUT (V) A/Y B/Z TIME (ns/v) FIGURE. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL887, ISL88) RECEIVER OUTPUT (V) R FF =, C L = pf DRIVER INPUT (V) RECEIVER OUTPUT (V) R FF =, C L = pf DRIVER INPUT (V) DRIVER OUTPUT (V) B/Z A/Y FIGURE 6. DRIVER AND RECEIVER WAVEFORMS, LOW TO HIGH (ISL887) Die Characteristics SUBSTRATE POTENTIAL (POWERED UP): GND TRANSISTOR COUNT: 8 PCESS: Si Gate CMOS TIME (ns/v) DRIVER OUTPUT (V) A/Y B/Z TIME (ns/v) FIGURE 7. DRIVER AND RECEIVER WAVEFORMS, HIGH TO LOW (ISL887) FN6 Rev 8. Page of March, 6

12 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION CHANGE March, 6 FN6.8 Added Rev History and About Intersil Verbiage. Updated Ordering Information table on page. Updated M8. to current revision. POD revision changes are as follows: Note "98" to "99 Changed in Typical Recommended Land Pattern the following:.(.9) to.(.87).76 (.) to.6(.). to.(.) Updated to new POD format by removing table and moving dimensions onto drawing and adding land pattern. About Intersil Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets. For the most updated datasheet, application notes, related documentation and related parts, please see the respective product information page found at You may report errors or suggestions for improving this datasheet by visiting Reliability reports are also available from our website at Copyright Intersil Americas LLC -6. All Rights Reserved. All trademarks and registered trademarks are the property of their respective owners. For additional products, see Intersil products are manufactured, assembled and tested utilizing ISO9 quality systems as noted in the quality certifications found at Intersil products are sold by description only. Intersil may modify the circuit design and/or specifications of products at any time without notice, provided that such modification does not, in Intersil's sole judgment, affect the form, fit or function of the product. Accordingly, the reader is cautioned to verify that datasheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see FN6 Rev 8. Page of March, 6

13 Dual-In-Line Plastic Packages (PP) INX AREA BASE PLANE SEATING PLANE D B -C- -A- N N/ B D e D E -B- A. (.) M C A A L B S NOTES:. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control.. Dimensioning and tolerancing per ANSI Y.M-98.. Symbols are defined in the MO Series Symbol List in Section. of Publication No. 9.. Dimensions A, A and L are measured with the package seated in JEC seating plane gauge GS-.. D, D, and E dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed. inch (.mm). 6. E and e A are measured with the leads constrained to be perpendicular to datum -C-. 7. e B and e C are measured at the lead tips with the leads unconstrained. e C must be zero or greater. 8. B maximum dimensions do not include dambar protrusions. Dambar protrusions shall not exceed. inch (.mm). 9. N is the maximum number of terminal positions.. Corner leads (, N, N/ and N/ + ) for E8., E6., E8., E8., E.6 will have a B dimension of. -. inch (.76 -.mm). A e C E C L e A C e B E8. (JEC MS--BA ISSUE D) 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE INCHES MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A A A B B , C D D E E e. BSC. BSC - e A. BSC 7.6 BSC 6 e B L N Rev. /9 FN6 Rev 8. Page of March, 6

14 Package Outline Drawing M8. 8 LEAD NARW BODY SMALL OUTLINE PLASTIC PACKAGE Rev, / TAIL "A".7 (.). (.6) INX AREA. (.7).8 (.) 6. (.).8 (.8). (.). (.) x TOP VIEW 8 SI VIEW B. (.).9 (.8). (.87) SEATING PLANE 8. (.97).8 (.89).7 (.69). (.) 7.6 (.).7 (.) 6 -C-.7 (.).(.).(.).(.).(.).(.) SI VIEW A TYPICAL RECOMMEND LAND PATTERN NOTES:. Dimensioning and tolerancing per ANSI Y.M-99.. Package length does not include mold flash, protrusions or gate burrs. Mold flash, protrusion and gate burrs shall not exceed.mm (.6 inch) per side.. Package width does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed.mm (. inch) per side.. The chamfer on the body is optional. If it is not present, a visual index feature must be located within the crosshatched area.. Terminal numbers are shown for reference only. 6. The lead width as measured.6mm (. inch) or greater above the seating plane, shall not exceed a maximum value of.6mm (. inch). 7. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 8. This outline conforms to JEC publication MS--AA ISSUE C. FN6 Rev 8. Page of March, 6