# BJT Differential Amplifiers

Save this PDF as:

Size: px
Start display at page:

## Transcription

1 Instituto Tecnológico y de Estudios Superiores de Occidente (), OBJECTIVES The general objective of this experiment is to contrast the practical behavior of a real differential pair with its theoretical version. Other more specific objectives are: a) to reinforce the notion of common-emitter half circuits in the process of design and analysis of a differential amplifier b) to verify the differential and common mode operation c) to design a current mirror and apply it to bias a differential pair. Join nodes C and D (which should have nearly the same voltage) and measure again the voltages on nodes A through F. Note that they are virtually the same as before. With nodes C and D joined, A unchanged and B connected via a 1MΩ resistor to the center of a 1KΩ potentiometer, Rp, connected between 15V and 10.7V, measure the voltage between nodes E and F, Adjust Rp until this is exactly zero. Measure the voltages at A through F and P (the center of Rp). You have in effect compensated for the total input offset including the voltage offset resulting from base-emitter mismatch, and the difference in bias-current flow (i.e., offset current) in the base resistors RB. What is the total input offset voltage and the average offset current? APPROACH Theoretical Procedure, Part A Calculate all the DC voltages and currents in the two differential half-circuits shown in Fig. 1 (refer to the appendix for the internal parameters of the transistors). Lab Procedure, Part A Assemble the circuit of Fig. 1 using resistors that are as wellmatched as you can make them (use your digital ohmmeter if necessary). Please note that in the 3046 array pin 13 must be connected to the most negative voltage supplied to any of the devices, since all the devices in this chip are fabricated on a common substrate. Create a table to display the voltages on nodes A through F before and after the compensation procedure. Label this table as Table II. Theoretical Procedure, Part B Calculate the voltage gain from A to E (ve/va) for the circuit shown in Fig. 2 (refer to the appendix for the internal parameters of the transistors). Calculate the input impedance at node A. Calculate the voltage gain from A to E (ve/va) when node B is not grounded and connected to node A (common-mode operation). Fig. 2: Simple differential amplifier. Lab Procedure, Part B Fig. 1: Two differential half-circuits. Measure the voltages at nodes A through F. From these measurements calculate the currents in all the branches as well as α1, α2, β1 and β2, as well as VBE1 and VBE2. Create a table to compare these results with your theoretical results previously calculated. Label this table as Table I. Assemble the circuit of Fig. 2. Connect a generator to provide a sine wave of 1Vpp at 1KHz at node G. Using a two-channel oscilloscope, measure the voltage gain from A to E (ve/va). Plot va, ve and vf as they appear in the oscilloscope. Why was the voltage divider of 10KΩ-100Ω added to the circuit? Measure the input impedance at node A (after the 100Ω resistor). Describe the method used to measure this impedance. Subject: Analog Electronic Circuits - Page 1 of 8

2 Instituto Tecnológico y de Estudios Superiores de Occidente (), Measure the voltage gain from A to E (ve/va) when node B is not grounded and connected to node A (common-mode operation). Plot va, ve and vf as they appear in the oscilloscope. Create a table to compare this results with your theoretical results previously calculated (voltage gains and input impedance). Label this table as Table III. Theoretical Procedure, Part C COMPONENTS Circuit Simulation Software (SPICE). LM3046 (Fig. 3) x1 (BJT npn transistor array). Several resistors (1% tolerance if possible). 1kΩ Potentiometer x1. Two variable DC power supplies (0 to 20 V). Waveform generator. Digital multimeter. Two-channel oscilloscope with X10 probes. Design a differential amplifier biased with a current mirror (choose any configuration of current mirror) using the transistors available in a single chip Refer to the appendix for the internal parameters of the transistors. Your design must fulfill the following specifications: A) ICMR ±100mV B) Output Voltage Swing ±5V C) AVd > 40dB D) CMRR > 60dB Lab Procedure, Part C Implement your designed differential amplifier biased with a current mirror. Measure the DC voltages on all the nodes and calculate from them all currents in the circuit. Fig. 3: LM Top View What are the resulting AVd, CMRR, Slew Rate, Offset, and Power Consumption values? Plot the corresponding waveforms as seen in the oscilloscope and create a table to compare your theoretical predictions with your lab measurements. Label this table as Table IV. Subject: Analog Electronic Circuits - Page 2 of 8

3 Instituto Tecnológico y de Estudios Superiores de Occidente (), EXPLANATION Many electronic devices use differential amplifiers internally. Implementations consist of a differential input stage (Fig. 5) followed by single or multiple amplification stages. We can also clearly amplify the signal with this type of circuits, by mounting a small-signal on one input and measuring the outv C1 C2 we are are removing the common portion of put at the signal at the input while getting an amplified version of the small-signal. This mode is called differential (Fig. 4). Differential amplifiers are widely used because of their high tolerance to noise. Fig. 4: Comparative in modes. Fig. 5: Differential amplifier in common mode. Having an input in the circuit ( V B1 and V B2 ) and the out- put at V C1 C2 we can clearly see how the common component gets removed at the output as the transistors match in physical characteristics. This operation mode is called common (Fig. 4). It can be seen clearly as a big advantage as coupled signal noise is common at the input. The relationship between the gain of the common and differential modes is called the Common Mode Rejection Ratio (CMRR) and is defined as: CMRR= AVD ACM As we have already seen in multi-stage amplifiers, the concept is to take the best features of the different topologies of amplifiers for specific applications. The higher the CMRR the higher tolerance our amplifier has to noise. That is clearly a something to take onto consideration in medical instrumentation or places with high electromagnetic emissions for example. Fig. 6: MOS (left) and BJT (right) differential amplifiers. Implementing this type of circuit is as easy as putting together two common-emitter (BJT) or two common-drain (MOS) amplifiers facing against each other (Fig. 6). Subject: Analog Electronic Circuits - Page 3 of 8

4 Instituto Tecnológico y de Estudios Superiores de Occidente (), PROCEDURE First are going to start by measuring some internal transistor parameters needed for our calculations by assembling the circuit and measuring the currents and voltages. Lab Procedure, Part A According to the next differential amplifier circuit (Fig. 7) The most important and influential parameters would be = and V BE =0.728[V ], for easier calculation we will be using a normalized value of beta after seeing the measurements under this section (Lab Procedure, Part A). ####################### PSPICE Model for the LM3046 ###################### ##########################################################################.model LM3046 NPN IS=10e-15 BF= XTI=3E00 VAR=1.00E2 IKF=46.7E-03 EG=1.110E00 VAF=1.00e02 ISE= E-15 NE=1.48E00 XTB=0 BR=0.1 ISC=10.005e-15 NC=2 IKR=10e-3 RC=10 MJC=.333 VJC=.75 FC=5.00e-01 CJE=1.02e-12 MJE=.336 VJE=.728 TR=10e-9 TF=277.01e-12 ITF=1.75 XTF= VTF=16.37) Fig. 7: DC Parameters. ########################################################################## The measured parameters in DC (Fig. 7) are: Theoretical Procedure, Part A DC currents analysis relationship using the normalized beta gives us: = = ie = =1.0124[mA ] 9.85x10 3 i c = i e =1.0114[mA ] and V E = 0.728[V ] Currents: E i c =0.995[mA ] A i b=9.300[ua] C i e =0.994 [ma] and as F i c=0.993[ma] B i b=9.700 [ua] D i e =0.992[mA ] Voltages: then V AE = 4.81[V ] V AC = 0.72 [V ] V EC = 6.10 [V ] i b 1[uA] The voltages in the nodes are the result of the resistors and end up as: V B=10 [mv ] Table I V C =5.0375[V ] V FB= 5.19[V ] V BD = 0.72[V ] V FD = 6.07 [V ] Thus obtaining the betas for each transistor: 1= and 2= After joining nodes C and D we proceed to measure again. Meaning that the voltages in the nodes according to our diagram (Fig. 7) Table II V AE = [V ] V AC = [V ] V EC = 6.08[V ] V FB = [V ] V BD = 0.718[V ] V FD= 6.391[V ] Voltages: V AE = 5.360[V ] V AC = [V ] V EC = 6.08[V ] V FB= 5.600[V ] V BD = 0.710[V ] V FD= 6.09[ V ] Subject: Analog Electronic Circuits - Page 4 of 8

5 Instituto Tecnológico y de Estudios Superiores de Occidente (), Comparing Table I vs. Table II we can clearly notice the difference is minimal but having the nodes joined gives us even less of a difference between the differential halves. After implementing the voltage divider with the potentiometer we obtain the offset needed to get both transistors working ideally for common-mode: V offset =394 [mv ] ma Joining nodes C and D. therefore i c =1.9925[mA ] and meaning the transconductance is i b= [ua] g m= ic =39.85[mA/V ] 2VT i offset =0.5[uA] Summarizing the values measured on a Table III for easier comparative. Regular (two half diff. Circuits). with the transconductance defined we are able to calculate the common mode gain and differential gain. Diff. Gain AVD = g m RC = 398.5[V /V ] Comm. Gain ACM = V 3 RC 10x = =1[V /V ] 2R EE 2 5x103 (E) ic AE 4.81 (A) ib AC (C) ie FC (F) ic FB 5.19 (B) ib BD 0.72 (D) IC FD (E) ic AE 5.36 (A) ib AC Voltages in the nodes according to Fig. 2: (C) ie FC Differential Mode (Small-Signal) - (F) ic FB 5.60 (B) ib BD (D) IC FD Lab Procedure, Part B In the differential amplifier implementation of the circuit we proceed to measure the calculations done earlier. V E =172 mv V A=16.8 mv Gain: V A=200 mv AVD =10.23[V /V ] Table III Measurements. Common Mode (DC) Theoretical Procedure, Part B As we implement the (Fig. 8) with the voltage divider. V A=3.2 mv V E =6.00 mv Gain: V A=6.00 mv ACM =1.875[V / V ] Comparative of the calculations and the measurements below (Table IV). Common Mode Differential Mode Calculations Measurements Table IV Overview in the results of part B. Fig. 8: Differential amplifier. We can clearly see that ie = =1.9944[mA ] 5x10 3 Subject: Analog Electronic Circuits - Page 5 of 8

6 Instituto Tecnológico y de Estudios Superiores de Occidente (), Theoretical Procedure, Part C As we know the specifications of our design are the following: A) ICMR ±100mV B) Output Voltage Swing ±5V C) AVd > 40dB D) CMRR > 60dB So before even defining the topology to work with, we already need a minimum common-mode gain of: ACM =10 = Then we define the current of polarization in the circuit as 1 ma meaning the transconductance is: g m= ic =20 [ma/v ] 2VT And if we want a differential gain of at least 100 [V/V] so if we define RC =10[ K ] then AVD =200[V /V ] The design implemented is the circuit in the schematic in Fig. 10. The next graph (Fig. 9) shows the gain curve. 200 Fig. 10: Amplifier Design (Part C) Hz 100Hz V(Q9:c)/V(Q14:b) 10KHz 1.0MHz 100MHz Frequency Fig. 9: Differential mode gain simulation with SPICE Subject: Analog Electronic Circuits - Page 6 of 8

7 Instituto Tecnológico y de Estudios Superiores de Occidente (), Lab Procedure, Part C After implementing the circuit with two LM3046 ICs, we take the oscilloscope and measure the parameters of our required specifications. With those two values we can easily calculate the CMRR and get: CMRR=110/414X10 6=265700[V /V ]=108 db. Note: Ch1: Output // Ch2: Input Fig. 13: Voltage swing. Fig. 11: Differential mode. Figure 11 shows the results of the differential gain having a value of A VD =110[V /V ]=40dB. Fig. 14: Distortion. Fig. 14 shows how as the input goes above 100mV the signal distorts giving valid proof of the following equation: ICMR=4V T = 100mV Fig. 12: Common mode. Fig. 12 gives us ACM =414x10 6 [V /V ]= db. After looking at the photographs and calculations we can clearly validate how our design was successful in every specification. Subject: Analog Electronic Circuits - Page 7 of 8

8 Instituto Tecnológico y de Estudios Superiores de Occidente (), CONCLUSIONS We practiced BJT analysis concepts to calculate the DC operating values, small signal variations and gain. Using those same concepts from the Analog Electronic Devices course we were able to get the internal parameters of our transistors. After having done the calculations to get an idea of how the circuit was going to behave and by using SPICE for simulation after defining our own model of the transistors to approach real life results we were quite close to the results and the design was even easier. One thing that drew our attention was the small variation needed to destabilize and unbalance the currents. This small variation was enough for the common-mode to stop working ideally. BIBLIOGRAPHY A.R. Hambley, Electronics: A Top-Down Approach to ComputerAided Circuit Design, Englewood Cliffs, NJ : Prentice Hall, R.C. Jager, Microelectronic Circuit Design, New York, NY: McGraw Hill, Malvino, Albert, Electronic Principles, 6th Edition, McGraw Hill, A. S. Sedra and K. C Smith, Microelectronic Circuits. New York, NY: Oxford University Press, Subject: Analog Electronic Circuits - Page 8 of 8

### Electronics II (02 SE048) Lab Experiment 1 (option A): BJT Differential Amplifiers

Departamento de Electrónica, Sistemas e Informática Ingeniería Electrónica Electronics II (02 SE048) Lab Experiment 1 (option A): BJT Differential Amplifiers Objectives The general objective of this experiment

### UNIVERSITY OF PENNSYLVANIA EE 206

UNIVERSITY OF PENNSYLVANIA EE 206 TRANSISTOR BIASING CIRCUITS Introduction: One of the most critical considerations in the design of transistor amplifier stages is the ability of the circuit to maintain

### Lab 3: BJT I-V Characteristics

1. Learning Outcomes Lab 3: BJT I-V Characteristics At the end of this lab, students should know how to theoretically determine the I-V (Current-Voltage) characteristics of both NPN and PNP Bipolar Junction

### Experiment 6: Biasing Circuitry

1 Objective UNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE105 Lab Experiments Experiment 6: Biasing Circuitry Setting up a biasing

### OBJECTIVES SPECIFICATIONS. Part II. V P =2[V ] Part I. Audio Amplifier. Questions (1).

Instituto Tecnológico y de Estudios Superiores de Occidente (), OBJECTIVES The general objective of this experiment is to work with a realworld amplifier. a) Reinforce the power analysis in electronic

### Experiment 6: Biasing Circuitry

1 Objective UNIVERSITY OF CALIFORNIA AT BERKELEY College of Engineering Department of Electrical Engineering and Computer Sciences EE105 Lab Experiments Experiment 6: Biasing Circuitry Setting up a biasing

### ECE 304: Running a Net-list File in PSPICE. Objective... 2 Simple Example... 2 Example from Sedra and Smith... 3 Summary... 5

ECE 34: Running a Net-list File in PSPICE Objective... 2 Simple Example... 2 Example from Sedra and Smith... 3 Summary... 5 john brews Page 1 1/23/22 ECE 34: Running a Net-list File in PSPICE Objective

### ECE4902 C Lab 7

ECE902 C2012 - Lab MOSFET Differential Amplifier Resistive Load Active Load PURPOSE: The primary purpose of this lab is to measure the performance of the differential amplifier. This is an important topology

### Laboratory 5. Transistor and Photoelectric Circuits

Laboratory 5 Transistor and Photoelectric Circuits Required Components: 1 330 resistor 2 1 k resistors 1 10k resistor 1 2N3904 small signal transistor 1 TIP31C power transistor 1 1N4001 power diode 1 Radio

### Experiment #7: Designing and Measuring a Common-Emitter Amplifier

SCHOOL OF ENGINEERING AND APPLIED SCIENCE DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING ECE 2115: ENGINEERING ELECTRONICS LABORATORY Experiment #7: Designing and Measuring a Common-Emitter Amplifier

### Laboratory Experiment 8 EE348L. Spring 2005

Laboratory Experiment 8 EE348L Spring 2005 B. Madhavan Spring 2005 B. Madhavan Page 1 of 1 EE348L, Spring 2005 B. Madhavan - 2 of 2- EE348L, Spring 2005 Table of Contents 8 Experiment #8: Introduction

### Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product

Amplifier Frequency Response, Feedback, Oscillations; Op-Amp Block Diagram and Gain-Bandwidth Product Physics116A,12/4/06 Draft Rev. 1, 12/12/06 D. Pellett 2 Negative Feedback and Voltage Amplifier AB

### I1 19u 5V R11 1MEG IDC Q7 Q2N3904 Q2N3904. Figure 3.1 A scaled down 741 op amp used in this lab

Lab 3: 74 Op amp Purpose: The purpose of this laboratory is to become familiar with a two stage operational amplifier (op amp). Students will analyze the circuit manually and compare the results with SPICE.

### Alternate Class AB Amplifier Design

L - Alternate Class AB Amplifier Design.., This Class AB amplifier (Figure 1) has an integral common emitter bipolar amplifier (see Q4). The CE amplifier replaces the bipolar main amplifier in the previous

L - Alternate Class AB Amplifier Design.., This Class AB amplifier (Figure 1) has an integral common emitter bipolar amplifier (see Q4). The CE amplifier replaces the bipolar main amplifier in the previous

### EE4902 C Lab 7

EE4902 C2007 - Lab 7 MOSFET Differential Amplifier Resistive Load Active Load PURPOSE: The primary purpose of this lab is to measure the performance of the differential amplifier. This is an important

### Lab 2: Common Base Common Collector Design Exercise

CSUS EEE 109 Lab - Section 01 Lab 2: Common Base Common Collector Design Exercise Author: Bogdan Pishtoy / Lab Partner: Roman Vermenchuk Lab Report due March 26 th Lab Instructor: Dr. Kevin Geoghegan 2016-03-25

### Objectives The purpose of this lab is build and analyze Differential amplifier based on NPN transistors.

1 Lab 03: Differential Amplifier Total 30 points: 20 points for lab, 5 points for well-organized report, 5 points for immaculate circuit on breadboard NOTES: 1) Please use the basic current mirror from

### Lab 2: Discrete BJT Op-Amps (Part I)

Lab 2: Discrete BJT Op-Amps (Part I) This is a three-week laboratory. You are required to write only one lab report for all parts of this experiment. 1.0. INTRODUCTION In this lab, we will introduce and

### Experiment #8: Designing and Measuring a Common-Collector Amplifier

SCHOOL OF ENGINEERING AND APPLIED SCIENCE DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING ECE 2115: ENGINEERING ELECTRONICS LABORATORY Experiment #8: Designing and Measuring a Common-Collector Amplifier

### Experiment # 4: BJT Characteristics and Applications

ENGR 301 Electrical Measurements Experiment # 4: BJT Characteristics and Applications Objective: To characterize a bipolar junction transistor (BJT). To investigate basic BJT amplifiers and current sources.

### SAMPLE FINAL EXAMINATION FALL TERM

ENGINEERING SCIENCES 154 ELECTRONIC DEVICES AND CIRCUITS SAMPLE FINAL EXAMINATION FALL TERM 2001-2002 NAME Some Possible Solutions a. Please answer all of the questions in the spaces provided. If you need

### 2. SINGLE STAGE BIPOLAR JUNCTION TRANSISTOR (BJT) AMPLIFIERS

2. SINGLE STAGE BIPOLAR JUNCTION TRANSISTOR (BJT) AMPLIFIERS I. Objectives and Contents The goal of this experiment is to become familiar with BJT as an amplifier and to evaluate the basic configurations

### University of Michigan EECS 311: Electronic Circuits Fall 2008 LAB 4 SINGLE STAGE AMPLIFIER

University of Michigan EECS 311: Electronic Circuits Fall 2008 LAB 4 SINGLE STAGE AMPLIFIER Issued 10/27/2008 Report due in Lecture 11/10/2008 Introduction In this lab you will characterize a 2N3904 NPN

### EE 332 Design Project

EE 332 Design Project Variable Gain Audio Amplifier TA: Pohan Yang Students in the team: George Jenkins Mohamed Logman Dale Jackson Ben Alsin Instructor s Comments: Lab Grade: Introduction The goal of

### UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering

UNIVERSITY OF NORTH CAROLINA AT CHARLOTTE Department of Electrical and Computer Engineering EXPERIMENT 8 MOSFET AMPLIFIER CONFIGURATIONS AND INPUT/OUTPUT IMPEDANCE OBJECTIVES The purpose of this experiment

### UNIT - 1 OPERATIONAL AMPLIFIER FUNDAMENTALS

UNIT - 1 OPERATIONAL AMPLIFIER FUNDAMENTALS 1.1 Basic operational amplifier circuit- hte basic circuit of an operational amplifier is as shown in above fig. has a differential amplifier input stage and

### LAB #3: ANALOG IC BUILDING BLOCKS Updated: Dec. 23, 2002

SFSU ENGR 445 ANALOG IC DESIGN LAB LAB #3: ANALOG IC BUILDING BLOCKS Updated: Dec. 23, 2002 Objective: To investigate fundamental analog IC building blocks, such as current sources, current mirrors, active

### Objectives The purpose of this lab is build and analyze Differential amplifiers based on NMOS transistors (or NPN transistors).

1 Lab 03: Differential Amplifiers (MOSFET) (20 points) NOTE: 1) Please use the basic current mirror from Lab01 for the second part of the lab (Fig. 3). 2) You can use the same chip as the basic current

### Integrators, differentiators, and simple filters

BEE 233 Laboratory-4 Integrators, differentiators, and simple filters 1. Objectives Analyze and measure characteristics of circuits built with opamps. Design and test circuits with opamps. Plot gain vs.

### EE 482 Electronics II

EE 482 Electronics II Lab #4: BJT Differential Pair with Resistive Load Overview The objectives of this lab are (1) to design and analyze the performance of a differential amplifier, and (2) to measure

### ECE 3274 Common-Emitter Amplifier Project

ECE 3274 Common-Emitter Amplifier Project 1. Objective The objective of this lab is to design and build three variations of the common- emitter amplifier. 2. Components Qty Device 1 2N2222 BJT Transistor

### .dc Vcc Ib 0 50uA 5uA

EE 2274 BJT Biasing PreLab: 1. Common Emitter (CE) Transistor Characteristics curve Generate the characteristics curves for a 2N3904 in LTspice by plotting Ic by sweeping Vce over a set of Ib steps. Label

### ES330 Laboratory Experiment No. 9 Bipolar Differential Amplifier [Reference: Sedra/Smith (Chapter 9; Section 9.2; pp )]

ES330 Laboratory Experiment No. 9 Bipolar Differential Amplifier [Reference: Sedra/Smith (Chapter 9; Section 9.2; pp. 614-627)] Objectives: 1. Explore the operation of a bipolar junction transistor differential

### NPN SILICON RF TWIN TRANSISTOR

FEATURES LOW VOLTAGE, LOW CURRENT OPERATION SMALL PACKAGE OUTLINE:. mm x.8 mm LOW HEIGHT PROFILE: Just. mm high TWO LOW NOISE OSCILLATOR TRANSISTORS: NE8 IDEAL FOR - GHz OSCILLATORS DESCRIPTION The contains

### Lab Experiment #2 Differential Amplifiers. Group Members

Lab Experiment #2 Differential Amplifiers Group Members Student 1 Student 2 Student 3 Student Name Surname First Name Student ID # Pre-Lab Mark (out of 30) Lab Demo and performance (out of 70) Total Lab

### LAB #2: BJT CHARACTERISTICS AND THE DIFFERENTIAL PAIR (Updated August 11, 2003)

SSU ENGR 445 ANALOG IC DESIGN LAB LAB #2: BJT CHARACTERISTICS AND THE DIERENTIAL PAIR (Updated August 11, 23) Objective: To characterize an IC array of matched BJTs. To assess the degree of matching. To

### University of Pittsburgh

University of Pittsburgh Experiment #1 Lab Report Frequency Response of Operational Amplifiers Submission Date: 05/29/2018 Instructors: Dr. Ahmed Dallal Shangqian Gao Submitted By: Nick Haver & Alex Williams

### Prelab 6: Biasing Circuitry

Prelab 6: Biasing Circuitry Name: Lab Section: R 1 R 2 V OUT Figure 1: Resistive divider voltage source 1. Consider the resistor network shown in Figure 1. Let = 10 V, R 1 = 9.35 kω, and R 2 = 650 Ω. We

### EE 330 Laboratory 8 Discrete Semiconductor Amplifiers

EE 330 Laboratory 8 Discrete Semiconductor Amplifiers Fall 2017 Contents Objective:... 2 Discussion:... 2 Components Needed:... 2 Part 1 Voltage Controlled Amplifier... 2 Part 2 Common Source Amplifier...

### UNIT-1 Bipolar Junction Transistors. Text Book:, Microelectronic Circuits 6 ed., by Sedra and Smith, Oxford Press

UNIT-1 Bipolar Junction Transistors Text Book:, Microelectronic Circuits 6 ed., by Sedra and Smith, Oxford Press Figure 6.1 A simplified structure of the npn transistor. Microelectronic Circuits, Sixth

### UNIVERSITY OF UTAH ELECTRICAL ENGINEERING DEPARTMENT

UNIVERSITY OF UTAH ELECTRICAL ENGINEERING DEPARTMENT ECE 3110 LAB EXPERIMENT NO. 4 CLASS AB POWER OUTPUT STAGE Objective: In this laboratory exercise you will build and characterize a class AB power output

### Experiment 9- Single Stage Amplifiers with Passive Loads - MOS

Experiment 9- Single Stage Amplifiers with Passive oads - MOS D. Yee,.T. Yeung, M. Yang, S.M. Mehta, and R.T. Howe UC Berkeley EE 105 1.0 Objective This is the second part of the single stage amplifier

### ELC224 Final Review (12/10/2009) Name:

ELC224 Final Review (12/10/2009) Name: Select the correct answer to the problems 1 through 20. 1. A common-emitter amplifier that uses direct coupling is an example of a dc amplifier. 2. The frequency

### EE311: Electrical Engineering Junior Lab, Fall 2006 Experiment 4: Basic MOSFET Characteristics and Analog Circuits

EE311: Electrical Engineering Junior Lab, Fall 2006 Experiment 4: Basic MOSFET Characteristics and Analog Circuits Objective This experiment is designed for students to get familiar with the basic properties

### EE 330 Laboratory 8 Discrete Semiconductor Amplifiers

EE 330 Laboratory 8 Discrete Semiconductor Amplifiers Fall 2018 Contents Objective:...2 Discussion:...2 Components Needed:...2 Part 1 Voltage Controlled Amplifier...2 Part 2 A Nonlinear Application...3

### ANALYSIS OF AN NPN COMMON-EMITTER AMPLIFIER

ANALYSIS OF AN NPN COMMON-EMITTER AMPLIFIER Experiment Performed by: Michael Gonzalez Filip Rege Alexis Rodriguez-Carlson Report Written by: Filip Rege Alexis Rodriguez-Carlson November 28, 2007 Objectives:

### Experiment 8 Frequency Response

Experiment 8 Frequency Response W.T. Yeung, R.A. Cortina, and R.T. Howe UC Berkeley EE 105 Spring 2005 1.0 Objective This lab will introduce the student to frequency response of circuits. The student will

### BME 3512 Bioelectronics Laboratory Five - Operational Amplifiers

BME 351 Bioelectronics Laboratory Five - Operational Amplifiers Learning Objectives: Be familiar with the operation of a basic op-amp circuit. Be familiar with the characteristics of both ideal and real

### Multi-Transistor Configurations

Experiment-3 Multi-Transistor Configurations Introduction Comment The objectives of this experiment are to examine the operating characteristics of several of the most common multi-transistor configurations,

### ECE 310L : LAB 9. Fall 2012 (Hay)

ECE 310L : LAB 9 PRELAB ASSIGNMENT: Read the lab assignment in its entirety. 1. For the circuit shown in Figure 3, compute a value for R1 that will result in a 1N5230B zener diode current of approximately

### Chapter 11. Differential Amplifier Circuits

Chapter 11 Differential Amplifier Circuits 11.0 ntroduction Differential amplifier or diff-amp is a multi-transistor amplifier. t is the fundamental building block of analog circuit. t is virtually formed

### High Frequency Amplifiers

EECS 142 Laboratory #3 High Frequency Amplifiers A. M. Niknejad Berkeley Wireless Research Center University of California, Berkeley 2108 Allston Way, Suite 200 Berkeley, CA 94704-1302 October 27, 2008

### QUESTION BANK for Analog Electronics 4EC111 *

OpenStax-CNX module: m54983 1 QUESTION BANK for Analog Electronics 4EC111 * Bijay_Kumar Sharma This work is produced by OpenStax-CNX and licensed under the Creative Commons Attribution License 4.0 Abstract

### ECE 2201 PRELAB 6 BJT COMMON EMITTER (CE) AMPLIFIER

ECE 2201 PRELAB 6 BJT COMMON EMITTER (CE) AMPLIFIER Hand Analysis P1. Determine the DC bias for the BJT Common Emitter Amplifier circuit of Figure 61 (in this lab) including the voltages V B, V C and V

### ECE4902 C Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load

ECE4902 C2012 - Lab 5 MOSFET Common Source Amplifier with Active Load Bandwidth of MOSFET Common Source Amplifier: Resistive Load / Active Load PURPOSE: The primary purpose of this lab is to measure the

### Page 1 of 7. Power_AmpFal17 11/7/ :14

ECE 3274 Power Amplifier Project (Push Pull) Richard Cooper 1. Objective This project will introduce two common power amplifier topologies, and also illustrate the difference between a Class-B and a Class-AB

### Current Mirrors. Basic BJT Current Mirror. Current mirrors are basic building blocks of analog design. Figure shows the basic NPN current mirror.

Current Mirrors Basic BJT Current Mirror Current mirrors are basic building blocks of analog design. Figure shows the basic NPN current mirror. For its analysis, we assume identical transistors and neglect

### Physics 116A Notes Fall 2004

Physics 116A Notes Fall 2004 David E. Pellett Draft v.0.9 beta Notes Copyright 2004 David E. Pellett unless stated otherwise. References: Text for course: Fundamentals of Electrical Engineering, second

### An Analog Phase-Locked Loop

1 An Analog Phase-Locked Loop Greg Flewelling ABSTRACT This report discusses the design, simulation, and layout of an Analog Phase-Locked Loop (APLL). The circuit consists of five major parts: A differential

### BJT Characterization Laboratory Dr. Lynn Fuller

ROCHESTER INSTITUTE OF TECHNOLOGY MICROELECTRONIC ENGINEERING BJT Characterization Laboratory Dr. Lynn Fuller 82 Lomb Memorial Drive Rochester, NY 14623-5604 Tel (585) 475-2035 Fax (585) 475-5041 Email:

### BME/ISE 3512 Bioelectronics. Laboratory Five - Operational Amplifiers

BME/ISE 3512 Bioelectronics Laboratory Five - Operational Amplifiers Learning Objectives: Be familiar with the operation of a basic op-amp circuit. Be familiar with the characteristics of both ideal and

### Electronics Lab. (EE21338)

Princess Sumaya University for Technology The King Abdullah II School for Engineering Electrical Engineering Department Electronics Lab. (EE21338) Prepared By: Eng. Eyad Al-Kouz October, 2012 Table of

### CHARACTERIZATION OF OP-AMP

EXPERIMENT 4 CHARACTERIZATION OF OP-AMP OBJECTIVES 1. To sketch and briefly explain an operational amplifier circuit symbol and identify all terminals. 2. To list the amplifier stages in a typical op-amp

### University of Pittsburgh

University of Pittsburgh Experiment #4 Lab Report MOSFET Amplifiers and Current Mirrors Submission Date: 07/03/2018 Instructors: Dr. Ahmed Dallal Shangqian Gao Submitted By: Nick Haver & Alex Williams

### THE UNIVERSITY OF HONG KONG. Department of Electrical and Electrical Engineering

THE UNIVERSITY OF HONG KONG Department of Electrical and Electrical Engineering Experiment EC1 The Common-Emitter Amplifier Location: Part I Laboratory CYC 102 Objective: To study the basic operation and

### ECE 3274 Common-Collector (Emitter-Follower) Amplifier Project

ECE 3274 Common-Collector (Emitter-Follower) Amplifier Project 1. Objective This project will show the biasing, gain, frequency response, and impedance properties of a common collector amplifier. 2. Components

### ENEE 307 Laboratory#2 (n-mosfet, p-mosfet, and a single n-mosfet amplifier in the common source configuration)

Revised 2/16/2007 ENEE 307 Laboratory#2 (n-mosfet, p-mosfet, and a single n-mosfet amplifier in the common source configuration) *NOTE: The text mentioned below refers to the Sedra/Smith, 5th edition.

### CHARACTERISTICS OF OPERATIONAL AMPLIFIERS - I

CHARACTERISTICS OF OPERATIONAL AMPLIFIERS - I OBJECTIVE The purpose of the experiment is to examine non-ideal characteristics of an operational amplifier. The characteristics that are investigated include

### ECE 3274 Common-Emitter Amplifier Project

ECE 3274 Common-Emitter Amplifier Project 1. Objective The objective of this lab is to design and build the common-emitter amplifier with partial bypass of the emitter resistor to control the AC voltage

### Lab 2: Common Emitter Design: Part 2

Lab 2: Common Emitter Design: Part 2 ELE 344 University of Rhode Island, Kingston, RI 02881-0805, U.S.A. 1 Linearity in High Gain Amplifiers The common emitter amplifier, shown in figure 1, will provide

### Assignment 8 Analyzing Operational Amplifiers in MATLAB and PSpice

ECEL 301 ECE Laboratory I Dr. A. Fontecchio Assignment 8 Analyzing Operational Amplifiers in MATLAB and PSpice Goal Characterize critical parameters of the inverting or non-inverting opampbased amplifiers.

### Well we know that the battery Vcc must be 9V, so that is taken care of.

HW 4 For the following problems assume a 9Volt battery available. 1. (50 points, BJT CE design) a) Design a common emitter amplifier using a 2N3904 transistor for a voltage gain of Av=-10 with the collector

### Experiment No. 9 DESIGN AND CHARACTERISTICS OF COMMON BASE AND COMMON COLLECTOR AMPLIFIERS

Experiment No. 9 DESIGN AND CHARACTERISTICS OF COMMON BASE AND COMMON COLLECTOR AMPLIFIERS 1. Objective: The objective of this experiment is to explore the basic applications of the bipolar junction transistor

### 5.25Chapter V Problem Set

5.25Chapter V Problem Set P5.1 Analyze the circuits in Fig. P5.1 and determine the base, collector, and emitter currents of the BJTs as well as the voltages at the base, collector, and emitter terminals.

### Chapter 15 Goals. ac-coupled Amplifiers Example of a Three-Stage Amplifier

Chapter 15 Goals ac-coupled multistage amplifiers including voltage gain, input and output resistances, and small-signal limitations. dc-coupled multistage amplifiers. Darlington configuration and cascode

### ECE 442 Solid State Devices & Circuits. 15. Differential Amplifiers

ECE 442 Solid State Devices & Circuits 15. Differential Amplifiers Jose E. Schutt-Aine Electrical & Computer Engineering University of Illinois jschutt@emlab.uiuc.edu ECE 442 Jose Schutt Aine 1 Background

Analog Electronics V Lecture 5 V Operational Amplifers Op-amp is an electronic device that amplify the difference of voltage at its two inputs. V V 8 1 DIP 8 1 DIP 20 SMT 1 8 1 SMT Operational Amplifers

### V o2 = V c V d 2. V o1. Sensor circuit. Figure 1: Example of common-mode and difference-mode voltages. V i1 Sensor circuit V o

M.B. Patil, IIT Bombay 1 BJT Differential Amplifier Common-mode and difference-mode voltages A typical sensor circuit produces an output voltage between nodes A and B (see Fig. 1) such that V o1 = V c

### E84 Lab 3: Transistor

E84 Lab 3: Transistor Cherie Ho and Siyi Hu April 18, 2016 Transistor Testing 1. Take screenshots of both the input and output characteristic plots observed on the semiconductor curve tracer with the following

### PRELIMINARY DATA SHEET PACKAGE OUTLINE

PRELIMINARY DATA SHEET NPN SILICON EPITAXIAL TWIN TRANSISTOR FEATURES LOW NOISE: :NF = 1.7 db TYP at f = GHz,, lc = 3 ma :NF = 1.5 db TYP at f = GHz, VCE = 3 V, lc = 3 ma HIGH GAIN: : S1E = 3.5 db TYP

### Final Design Project: Variable Gain Amplifier with Output Stage Optimization for Audio Amplifier Applications EE 332: Summer 2011 Group 2: Chaz

Final Design Project: Variable Gain Amplifier with Output Stage Optimization for Audio Amplifier Applications EE 332: Summer 2011 Group 2: Chaz Bofferding, Serah Peterson, Eric Stephanson, Casey Wojcik

### Experiment #6: Biasing an NPN BJT Introduction to CE, CC, and CB Amplifiers

SCHOOL OF ENGINEERING AND APPLIED SCIENCE DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING ECE 2115: ENGINEERING ELECTRONICS LABORATORY Experiment #6: Biasing an NPN BJT Introduction to CE, CC, and CB

### 4 Transistors. 4.1 IV Relations

4 Transistors Due date: Sunday, September 19 (midnight) Reading (Bipolar transistors): HH sections 2.01-2.07, (pgs. 62 77) Reading (Field effect transistors) : HH sections 3.01-3.03, 3.11-3.12 (pgs. 113

### Improving Amplifier Voltage Gain

15.1 Multistage ac-coupled Amplifiers 1077 TABLE 15.3 Three-Stage Amplifier Summary HAND ANALYSIS SPICE RESULTS Voltage gain 998 1010 Input signal range 92.7 V Input resistance 1 M 1M Output resistance

### Differential Amplifier Design

Differential Amplifier Design Design with ideal current source bias. Differential and common mode gain results Add finite output resistance to current source. Replace ideal current source with current

### Prelab 10: Differential Amplifiers

Name: Lab Section: Prelab 10: Differential Amplifiers For this lab, assume all NPN transistors are identical 2N3904 BJTs and all PNP transistors are identical 2N3906 BJTs. Component I S (A) V A (V) 2N3904

### Başkent University Department of Electrical and Electronics Engineering EEM 311 Electronics II Experiment 8 OPERATIONAL AMPLIFIERS

Başkent University Department of Electrical and Electronics Engineering EEM 311 Electronics II Experiment 8 Objectives: OPERATIONAL AMPLIFIERS 1.To demonstrate an inverting operational amplifier circuit.

### Voltage Feedback Op Amp (VF-OpAmp)

Data Sheet Voltage Feedback Op Amp (VF-OpAmp) Features 55 db dc gain 30 ma current drive Less than 1 V head/floor room 300 V/µs slew rate Capacitive load stable 40 kω input impedance 300 MHz unity gain

### ELEC 2210 EXPERIMENT 7 The Bipolar Junction Transistor (BJT)

ELEC 2210 EXPERIMENT 7 The Bipolar Junction Transistor (BJT) Objectives: The experiments in this laboratory exercise will provide an introduction to the BJT. You will use the Bit Bucket breadboarding system

### Chapter 8: Field Effect Transistors

Chapter 8: Field Effect Transistors Transistors are different from the basic electronic elements in that they have three terminals. Consequently, we need more parameters to describe their behavior than

### Revised: Summer 2010

EE 2274 PRE-LAB EXPERIMENT 5 DIODE OR GATE & CLIPPING CIRCUIT COMPLETE PRIOR TO COMING TO LAB Part I: 1. Design a diode, Figure 1 OR gate in which the maximum input current,, Iin is less than 5mA. Show

### EE 3305 Lab I Revised July 18, 2003

Operational Amplifiers Operational amplifiers are high-gain amplifiers with a similar general description typified by the most famous example, the LM741. The LM741 is used for many amplifier varieties

### Lab 6: Instrumentation Amplifier

Lab 6: Instrumentation Amplifier INTRODUCTION: A fundamental building block for electrical measurements of biological signals is an instrumentation amplifier. In this lab, you will explore the operation

### Carleton University ELEC Lab 1. L2 Friday 2:30 P.M. Student Number: Operation of a BJT. Author: Adam Heffernan

Carleton University ELEC 3509 Lab 1 L2 Friday 2:30 P.M. Student Number: 100977570 Operation of a BJT Author: Adam Heffernan October 13, 2017 Contents 1 Transistor DC Characterization 3 1.1 Calculations

### DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE MASSACHUSETTS INSTITUTE OF TECHNOLOGY CAMBRIDGE, MASSACHUSETTS 02139

DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE MASSACHUSETTS INSTITUTE OF TECHNOLOGY CAMBRIDGE, MASSACHUSETTS 019.101 Introductory Analog Electronics Laboratory Laboratory No. READING ASSIGNMENT

### EXPERIMENT 5 CURRENT AND VOLTAGE CHARACTERISTICS OF BJT

EXPERIMENT 5 CURRENT AND VOLTAGE CHARACTERISTICS OF BJT 1. OBJECTIVES 1.1 To practice how to test NPN and PNP transistors using multimeter. 1.2 To demonstrate the relationship between collector current