THE UNIVERSITY OF HONG KONG. Department of Electrical and Electrical Engineering

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1 THE UNIVERSITY OF HONG KONG Department of Electrical and Electrical Engineering Experiment EC1 The Common-Emitter Amplifier Location: Part I Laboratory CYC 102 Objective: To study the basic operation and analyze the characteristics of the common-emitter amplifier. Apparatus: HP E3611 DC Power Supply 1 HP 6116 A Pulse/Function Generator 1 HP A Multimeter 1 HP An Oscilloscope 1 Components: Resistors: 150 Ω 1 1 kω, 1 2 kω kω 1 10 kω 1 Capacitor: μf 2 1 μf, μf 2 10 μf 1 Transistor: 2N3904 NPN transistor 1 Others: A breadboard 1 Reference: A. S. Sedra and K. C. Smith, Microelectronic Circuits, 5 th Edition, Oxford Press, 2004 Useful Formulas Voltage gain from base to collector vout (1) Av v is (2) A v RC RL (normal circuit) r e (3) Av R r C (no load) e (4) A v R R C L E R + r e (no bypass capacitor)

2 Transistor AC-emitter resistance (at room temperature) 26mV (5) re I E Quiescent DC-base voltage RV 2 CC (6) VB R + R 1 2 Quiescent DC-emitter voltage V V V (7) E B BE Quiescent DC-emitter current VE (8) IEQ ICQ R E Quiescent DC-collector voltage V V I R (9) C CC CQ C Quiescent DC-collector-emitter voltage V V I ( R + R + R ) (10) CEQ CC CQ C E1 E2 Amplifier-input impedance R R R β ( r ) (11) in 1 2 e Voltage gain in db (12) Av in db 20log Av Frequency response due to the input coupling capacitor C 1 1 (13) f1 where R G signal source impedance 2 πc ( R + R ) 1 in G Frequency response due to the bypass capacitor C 2 (14) f2 1 R1 R2 RG 2 πc2[( + re) RE] β Frequency response due to the output coupling capacitor C 3 1 (15) f3 2 πc ( R + R ) 3 C L Preparation: 1. Before coming to the laboratory, run the PSPICE simulator to analyze the circuit in this experiment. Obtain the simulation results for Tables 1 7 and complete sketches Derive Equations 2, 3, 4, 11, 13, 14 and 15.

3 3. Suppose a resistor R is inserted between the signal generator and C 1. Derive a relation between V in and the AC voltage at point B. Procedures: 1. Wire the circuit shown in Fig. 1 on the breadboard provided. Do not connect the signal generator and the power supply to the circuit yet! 2. Check all connections. Apply the 15-V supply voltage. Use the DMM to individually measure the transistor DC-base voltage V B, emitter voltage V E and collector voltage V C with respect to the ground. Record the results into Table 1. Based on the resistor values in Fig. 1, calculate the expect values of these three voltages using Eqns. 6, 7 and 9, assuming a base-emitter voltage drop of 0.7 V. Complete Table Using the measured value for the DC-emitter voltage V E obtained in Step 2, calculate the DCemitter current I EQ using Eqn. 9 and the transistor AC-emitter resistance r e using Eqn. 5. Complete Table Connect Channels 1 and 2 of the oscilloscope to points I (v in ) and point O (v out ), respectively, of the circuit in Fig. 1. Then connect the signal generator to the circuit and adjust the sine wave output level of the generator to 0.02 V p-p (peak-to-peak) at a frequency of 5 khz. Measure the actual p-p output voltage out v and the p-p input voltage v in, calculate the voltage gain by dividing v out by v in, and the expected value using Eqn. 2. Record them in Table 3. Sketch the output voltage waveform in Sketch Slowly increase the amplitude of v in to obtain the maximum symmetrical v out without getting any clipping on the output waveform. Measure the p-p values of v in and v out, and then calculate the gain. Also, calculate the expected values using Eqn. 2. Record them in Table 3. Sketch the output waveform in Sketch Increase the amplitude of v in in Step 5 by about 20%. Measure the p-p values of v in and v out, and then calculate the gain. Also calculate the expected value using Eqn. 2. Record them in Table 3. Sketch the output waveform in Sketch Remove R L. As in Step 4, experimentally determine the voltage gain by measuring the p-p voltages of v in and v out, and calculate the expected value using Eqn. 3. Record them in Table Reconnect the 2-kΩ resistor as in the original circuit of Fig. 1. Remove the 10-μF emitter bypass capacitor from the circuit. As in Step 7, experimentally determine the voltage gain and calculate the expected value using Eqn. 4. Complete Table Reconnect the 10-μF emitter bypass capacitor as in the original circuit of Fig. 1. Keep v in at 0.02V (p-p). Vary the frequency of the input signal as indicated in Table 4 and measure v out at each frequency. Plot the frequency response in Sketch 4. (Alternately, you can use PSPICE to generate

4 the plot and then plot the measured values on the same figure.) Record the lower and upper 3-dB frequencies in Table Adjust the output level of the signal generator to v in 0.02 (p-p) at 50kHz. Measure v out. Determine the voltage gain of the amplifier in db using Eqn. 12 and the expected voltage gain in db using Eqns. 2 and 12. Complete Table In order to determine the amplifier s low frequency 3-dB point due to C 1 only, replaced C 1 with a μf capacitor. Adjust the signal generator to give v in 0.02 V (p-p) at 50 khz. Measure v out. Slowly reduce the frequency of the input signal until v out drops to (i.e. 1/ 2 ) of that measured at 50 khz input frequency. Record the frequency (f 1 ) at which this occurs in Table 6. Calculate the expected value using Eqn. 13, assuming β 150 for the 2N3094 transistor, and record it in Table 6. Replace C 1 with the original 2.2 μf capacitor. 12. Replace C 2 with a 1-μF capacitor and repeat the procedures outlined Step 11. Record the measured value of f 2 in Table 6. Calculate the expected value using Eqn. 14 and record it in Table 6. Replace C 2 with the original 10-μF capacitor after the measurement. 13. Replace C 3 with a μF capacitor and repeat the procedures outlined in Step 11. Record the measured value of f 3 in Table 6. Calculate the expected value using Eqn. 14 and record it in Table 6. NB when you use PSPICE to get the values for steps 11-13, you can first plot the frequency response for each case and then get the 3-dB frequency from the plot. Figure 1

5 Report on: EC1 The Common-Emitter Amplifier Name: Student No.: Stream: Group No.: Date of experiment: Date of submission: Table 1 (Step 2) Parameter Measured Calculated %Error Simulated %Error Value Value Value Parameter I EQ (measured) r e (calculated) I EQ (simulated) %Error Table 2 (Step 3) Value Condition Normal circuit (step 4) Normal circuit with maximum symmetrical v out (step 5) Normal circuit with distorted v out (step 6) No load(step 7) No bypass capacitor (step 8) Table 3 Comparison of gains obtained from different methods (Steps 4-8) v in v out Measured Expected %Error Simulated %Error p-p p-p Gain Gain Gain

6 Table 4 Frequency Response for v in 0.02 peak-to-peak (Step 9) Freq (Hz) k 10k 20k Output (p-p) V A v Lower 3-dB frequency is 20 log A v Gain in db (simulated) Freq (Hz) 500 k 1 M 10 M 30 M 50 M 100 M Output NA (p-p) V A v Lower 3-dB frequency is 20 log A v Gain in db (simulated) NA Table 5 Amplifier mid-band response (Step 10) Parameter v in (p-p) measured v out (p-p) measured A v (db) measured A v (db) expected %Error A v (db) simulated %Error Value

7 Table 6 Amplifier low-frequency response (Steps 11-13) Frequency Measured Expected %Error Simulated %Error f 1 due to C 1 f 2 due to C 2 f 3 due to C 3 Scale: V/division Sketch 1: Waveform v out with v in 0.2 (p-p) (Step 4)

8 Scale: V/division Sketch 2: Maximum symmetrical waveform v out for the amplifier (Step 5) Scale: V/division Sketch 3: Distorted waveform v out with v in increased by 20% (Step 6)

9 Sketch 4: Amplifier Frequency Response (Step 9) Scale: V/division Sketch 5: DC and AC load lines

10 Postlab Questions: 1. Derive equations for the DC load line and the AC load line for the normal circuit shown in Fig. Using the measured I CQ and V CQ, draw both the DC and AC load lines in Sketch 5. Determine the maximum symmetrical p-p v out. Does this agree with that obtained in Step 5? Discuss. 2. In Steps 4 and 5, are the positive and negative peaks of v out symmetrical and equal in magnitude? Explain the discrepancies. 3. Comment on the advantages and disadvantages of this type of amplifier circuits. Version: