UNIVERSITY OF PENNSYLVANIA EE 206

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1 UNIVERSITY OF PENNSYLVANIA EE 206 TRANSISTOR BIASING CIRCUITS Introduction: One of the most critical considerations in the design of transistor amplifier stages is the ability of the circuit to maintain stable quiescent bias values. As you have studied, operating points are extremely sensitive to variations in V BE, the base-to-emitter voltage; small changes in V BE cause large changes in I C, the collector current. The problem lies in the fact that V BE is a function of temperature ( V BE / T =-2mV/ o C). An improperly designed transistor stage may function well at a room temperature of 25 C but will fail to perform at 50 C. Not only is the ambient temperature a factor, but also self-heating of the transistor under load. It is imperative that the design provides some means of maintaining stable operating conditions over a temperature range consistent with the expected operating environment. In this lab session we will examine the effects of temperature on various biasing arrangements, and how to provide bias circuits that minimize these effects by use of negative feedback concepts. Background 1. The Grounded Emitter Amplifier Many textbooks use the transistor amplifier shown in Figure 1 as an introduction to biasing. The purpose of biasing is to provide a base current to place the quiescent operating point of the transistor in the active linear region. It is generally noted that the biasing arrangement in Figure 1 is temperature sensitive and finds limited use. Small changes in V BE due to temperature variations causes large changes in collector current and changes the operating point of the amplifier. Figure 1: Grounded Emitter Amplifier JVdS 1 4/20/04

2 2. Common Emitter Amplifier In Figure 2, an emitter resistance, R E, has been added to stabilize quiescent values against temperature variations. The emitter resistor provides negative feedback to compensate for changes in V BE. (Feedback will be the subject of study in Chapter 8. For an intuitive look at how feedback works, refer to the textbook by Sedra & Smith.) The circuit of Figure 2 is known as a common emitter amplifier. Figure 2: Common Emitter Amplifier The common emitter amplifier in Figure 2 is the most common configuration for bias stabilization. By increasing the emitter resistor, R E, it can also provide a reduced sensitivity to changes in the β of the transistor. This is an important consideration since there can be a 2 or 3 times variation of this parameter for a given transistor type. However, since the voltage gain is approximately v O2 /v s ~ - R C /R E the gain can be significantly reduced. In Section 4, below, we will show how to compensate for loss in signal gain without disturbing the dc bias voltage. 3. Collector Feedback Biasing A third common configuration to provide temperature stabilization is shown in Figure 3. In this circuit base current is supplied from the collector through R C. If the collector current increases due to an increase in V BE, the collector voltage will decrease, supplying less base current. This feedback action thus tends to hold the collector quiescent voltage, I C, constant. JVdS 2 4/20/04

3 Effects of Negative Feedback Systems Figure 3: Grounded Emitter Amplifier with Collector Feedback The circuits shown in Figures 2 and 3 use negative feedback to stabilize their quiescent collector voltages. When you study feedback theory in class, it will be shown that negative feedback (also called degenerative feedback) will always result in loss of gain. In an amplifier stage, base signal current will cause changes in the collector voltage which, when fed back, reduces the available amplification. 4. Compensating for signal loss in the common emitter amplifier To compensate for the gain loss in the common emitter amplifier shown in Figure 2, a by-pass capacitor, CE, shown in Figure 4, can be added to the circuit. The value of CE should be chosen to provide a low impedance path for frequencies of interest. This, in effect, will allow the signal current to by-pass the emitter resistor without any change in the dc bias condition. The amplifier will now provide the full signal gain available from the stage. Figure 4: Common Emitter Amplifier with By-Pass Capacitor CE JVdS 3 4/20/04

4 Note: The time constant associated with the capacitor C E is R EQ C E, in which R EQ is given by the parallel resistor of R E and R. The expression of the resistance R is given by: RB R = re + (1) ( β +1) where r e = intrinsic emitter resistance = V T /I E ; V T = 25 C and R B =R 1 //R 2. Notice that R corresponds to the resistance seen when looking into the emitter terminal. Pre-Lab Assignments An npn transistor 2N3904 has a current gain β in the range of 100 to 300. For your calculations you can assume a nominal value for β of Review the section 4.6 (Analysis of Transistor Circuits at DC) and section 4.10 (Biasing ) in your textbook (Sedra-Smith). 2. Analyze circuit of Fig. 1. Assume that V BE =0.75V and that the potentiometer R2 is set at 680 Ω. Calculate the DC bias currents I C, I E and I B at room temperature and find also the DC value of the collector voltage V C. Remember that a capacitor at DC is an open circuit. 3. Do the same for the circuit of Fig. 2 and find the DC bias currents I C, I E and I B, and the DC voltages at the collector, emitter and base. You can assume that the potentiometer R2 is now set at 1.2 KΩ. 4. Consider the biasing circuit of Fig. 3 and find the DC bias currents I C, I E and I B, and the DC voltages at the collector. 5. Assume the temperature increases by 50 degrees C. Find the values of the collector current I C and the collector voltage V C of the transistor circuits of Fig. 1 and Fig. 2. Compare the values of the collector current with the value that you obtained at room temperature (as calculated in assignment 2 and 3 above). What do you conclude about the stability of the biasing current in each circuit? You can assume that the current gain β remains equal to 200. The V BE changes with temperature: V BE / T=-2mV/ o C. 6. Consider the circuit of Fig. 2 (or Fig. 4): a. Calculate the resistance R seen looking into the emitter, using equation (1). Use the current values of I C and I E that you calculated in section 3 above. b. Assuming that the capacitor CE in Fig. 4 is equal to 3.3 µf, what is the corresponding time constant of the circuit seen at the emitter using the calculated value of R )? What is the corresponding cut-off frequency (i.e. 3dB frequency associated with the RC circuit)? JVdS 4 4/20/04

5 In-Lab Assignments Parts List 2-2N3904 transistors 1-5 kω potentiometer kω potentiometer 2-1 µf capacitors µf capacitor Pin connection of the npn 2N3904 (TO92 package) Table 1: DC measurements Fig. 1 Fig. 2 Fig. 3 Fig. 4 V C V B V E Table 2: AC measurements Amplifier Figure Type Grounded Emitter Common Emitter Collector Feedback Common Emitter with bypass cap CE Input signal amplitude V s khz) Output signal Amplitude V o Measured 10 khz Gain = v o /v s Max output signal before distortion (Vpp) Figure 5: Potentiometer schematic JVdS 5 4/20/04

6 Procedure: 1. Grounded Emitter Amplifier: a. Construct the amplifier of Fig. 1 and put a small piece of tape to tag the transistor you will use in the circuit so that it can be clearly identified. With the signal input Vi connected to ground, adjust the potentiometer R2 in Fig. 1 such that the collector voltage V C is approximately 5V and record your measured value for V C in a table set up in your notebook like Table 1: DC Measurements. Using the DMM measure the adjusted R2 and record its value in your notebook. Calculate the corresponding collector current I C and record its value in your notebook. b. Next you will use the grounded emitter circuit as an amplifier. Remove the ground connection to Vi. Connect Vi to your function generator to supply to the amplifier a 100 mv peak-to-peak, 10 khz sinusoidal input signal. i. Set the voltage ratio v o1 /v i to approximately 40 by adjusting the potentiometer Rs. When you complete your adjustment of Rs record your measured voltage gain A v = v o1 /v s in a table set up in your notebook like Table 2: AC Measurements. Notice that we defined the voltage gain as the ratio of the voltage swing of the input signal to the voltage swing of the signal v s applied to the base. Using the DMM measure the adjusted Rs and record its value in your notebook. ii. Monitoring the output on the oscilloscope, adjust the amplitude of the input (by adjusting the potentiometer Rs) to a level producing maximum dynamic range at the output, i.e. just before the output waveform shows distortion. Record the maximum amplitude of the output signal in your AC Measurements table. c. Replace the transistor that is currently in your circuit with the second 2N3904 transistor. Note and record the effect of this change on the output v o1 (DC and ac signal). (Note: the potentiometer of Figs 1, 2, 3 and 4 are symbolic representations. The actual potentiometer has three terminals as shown in the Fig. 5). 2. Common Emitter Amplifier: a. Using the circuit you constructed in part 1a (using the tagged transistor) and keeping potentiometers Rs at the same value you set in parts 1b, construct the amplifier of Fig. 2, by adding the emitter resistor R E. With the signal Vi connected to ground, measure the collector voltage. Adjust the potentiometer R2 such that the collector voltage is equal to 5V. After adjusting R2, measure the base and emitter voltages and record your measured values in your DC Measurements table. Calculate the corresponding collector current I C and record its value in your notebook. b. Using the same 10 khz sinusoidal input signal as in part 1b, adjust the input signal (using the potentiometer Rs or the function generator) until the output signal is about 3V peakto-peak. i. Next, measure the voltage gain A v = v o2 /v s and record its value in your AC measurements table. ii. Monitoring the output on the oscilloscope, adjust the amplitude of the input to a level producing maximum dynamic range at the output, i.e. just before the output JVdS 6 4/20/04

7 waveform shows distortion. Record the maximum amplitude of the output signal in your AC Measurements table. c. Replace the transistor that is currently in your circuit with the second 2N3904 transistor. Note and record the effect of this change on the output (DC and ac signal). 3. Common Emitter Amplifier with By-Pass Capacitor CE: a. Using the circuit you constructed in part 2a (using the tagged transistor) and keeping potentiometers R2 and Rs at the same values you set in parts 2a and 2b, construct the amplifier of Fig. 4. With the signal input Vi connected to ground, measure the base, collector and emitter voltages and record your measured values in your DC Measurements table. Calculate the corresponding collector current I C and record its value in your notebook. b. Apply the same 10 khz sinusoidal input signal as in part 1b. Monitoring the output signal v o4 on the oscilloscope, adjust the amplitude of the input v i to a level producing maximum dynamic range at the output, i.e. just before the output waveform shows distortion. Record the maximum amplitude of the output signal in your AC Measurements table. Measure the voltage gain A v = v o4 /v s and record its value in your AC measurements table. c. Replace the transistor that is currently in your circuit with the second 2N3904 transistor. Note and record the effect of this change on the output (DC and ac signal). d. Compare your measurements in parts 3b and 3c with those you recorded for the common emitter circuit in Fig. 2. What is the effect of the bypass capacitor CE? e. Verify that signals with frequencies less than 5kHz are attenuated by plotting the amplitude of the voltage gain (in db) vs. frequency (Bode plot) from 500 Hz to 50 khz (use about 5 points per decade). Find the 3dB point of the frequency response. How does this 3dB frequency compare to the one you calculated in the prelab, section 6b? 4. Grounded Emitter Amplifier with Collector Feedback: a. Construct the amplifier of Fig. 3 (using the tagged transistor). With the signal input v i connected to ground, measure the collector voltage V C and record its measured value in your DC Measurements table. Calculate the corresponding collector current I C and record its value in your notebook. b. Apply the same 10 khz sinusoidal input signal as in part 1b. Monitoring the output signal v o3 on the oscilloscope, adjust the amplitude of the input v i to a level producing maximum dynamic range at the output, i.e. just before the output waveform shows distortion. Record the maximum amplitude of the output signal in your AC Measurements table. Also, measure the voltage gain A v = v o3 /v s and record its value in your table. c. Replace the transistor that is currently in your circuit with the second 2N3904 transistor. Note and record the effect of this change on the output (DC and ac signal). JVdS 7 4/20/04

8 Appendix: Guidelines for designing a biasing circuit The following write up gives a possible procedure to design a biasing circuit, shown in Fig. 6. It is somewhat different from the rule of thumb given in the textbook (Microelectronics by Sedra&Smith). The method given below results in a smaller emitter resistance R E as compared to the rule of thumbs explained in the textbook. However, the possible voltage swing at the collector is larger since the voltage drop over the emitter resistor will be smaller for the method given here. Figure 6: Biasing of a Common Emitter Amplifier. 1.For max dynamic range select the desired collector current and determine R C for V C =V CC /2. 2. As a general rule, let R E = R C /10 and determine V E. For the transistor to be in the active region, V B = (V E + V BE ) = (V E + 0.7) 3. Determine the base current required for I C I B = I C / β 4. Calculate a resistive divider consisting of R1 and R2 to provide the desired voltage V B, determined in 2, above. To optimize the effects of temperature and β variations, use the following criteria: Select a value for R 1 so that it can supply a current greater than I B. R 2 is used to stabilize the base voltage and must draw some current. R 1 R 2 /(R 1 +R 2 ) << βr E (see the textbook on Microelectronic Circuits by Sedra & Smith). JVdS 8 4/20/04

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