DESCRIPTIO. LT5525 High Linearity, Low Power Downconverting Mixer FEATURES APPLICATIO S TYPICAL APPLICATIO

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1 High Linearity, Low Power Downconverting Mixer FEATRES Wide Input Frequency Range:.8GHz to.ghz* Broadband LO and IF Operation High Input IP3: +17.6dBm at 19MHz Typical Conversion Gain: 1.9dB at 19MHz High LO-RF and LO-IF Isolation SSB Noise Figure:.1dB at 19MHz Single-Ended Ω RF and LO Interface Integrated LO Buffer: dbm Drive Level Low Supply Current: 8mA Typ Enable Function Single V Supply 16-Lead QFN (4mm 4mm) Package APPLICATIO S Point-to-Point Data Communication Systems Wireless Infrastructure High Performance Radios High Linearity Receiver Applications DESCRIPTIO The LT is a low power broadband mixer optimized for high linearity applications such as point-to-point data transmission, high performance radios and wireless infrastructure systems. The device includes an internally Ω matched high speed LO amplifier driving a double-balanced active mixer core. An integrated RF buffer amplifier provides excellent LO-RF isolation. The RF input balun and all associated Ω matching components are integrated. The IF ports can be easily matched across a broad range of frequencies for use in a wide variety of applications. The LT offers a high performance alternative to passive mixers. nlike passive mixers, which require high LO drive levels, the LT operates at significantly lower LO input levels and is much less sensitive to LO power level variations., LTC and LT are registered trademarks of Linear Technology Corporation. *Operation over a wider frequency range is achievable with reduced performance. Consult factory for more information. TYPICAL APPLICATIO 19MHz High Signal Level Frequency Downconversion EN BIAS V CC 19MHz 14MHz RF + IF + nh 4:1 LNA VGA ADC 1.pF IF nh RF LT LO + LO INPT dbm V CC1 LO TA1.1µF 1pF V CC V DC OTPT POWER (dbm/tone) IF Output Power and IM3 vs RF Input Power (Two Input Tones) P OT IM3 T A = C f RF = 19MHz f LO = 176MHz f IF = 14MHz P LO = dbm 1 RF INPT POWER (dbm/tone) TA 1

2 ABSOLTE MAXIMM RATINGS W W W (Note 1) Supply Voltage....V Enable Voltage....3V to V CC +.3V LO Input Power... +1dBm LO + to LO Differential DC Voltage... ±1V LO + and LO Common Mode DC Voltage....V to V CC RF Input Power... +1dBm RF + to RF Differential DC Voltage... ±.13V RF + and RF Common Mode DC Voltage....V to V CC IF + and IF Common Mode DC Voltage....V Operating Temperature Range... 4 C to 8 C Storage Temperature Range... 6 C to 1 C Junction Temperature (T J )... 1 C PACKAGE/ORDER INFORMATION RF + RF TOP VIEW LO + LO EN VCC1 V CC F PACKAGE 16-LEAD (4mm 4mm) PLASTIC QFN T JMAX = 1 C, θ JA = 37 C/W EXPOSED PAD (PIN 17) IS, MST BE SOLDERED TO PCB. PINS SHOLD BE GRONDED 9 IF + IF W ORDER PART NMBER LTEF F PART MARKING Consult LTC Marketing for parts specified with wider operating temperature ranges. DC ELECTRICAL CHARACTERISTICS V CC = V, EN = 3V, T A = C (Note 3), unless otherwise noted. Test circuit shown in Figure 1. PARAMETER CONDITIONS MIN TYP MAX NITS Power Supply Requirements (V CC ) Supply Voltage (Note 6) V Supply Current V CC = V 8 33 ma Shutdown Current EN = Low 1 µa Enable (EN) Low = Off, High = On EN Input High Voltage (On) 3 V EN Input Low Voltage (Off).3 V Enable Pin Input Current EN = V µa EN = V.1 µa Turn-On Time (Note ) 3 µs Turn-Off Time (Note ) 6 µs AC ELECTRICAL CHARACTERISTICS (Notes, 3) PARAMETER CONDITIONS MIN TYP MAX NITS RF Input Frequency Range (Note 4) Requires RF Matching Below 13MHz 8 to MHz LO Input Frequency Range (Note 4) to 3 MHz IF Output Frequency Range (Note 4) Requires IF Matching.1 to 1 MHz V CC = V, EN = 3V, T A = C. Test circuit shown in Figure 1. (Notes, 3) PARAMETER CONDITIONS MIN TYP MAX NITS RF Input Return Loss Z O = Ω db LO Input Return Loss Z O = Ω, External DC Blocks db IF Output Return Loss Z O = Ω, External Match db LO Input Power 1 to dbm

3 AC ELECTRICAL CHARACTERISTICS V CC = V, EN = 3V, T A = C, P RF = dbm ( dbm/tone for -tone IIP3 tests, f = 1MHz), f LO = f RF 14MHz, P LO = dbm, IF output measured at 14MHz, unless otherwise noted. Test circuit shown in Figure 1. (Notes, 3) PARAMETER CONDITIONS MIN TYP MAX NITS Conversion Gain f RF = 9MHz.6 db f RF = 19MHz 1.9 db f RF = 1MHz. db f RF = MHz. db Conversion Gain vs Temperature T A = 4 C to 8 C. db/ C Input 3rd Order Intercept f RF = 9MHz 1. dbm f RF = 19MHz 17.6 dbm f RF = 1MHz 17.6 dbm f RF = MHz 1. dbm Single Sideband Noise Figure f RF = 9MHz 14. db f RF = 19MHz.1 db f RF = 1MHz.6 db f RF = MHz.6 db LO to RF Leakage f LO = MHz to 1MHz dbm f LO = 1MHz to 3MHz 43 dbm LO to IF Leakage f LO = MHz to 14MHz dbm f LO = 14MHz to 3MHz 39 dbm RF to LO Isolation f RF = MHz to 3MHz >38 db RF to IF Isolation f RF = 9MHz 6 db f RF = 19MHz 4 db f RF = 1MHz 4 db f RF = MHz 33 db Input 1dB Compression f RF = 9MHz 7.6 dbm f RF = 19MHz 4 dbm f RF = 1MHz 4 dbm f RF = MHz 3 dbm RF-LO Output Spurious Product 9MHz: f RF = 83MHz at dbm 63 dbc (f RF = f LO + f IF /) 19MHz: f RF = 183MHz at dbm 3 dbc 1MHz: f RF = 3MHz at dbm 4 dbc MHz: f RF = 43Hz at dbm 4 dbc 3RF-3LO Output Spurious Product 9MHz: f RF = 86.67MHz at dbm 74 dbc (f RF = f LO + f IF /3) 19MHz: f RF = MHz at dbm 9 dbc 1MHz: f RF = 6.67MHz at dbm 9 dbc MHz: f RF = 46.67Hz at dbm 6 dbc Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note : The performance is measured with the test circuit shown in Figure 1. For 9MHz measurements, C1 = 3.9pF. For all other measurements, C1 is not used. Note 3: Specifications over the 4 C to 8 C temperature range are assured by design, characterization and correlation with statistical process controls. Note 4: Operation over a wider frequency range is possible with reduced performance. Consult the factory for information and assistance. Note : Turn-on and turn-off times correspond to a change in the output level of 4dB. Note 6: The part is operable below 3.6V with reduced performance. 3

4 TYPICAL AC PERFOR A CE CHARACTERISTICS V CC = V, EN = 3V, T A = C, f RF = 19MHz, W P RF = dbm ( dbm/tone for -tone IIP3 tests, f = 1MHz), f LO = f RF 14MHz, P LO = dbm, IF output measured at 14MHz, unless otherwise noted. Test circuit shown in Figure 1. GAIN (db), IIP3 (dbm) 1 9 Conversion Gain and IIP3 vs RF Frequency (Low Side LO) IIP3 GAIN C 8 C 4 C RF FREQEY (MHz) G1 GAIN (db), IIP3 (dbm) 1 9 Conversion Gain and IIP3 vs RF Frequency (High Side LO) IIP3 GAIN C 8 C 4 C RF FREQEY (MHz) G NOISE FIGRE (db) SSB NF vs RF Frequency HIGH SIDE LO LOW SIDE LO RF FREQEY (MHz) G3 GAIN (db), IIP3 (dbm) 1 Conversion Gain and IIP3 vs LO Input Power IIP3 GAIN C 8 C 4 C NOISE FIGRE (db) SSB Noise Figure vs LO Input Power C 8 C 4 C LEAKAGE (dbm) LO-IF, LO-RF and RF-LO Leakage vs Frequency LO-RF LO-IF RF-LO LO INPT POWER (dbm) LO INPT POWER (dbm) FREQEY (MHz) G4 G G6 Conversion Gain and IIP3 vs Supply Voltage RF, LO and IF Port Return Loss vs Frequency IF Output Power and IM3 vs RF Input Power (Two Input Tones) GAIN (db), IIP3 (dbm) 1.8 IIP3 GAIN SPPLY VOLTAGE (V) C 8 C 4 C RETRN LOSS (db) 1 3 IF LO RF 1 FREQEY (MHz) 3 OTPT POWER (dbm/tone) P OT IM3 C 8 C 4 C 1 RF INPT POWER (dbm/tone) G7 G8 G9 4

5 TYPICAL AC PERFOR A CE CHARACTERISTICS V CC = V, EN = 3V, T A = C, f RF = 19MHz, W P RF = dbm ( dbm/tone for -tone IIP3 tests, f = 1MHz), f LO = f RF 14MHz, P LO = dbm, IF output measured at 14MHz, unless otherwise noted. Test circuit shown in Figure 1. OTPT POWER (dbm) IF OT, and 3 3 Spurs vs RF Input Power IF OT f RF = 19MHz RF-LO f RF = 183MHz 3RF-3LO f RF = MHz 1 RF INPT POWER (dbm) T A = C f LO = 176MHz f IF = 14MHz G1 OTPT POWER (dbm) and 3 3 Spurs vs LO Input Power T A = C f LO = 176MHz f IF = 14MHz RF-LO f RF = 183MHz 3RF-3LO f RF = MHz LO INPT POWER (dbm) G11 TYPICAL DC PERFOR A CE CHARACTERISTICS W Test circuit shown in Figure 1. SPPLY CRRENT (ma) Supply Current vs Supply Voltage C 8 C 4 C SPPLY VOLTAGE (V) G1 SHTDOWN CRRENT (µa) 1 Shutdown Current vs Supply Voltage.8 C 8 C 4 C SPPLY VOLTAGE (V) G13

6 PI F CTIO S (Pins 1, 4, 8, 13, 16): Not Connected Internally. These pins should be grounded on the circuit board for improved LO-to-RF and LO-to-IF isolation. RF +, RF (Pins, 3): Differential Inputs for the RF Signal. One RF input pin may be DC connected to a low impedance ground to realize a Ω single-ended input at the other RF pin. No external matching components are required. A DC voltage should not be applied across these pins, as they are internally connected through a transformer winding. EN (Pin ): Enable Pin. When the input voltage is higher than 3V, the mixer circuits supplied through Pins 6, 7, 1 and 11 are enabled. When the input voltage is less than.3v, all circuits are disabled. Typical enable pin input current is µa for EN = V and.1µa when EN = V. V CC1 (Pin 6): Power Supply Pin for the LO Buffer Circuits. Typical current consumption is 11mA. This pin should be externally connected to the other V CC pins and decoupled with 1µF and.1µf capacitors. V CC (Pin 7): Power Supply Pin for the Bias Circuits. Typical current consumption is.ma. This pin should be externally connected to the other V CC pins and decoupled with 1µF and.1µf capacitors. (Pins 9, 1): Ground. These pins are internally connected to the Exposed Pad for better isolation. They should be connected to ground on the circuit board, though they are not intended to replace the primary grounding through the Exposed Pad of the package. IF and IF + (Pins 1, 11): Differential Outputs for the IF Signal. An impedance transformation may be required to match the outputs. These pins must be connected to V CC through impedance matching inductors, RF chokes or a transformer center-tap. LO, LO + (Pins 14, ): Differential Inputs for the Local Oscillator Signal. The LO input is internally matched to Ω. The LO can be driven with a single-ended source through either LO input pin, with the other LO input pin connected to ground. There is an internal DC resistance across these pins of approximately 48Ω. Thus, a DC blocking capacitor should be used if the signal source has a DC voltage present. Exposed Pad (Pin 17): Circuit Ground Return for the Entire IC. This must be soldered to the printed circuit board ground plane. BLOCK DIAGRA W 17 EXPOSED PAD 14 LO + LO RF + RF 3 LINEAR AMPLIFIER BIAS DOBLE- BALAED MIXER HIGH SPEED LO BFFER 1 IF + 11 IF 1 9 EN V CC 7 V CC1 6 BD 6

7 TEST CIRCITS RF IN 19MHz LO IN 176MHz C1 OPTIONAL LO + LO 1 RF + IF + 3 RF 4 EN LT V CC1 V CC IF L3 C3 L.18" ER = 4.4 RF.6" DC.18" T C IF OT 14MHz EN MHz INPT MATCHING: C1: 3.9pF C C8 V 6 F1 CC REF DES VALE SIZE PART NMBER C1 4 Frequency Dependent C.1µF 4 AVX 43C13JAT C3 1.pF 4 AVX 4A1RBAT C4 1pF 4 AVX 4A11JAT C8 1µF 63 Taiyo Yuden LMK17BJMA L, L3 nh 168 Toko LL168-FSRJ T 4:1 SM- M/A-COM ETC4-1- Figure 1. Test Schematic APPLICATIO S I FOR ATIO W The LT consists of a double-balanced mixer, RF balun, RF buffer amplifier, high speed limiting LO buffer and bias/enable circuits. The IC has been optimized for downconverter applications with RF input signals from.8ghz to.ghz and LO signals from MHz to 3GHz. With proper matching, the IF output can be operated at frequencies from.1mhz to 1GHz. Operation over a wider frequency range is possible, though with reduced performance. The RF, LO and IF ports are all differential, though the RF and LO ports are internally matched to Ω for singleended drive. The LT is characterized and production tested using single-ended RF and LO inputs. Low side or high side LO injection can be used. RF Input Port The mixer s RF input, shown in Figure, consists of an integrated balun and a high linearity differential amplifier. The primary terminals of the balun are connected to the RF + and RF pins (Pins and 3, respectively). The secondary side of the balun is internally connected to the amplifier s differential inputs. For single-ended operation, the RF + pin is grounded and the RF pin becomes the RF input. It is also possible to ground the RF pin and drive the RF + pin, if desired. If the RF source has a DC voltage present, then a coupling capacitor must be used in series with the RF input pin. Otherwise, excessive DC current could damage the primary winding of the balun. 7

8 APPLICATIO S I FOR ATIO 8 RF IN OPTIONAL SERIES REACTAE FOR LOW BAND OR HIGH BAND MATCHING 3 RF W RF + Figure. RF Input Schematic LT F As shown in Figure 3, the RF input return loss with no external matching is greater than 1dB from 1.3GHz to.3ghz. The RF input match can be shifted down to 8MHz by adding a series 3.9pF capacitor at the RF input. A series 1.nH inductor can be added to shift the match up to.ghz. Measured return losses with these external components are also shown in Figure 3. RETRN LOSS (db) 1 3 NO RF MATCHING SERIES 3.9pF SERIES 1.nH 1 RF FREQEY (MHz) F3 3 Figure 3. RF Input Return Loss Without and with External Matching Components Figure 4 illustrates the typical conversion gain, IIP3 and NF performance of the LT when the RF input match is shifted lower in frequency using an external series 3.9pF capacitor on the RF input. RF input impedance and reflection coefficient (S11) versus frequency are shown in Table 1. The listed data is referenced to the RF pin with the RF + pin grounded (no external matching). This information can be used to simulate board-level interfacing to an input filter, or to design a broadband input matching network. GAIN AND NF (db), IIP3 (dbm) 1 8 IIP3 SSB NF GAIN T A = C f IF = 14MHz LOW SIDE LO HIGH SIDE LO RF FREQEY (MHz) F4 Figure 4. Typical Gain, IIP3 and NF with Series 3.9pF Matching Capacitor Table 1. RF Port Input Impedance vs Frequency FREQEY INPT REFLECTION COEFFICIENT (MHz) IMPEDAE MAG ANGLE j j j j j j j j j j j j j j A broadband RF input match can be easily realized by using both the series capacitor and series inductor as shown in Figure. This network provides good return loss at both lower and higher frequencies simultaneously, while maintaining good mid-band return loss. The broadband return loss is plotted in Figure 6. The return loss is better than 1dB from 7MHz to.6ghz using the element values of Figure. LO Input Port The LO buffer amplifier consists of high speed limiting differential amplifiers designed to drive the mixer core for high linearity. The LO + and LO pins are designed for

9 APPLICATIO S I FOR ATIO W RF+ LT RF IN C 4.7pF L3 1.nH 3 RF RETRN LOSS (db) 1 F Figure. Wideband RF Input Matching 1 FREQEY (MHz) 3 F8 RETRN LOSS (db) 1 3 SERIES 1.nH AND 4.7pF NO EXTERNAL RF MATCHING 1 RF FREQEY (MHz) F6 3 Figure 6. RF Input Return Loss sing Wideband Matching Network single-ended drive, though differential drive can be used if desired. The LO input is internally matched to Ω. A simplified schematic for the LO input is shown in Figure 7. Measured return loss is shown in Figure 8. If the LO source has a DC voltage present, then a coupling capacitor should be used in series with the LO input pin due to the internal resistive match. LO IN Ω 14 LO V CC LO+ pf 48Ω pf 4Ω LT F7 Figure 8. LO Input Return Loss The LO port input impedance and reflection coefficient (S11) versus frequency are shown in Table. The listed data is referenced to the LO + pin with the LO pin grounded. Table. Single-Ended LO Input Impedance FREQEY INPT REFLECTION COEFFICIENT (MHz) IMPEDAE MAG ANGLE j j j j j j j j IF Output Port A simplified schematic of the IF output circuit is shown in Figure 9. The output pins, IF + and IF, are internally connected to the collectors of the mixer switching transistors. Both pins must be biased at the supply voltage, which can be applied through the center-tap of a transformer or 7Ω.7pF V CC LT IF + 11 IF 1 L3 C3 V CC L T 4:1 IF OT Figure 7. LO Input Schematic F9 Figure 9. IF Output with External Matching 9

10 APPLICATIO S I FOR ATIO 1 W through impedance-matching inductors. Each IF pin draws about 7.mA of supply current (ma total). For optimum single-ended performance, these differential outputs must be combined externally through an IF transformer or balun. An equivalent small-signal model for the output is shown in Figure 1. The output impedance can be modeled as a 74Ω resistor (R IF ) in parallel with a.7pf capacitor. For most applications, the bond-wire inductance (.7nH per side) can be ignored. The external components, C3, L and L3 form an impedance transformation network to match the mixer output impedance to the input impedance of transformer T. The values for these components can be estimated using the equations below, along with the impedance values listed in Table 3. As an example, at an IF frequency of 14MHz and R L = Ω (using a 4:1 transformer for T with an external Ω load), n = R IF /R L = 74/ =.87 Q = (n 1) = X C = R IF /Q = 4Ω C = 1/(ω X C ) =.71pF C3 = C C IF =.1pF X L = R L Q = 74Ω L = L3 = X L /ω = 6nH Table 3. IF Differential Impedance (Parallel Equivalent) FREQEY OTPT REFLECTION COEFFICIENT (MHz) IMPEDAE MAG ANGLE 7 7 j3.39k j1.67k j j j j j j j LT R IF 74Ω.7nH C IF.7pF.7nH IF + 11 IF 1 F1 Figure 1. IF Output Small Signal Model Low Cost Output Match For low cost applications in which the required fractional bandwidth of the IF output is less than %, it may be possible to replace the output transformer with a lumpedelement network. This circuit is shown in Figure 11, where L11, L1, C11 and C1 form a narrowband bridge balun. These element values are selected to realize a 18 phase shift at the desired IF frequency, and can be estimated using the equations below. In this case, the load resistance, R L, is Ω. RIF RL L11= L1 = ω 1 C11= C1 = ω RIF RL Inductor L13 or L14 provides a DC path between V CC and the IF + pin. Only one of these inductors is required. Low cost multilayer chip inductors are adequate for L11, L1 and L13. If L14 is used instead of L13, a larger value is usually required, which may require the use of a wirewound inductor. Capacitor C13 is a DC block which can also be used to adjust the impedance match. Capacitor C14 is a bypass capacitor. IF + IF V CC C1 L14 OPT L1 L11 C11 C13 Figure 11. Narrowband Bridge IF Balun C3 L13 OPT C14 L3 L R L Ω IF OT Ω F11 Actual component values for IF frequencies of 4MHz, 36MHz and 4MHz are listed in Table 4. Typical IF port return loss for these examples is shown in Figure 1.

11 APPLICATIO S I FOR ATIO W Conversion gain and IIP3 performance with an RF frequency of 19MHz are plotted vs IF frequency in Figure 13. These results show that the usable IF bandwidth for the lumped element balun is greater than 6MHz, assuming tight tolerance matching components. Contact the factory for applications assistance with this circuit. Table 4. Component Values for Lumped Balun IF FREQ (MHz) L11, L1 (nh) C11, C1 (pf) C13 (pf) L14 (nh) IIP RETRN LOSS (db) FREQEY (MHz) 4 GAIN (db), IIP3 (dbm) 1 GAIN IF FREQEY (MHz) T A = C f LO = f RF f IF f RF = 19MHz P LO = dbm P RF = dbm 4 IIP3 (dbm) T A = C 1 f LO = f RF f IF 4MHz 11 P LO = dbm 36MHz P RF = dbm 4MHz RF FREQEY (MHz) F1 Figure 1. Typical IF Return Loss Performance with 4MHz, 36MHz and 4MHz Lumped Element Baluns F13 Figure 13. Typical Gain and IIP3 vs IF Frequency with 4MHz, 36MHz and 4MHz Lumped Element Baluns F14 Figure 14. Typical IIP3 vs RF Frequency with Lumped Element Baluns and IF Frequencies of 4MHz, 36MHz and 4MHz TYPICAL APPLICATIO S Top Layer Silkscreen Evaluation Board Layouts Top Layer Metal Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11

12 PACKAGE DESCRIPTIO F Package 16-Lead Plastic QFN (4mm 4mm) (Reference LTC DWG # ) 4. ±.1 (4 SIDES).7 ±. R =.1 TYP 16. ±..7 ±. PIN 1 TOP MARK (NOTE 6) ±.. ±. (4 SIDES).9 ±.. ±.1 (4-SIDES).3 ±..6 BSC RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS PACKAGE OTLINE NOTE: 1. DRAWING CONFORMS TO JEDEC PACKAGE OTLINE MO- VARIATION (WGGC). DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT ILDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. REF... EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFEREE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE BOTTOM VIEW EXPOSED PAD (F) QFN ±..6 BSC RELATED PARTS PART NMBER DESCRIPTION COMMENTS Infrastructure LT1 DC-3GHz High Signal Level Down Converting Mixer 1dBm IIP3, Integrated LO Buffer LT14 ltralow Distortion, IF Amplifier/ADC Driver with Digitally 8MHz Bandwidth, 47dBm OIP3 at 1MHz, 1.dB to 33dB Gain Controlled Gain Control Range LT19.7GHz to 1.4GHz High Linearity pconverting Mixer 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with Ω Matching, Single-Ended LO and RF Ports Operation LT 1.3GHz to.3ghz High Linearity pconverting Mixer.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with Ω Matching, Single-Ended LO and RF Ports Operation LT1 3.7GHz Very High Linearity Mixer 4.dBm IIP3 at 1.9GHz, 1.dB SSBNF, 4dBm LO Leakage, Supply Voltage = 3.V to.v LT 6MHz to.7ghz High Signal Level Downconverting Mixer 4.V to.v Supply, dbm IIP3 at 9MHz, NF = 1.dB, Ω Single-Ended RF and LO Ports LT6 High Linearity, Low Power Downconverting Mixer 16.dBm IIP3 at 9MHz, NF = 11dB, Supply Current = 8mA, 3.6V to.3v Supply RF Power Detectors LTC8 3MHz to 7GHz RF Power Detector 44dB Dynamic Range, Temperature Compensated, SC7 Package LTC3 3MHz to 7GHz Precision RF Power Detector Precision V OT Offset Control, Adjustable Gain and Offset LT34 MHz to 3GHz RF Power Detector with 6dB Dynamic Range ±1dB Output Variation over Temperature, 38ns Response Time LTC3 6MHz to 7GHz RF Power Detector 1MHz Baseband BW, Precision Offset with Adjustable Gain and Offset Wide Bandwidth ADCs LTC Bit, 8Msps ADC MHz BW S/H, 71.8dB SNR, 87dB SFDR LTC17 14-Bit, 8Msps ADC MHz BW S/H, 7.dB SNR, 9dB SFDR,.V P-P or 1.3V P-P Input Ranges LTC/ 1-Bit, Msps/8Msps ADC Low Power 77MHz BW S/H, 61dB SNR, 7dB SFDR ±.V or ±1V LTC3 Input LTC4/ 1-Bit/1-Bit, 13Msps ADC Low Power 77MHz BW S/H, 61dB SNR, 7dB SFDR ±.V or ±1V LTC34 Input 1 Linear Technology Corporation 163 McCarthy Blvd., Milpitas, CA (48) FAX: (48) LT/TP 14 1K PRINTED IN THE SA LINEAR TECHNOLOGY CORPORATION 4

FEATURES APPLICATIO S. LT GHz to 1.4GHz High Linearity Upconverting Mixer DESCRIPTIO TYPICAL APPLICATIO

FEATURES APPLICATIO S. LT GHz to 1.4GHz High Linearity Upconverting Mixer DESCRIPTIO TYPICAL APPLICATIO FEATURES Wide RF Frequency Range:.7GHz to.ghz 7.dBm Typical Input IP at GHz On-Chip RF Output Transformer On-Chip 5Ω Matched LO and RF Ports Single-Ended LO and RF Operation Integrated LO Buffer: 5dBm