BPF ADC V CC 3.3V. 22pF. ENA (0V/3.3V) LO 2160MHz 2.2pF ENA SYNTH ENB (0V/3.3V) ENB. 22pF. 190MHz BPF ADC TA01a

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1 Features n Conversion Gain:. at.ghz n :. at.ghz n Noise Figure:. at.ghz n 1. Under Blocking n High Input P1 n Channel-to-Channel Isolation n.v Supply, 1.W Power Consumption n Low Power Mode for.w Consumption n Independent Channel Shutdown Control n Ω Single-Ended RF and Inputs n Input Matched In All Modes n Drive Level n Small Package and Solution Size n C to C Operation Applications n G/G Wireless Infrastructure Diversity Receivers (LTE, W-CDMA, TD-SCDMA, WiMAX, GSM ) n MIMO Infrastructure Diversity Receivers n High Dynamic Range Downmixer Applications L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Dual 1.GHz to.ghz High Dynamic Range Downconverting Mixer Description The LTC is part of a family of dual-channel high dynamic range, high gain downconverting mixers covering the MHz to.ghz RF frequency range. The is optimized for 1.GHz to.ghz RF applications. The frequency must fall within the 1.GHz to.ghz range for optimum performance. A typical application is a LTE or WiMAX receiver with a.ghz to.ghz RF input and low side. The s high conversion gain and high dynamic range enable the use of lossy IF filters in high selectivity receiver designs, while minimizing the total solution cost, board space and system-level variation. A low current mode is provided for additional power savings and each of the mixer channels has independent shutdown control. High Dynamic Range Dual Downconverting Mixer Family PART NUMBER RF RANGE RANGE LTC MHz to 1.GHz MHz to 1.GHz LTC1 1.GHz to.ghz 1.GHz to.1ghz 1.GHz to.ghz 1.GHz to.ghz LTC.GHz to.ghz.1ghz to.ghz Typical Application RF MHz TO MHz RF MHz TO MHz V CCIF.V or V V CCIF LNA LNA 1µF IMAGE BPF IMAGE BPF pf pf RFA pf RFB pf Wideband LTE Receiver 1nH 1nF 1nF 1nH IFA + IFA IF IF IFB + IFB 1nH 1nH 1nF 1MHz SAW BIAS BIAS 1nF 1MHz SAW V CCA V CCB IF IF ENA ENB 1MHz BPF pf ADC pf 1µF ENA (V/.V) MHz.pF 1MHz BPF ENB (V/.V) SYNTH ADC V CC.V V CC GC () Wideband Conversion Gain and vs IF Frequency = MHz P = RF = ±MHz TEST CIRCUIT IN FIGURE IF FREQUENCY (MHz) TA1b ONLY, MEASURED ON EVALUATION BOARD () TA1a For more information fa 1

2 Absolute Maximum Ratings (Note 1) Supply Voltage (V CC )...V IF Supply Voltage (V CCIF )...V Enable Voltage (ENA, ENB)....V to V CC +.V Bias Adjust Voltage (IFBA, IFBB)....V to V CC +.V Power Select Voltage (I SEL )....V to V CC +.V Input Power (1GHz to GHz)... Input DC Voltage... ±.1V RFA, RFB Input Power (1GHz to GHz)...1 RFA, RFB Input DC Voltage... ±.1V Operating Temperature Range (T C )... C to C Storage Temperature Range... C to 1 C Junction Temperature (T J )... 1 C Pin Configuration RFA CTA CTB RFB 1 1 TOP VIEW IFA IFA + IFA IFBA VCCA IFB IFB + IFB IFBB VCCB UH PACKAGE -LEAD (mm mm) PLASTIC QFN T JMAX = 1 C, θ JC = C/W EXPOSED PAD (PIN ) IS, MUST BE SOLDERED TO PCB I SEL ENA ENB Order Information LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE IUH#PBF IUH#TRPBF -Lead (mm mm) Plastic QFN C to C Consult LTC Marketing for parts specified with wider operating temperature ranges. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: For more information on tape and reel specifications, go to: DC Electrical Characteristics unless otherwise noted. Test circuit shown in Figure 1. (Note ) V CC =.V, V CCIF =.V, ENA = ENB = High, I SEL = Low, T C = C, PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply Requirements (V CCA, V CCB, V CCIFA, V CCIFB ) V CCA, V CCB Supply Voltage (Pins, 1).1.. V V CCIFA, V CCIFB Supply Voltage (Pins,,, ).1.. V Mixer Supply Current (Pins, 1) Both Channels Enabled 1 ma IF Amplifier Supply Current (Pins,,, ) Both Channels Enabled ma Total Supply Current (Pins,,, 1,, ) Both Channels Enabled 1 ma Total Supply Current Shutdown ENA = ENB = Low µa Enable Logic Input (ENA, ENB) High = On, Low = Off ENA, ENB Input High Voltage (On). V ENA, ENB Input Low Voltage (Off). V ENA, ENB Input Current.V to V CC +.V µa Turn On Time. µs Turn Off Time 1 µs For more information fa

3 DC Electrical Characteristics unless otherwise noted. Test circuit shown in Figure 1. (Note ) V CC =.V, V CCIF =.V, ENA = ENB = High, I SEL = Low, T C = C, PARAMETER CONDITIONS MIN TYP MAX UNITS Low Power Mode Logic Input (I SEL ) High = Low Power, Low = Normal Power Mode I SEL Input High Voltage. V I SEL Input Low Voltage. V I SEL Input Current.V to V CC +.V µa Low Power Mode Current Consumption (I SEL = High) Mixer Supply Current (Pins, 1) Both Channels Enabled 1 ma IF Amplifier Supply Current (Pins,,, ) Both Channels Enabled 1 ma Total Supply Current (Pins,,, 1,, ) Both Channels Enabled ma AC Electrical Characteristics V CC =.V, V CCIF =.V, ENA = ENB = High, I SEL = Low, T C = C, P =, P RF = ( f = MHz for two tone tests), unless otherwise noted. Test circuit shown in Figure 1. (Notes,, ) PARAMETER CONDITIONS MIN TYP MAX UNITS Input Frequency Range 1 to MHz RF Input Frequency Range Low Side High Side 1 to 1 to MHz MHz IF Output Frequency Range Requires External Matching to MHz RF Input Return Loss Z O = Ω, 1MHz to MHz > Input Return Loss Z O = Ω, 1MHz to MHz >1 IF Output Impedance Differential at 1MHz Ω.pF R C Input Power f = 1MHz to MHz to RF Leakage f = 1MHz to MHz < to IF Leakage f = 1MHz to MHz < RF to Isolation f RF = 1MHz to MHz > RF to IF Isolation f RF = 1MHz to MHz > Channel-to-Channel Isolation f RF = 1MHz to MHz > Low Side Downmixer Application: I SEL = Low, RF = 1MHz to MHz, IF = 1MHz, f = f RF f IF PARAMETER CONDITIONS MIN TYP MAX UNITS Conversion Gain RF = 1MHz RF = MHz RF = MHz Conversion Gain Flatness RF = ±MHz, = MHz, IF = 1 ±MHz ±. Conversion Gain vs Temperature T C = ºC to ºC, RF = MHz. / C Input rd Order Intercept RF = 1MHz. RF = MHz RF = MHz... SSB Noise Figure RF = 1MHz RF = MHz RF = MHz For more information fa

4 AC Electrical Characteristics V CC =.V, V CCIF =.V, ENA = ENB = High, T C = C, P =, P RF = ( f = MHz for two tone tests), unless otherwise noted. Test circuit shown in Figure 1. (Notes, ) Low Side Downmixer Application: I SEL = Low, RF = 1MHz to MHz, IF = 1MHz, f = f RF f IF PARAMETER CONDITIONS MIN TYP MAX UNITS SSB Noise Figure Under Blocking f RF = MHz, f = MHz, f BCK = MHz P BCK = P BCK = 1.. RF- Output Spurious Product (f RF = f + f IF /) RF- Output Spurious Product (f RF = f + f IF /) f RF = MHz at, f = MHz, f IF = 1MHz f RF =.MHz at, f = MHz, f IF = 1MHz Input 1 Compression f RF = MHz, V CCIF =.V f RF = MHz, V CCIF = V c c. Low Power Mode, Low Side Downmixer Application: I SEL = High, RF = 1MHz to MHz, IF = 1MHz, f = f RF f IF PARAMETER CONDITIONS MIN TYP MAX UNITS Conversion Gain RF = MHz.1 Input rd Order Intercept RF = MHz. SSB Noise Figure RF = MHz. Input 1 Compression RF = MHz, V CCIF =.V RF = MHz, V CCIF = V.. High Side Downmixer Application: I SEL = Low, RF = 1MHz to MHz, IF = 1MHz, f = f RF + f IF PARAMETER CONDITIONS MIN TYP MAX UNITS Conversion Gain RF = 1MHz RF = 1MHz RF = MHz.1.. Conversion Gain Flatness RF = 1 ±MHz, = MHz, IF = 1 ±MHz ±. Conversion Gain vs Temperature T C = ºC to ºC, RF = 1MHz. / C Input rd Order Intercept SSB Noise Figure SSB Noise Figure Under Blocking -RF Output Spurious Product (f RF = f f IF /) -RF Output Spurious Product (f RF = f f IF /) Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note : The is guaranteed functional over the case operating temperature range of C to C (θ JC = C/W). RF = 1MHz RF = 1MHz RF = MHz RF = 1MHz RF = 1MHz RF = MHz f RF = 1MHz, f = MHz, f BCK = MHz P BCK = P BCK = f RF = MHz at, f = MHz, f IF = 1MHz f RF =.MHz at, f = MHz, f IF = 1MHz Input 1 Compression RF = 1MHz, V CCIF =.V RF = 1MHz, V CCIF = V c c.. Note : SSB Noise Figure measured with a small-signal noise source, bandpass filter and matching pad on RF input, bandpass filter and matching pad on the input, and no other RF signals applied. Note : Channel A to channel B isolation is measured as the relative IF output power of channel B to channel A, with the RF input signal applied to channel A. The RF input of channel B is Ω terminated and both mixers are enabled. For more information fa

5 Typical AC Performance Characteristics ISOLATION () 1 Low Side V CC =.V, V CCIF =.V, ENA = ENB = High, I SEL = Low, T C = C, P =, P RF = ( /tone for two-tone tests, f = MHz), IF = 1MHz, unless otherwise noted. Test circuit shown in Figure 1. () 1 1 Conversion Gain and vs RF Frequency SSB vs RF Frequency Channel Isolation vs RF Frequency C C C C 1 1 RF FREQUENCY (MHz) () SSB () 1 1 C C C C RF FREQUENCY (MHz) C C C RF FREQUENCY (MHz) G1 G G GC (), () 1 1MHz Conversion Gain, and vs Power C 1 C C INPUT POWER () SSB () GC (), () 1 MHz Conversion Gain, and vs Power C 1 C C INPUT POWER () SSB () GC (), () 1 MHz Conversion Gain, and vs Power C 1 C C INPUT POWER () SSB () G G G GC (), () Conversion Gain, and vs Supply Voltage (Single Supply) C 1 RF = MHz C V CC = V CCIF C V CC, V CCIF SUPPLY VOLTAGE (V) SSB () GC (), () Conversion Gain, and vs Supply Voltage (Dual Supply) C C 1 C 1 RF = MHz G C V CC =.V... V CCIF SUPPLY VOLTAGE (V) SSB () GC (), (), P1 () 1 Conversion Gain, and RF Input P1 vs Temperature RF = MHz P1 V CCIF =.V V CCIF = V CASE TEMPERATURE ( C) G G G For more information fa

6 Typical AC Performance Characteristics Low Side V CC =.V, V CCIF =.V, ENA = ENB = High, I SEL = Low, T C = C, P =, P RF = ( /tone for two-tone tests, f = MHz), IF = 1MHz, unless otherwise noted. Test circuit shown in Figure 1. OUTPUT POWER (/TONE) -Tone IF Output Power, IM and IM vs RF Input Power IF OUT RF1 = MHz RF = 1MHz = MHz IM IM RF INPUT POWER (/TONE) G OUTPUT POWER () Single-Tone IF Output Power, and Spurs vs RF Input Power IF OUT (RF = MHz) = MHz RF- (RF =.MHz) RF- (RF = MHz) RF INPUT POWER () G RELATIVE SPUR LEVEL (c) and Spur Suppression vs Input Power RF- (RF = MHz) RF- (RF =.MHz) IF = 1MHz P RF = = MHz INPUT POWER () G SSB () 1 SSB Noise Figure vs RF Blocker Power Leakage vs Frequency RF Isolation vs RF Frequency P = P = P = P = RF = MHz BCKER = MHz LEAKAGE () -RF -IF ISOLATION () RF- RF-IF 1 RF BCKER POWER () FREQUENCY (MHz) RF FREQUENCY (MHz) G G G1 DISTRIBUTION (%) 1. Conversion Gain Distribution Distribution SSB Noise Figure Distribution RF = MHz C C C. GAIN () DISTRIBUTION (%) RF = MHz 1. C C C... (). DISTRIBUTION (%) 1 C C C NOISE FIGURE () RF = MHz G1 G1 For more information G fa

7 Typical AC Performance Characteristics Low Power Mode, Low Side V CC =.V, V CCIF =.V, ENA = ENB = High, I SEL = High, T C = C, P =, P RF = ( /tone for two-tone tests, f = MHz), IF = 1MHz, unless otherwise noted. Test circuit shown in Figure 1. () Conversion Gain and vs RF Frequency C C C C RF FREQUENCY (MHz) GC () NOISE FIGURE () 1 1 SSB vs RF Frequency C C C C RF FREQUENCY (MHz) OUTPUT POWER (/TONE) -Tone IF Output Power, IM and IM vs RF Input Power RF1 = MHz RF = 1MHz = MHz IF OUT IM IM RF INPUT POWER (/TONE) G1 G G GC (), () MHz Conversion Gain, and vs Power 1 C C C INPUT POWER () SSB () GC (), () MHz Conversion Gain, and vs Power 1 C C C INPUT POWER () SSB () (), () MHz Conversion Gain, and vs Power C C C 1 INPUT POWER () SSB () G G G GC (), () Conversion Gain, and vs Supply Voltage (Single Supply) V CC = V CCIF RF = MHz C C C V CC, V CCIF SUPPLY VOLTAGE (V) SSB () GC (), () Conversion Gain, and vs Supply Voltage (Dual Supply) V CC =.V RF = MHz C C C 1... V CCIF SUPPLY VOLTAGE (V) SSB () GC (), (), P1 () Conversion Gain, and RF Input P1 vs Temperature P1 V CCIF =.V V CCIF = V RF = MHz CASE TEMPERATURE ( C) G G For more information G fa

8 Typical AC Performance Characteristics High Side V CC =.V, V CCIF =.V, ENA = ENB = High, I SEL = Low, T C = C, P =, P RF = ( /tone for two-tone tests, f = MHz), IF = 1MHz, unless otherwise noted. Test circuit shown in Figure 1. () Conversion Gain and vs RF Frequency SSB vs RF Frequency Channel Isolation vs RF Frequency C C C 1 C RF FREQUENCY (MHz) GC () SSB () 1 1 C C C C RF FREQUENCY (MHz) ISOLATION () C C C RF FREQUENCY (MHz) G G G GC (), () 1MHz Conversion Gain, and vs Power 1 C C C 1 INPUT POWER () SSB () GC (), () 1MHz Conversion Gain, and vs Power C 1 C C 1 INPUT POWER () SSB () GC (), () MHz Conversion Gain, and vs Power C 1 C C 1 INPUT POWER () SSB () G1 G G GC (), () Conversion Gain, and vs Supply Voltage (Single Supply) C 1 V CC = V CCIF C RF = 1MHz C V CC, V CCIF SUPPLY VOLTAGE (V) SSB () GC (), () Conversion Gain, and vs Supply Voltage (Dual Supply) C 1 RF = 1MHz C C 1 V CC =.V... V CCIF SUPPLY VOLTAGE (V) SSB () GC (), (), P1 () Conversion Gain, and RF Input P1 vs Temperature V CCIF =.V V CCIF = V RF = 1MHz 1 P1 CASE TEMPERATURE ( C) G G For more information G fa

9 Typical DC Performance Characteristics I SEL = Low, ENA = ENB = High, test circuit shown in Figure 1. SUPPLY CURRENT (ma) V CC Supply Current vs Supply Voltage (Mixer + Amplifier) V CCIF = V CC C C C C V CC SUPPLY VOLTAGE (V) G SUPPLY CURRENT (ma) V CCIF Supply Current vs Supply Voltage (IF Amplifier) V CC =.V. C C C C V CCIF SUPPLY VOLTAGE (V) G SUPPLY CURRENT (ma) Total Supply Current vs Temperature (V CC + V CCIF ) V CC =.V, V CCIF = V (DUAL SUPPLY) V CC = V CCIF =.V (SINGLE SUPPLY) CASE TEMPERATURE ( C) G I SEL = High, ENA = ENB = High, test circuit shown in Figure 1. SUPPLY CURRENT (ma) V CC Supply Current vs Supply Voltage (Mixer + Amplifier) V CCIF = V CC C C C C V CC SUPPLY VOLTAGE (V) SUPPLY CURRENT (ma) V CCIF Supply Current vs Supply Voltage (IF Amplifier) 1 V CC =.V 1 C 1 C C. C V CCIF SUPPLY VOLTAGE (V) SUPPLY CURRENT (ma) Total Supply Current vs Temperature (V CC + V CCIF ) V CC =.V, V CCIF = V (DUAL SUPPLY) V CC = V CCIF =.V (SINGLE SUPPLY) CASE TEMPERATURE ( C) G G1 G Pin Functions RFA, RFB (Pins 1, ): Single-Ended RF Inputs for Channels A and B. These pins are internally connected to the primary sides of the RF input transformers, which have low DC resistance to ground. Series DC-blocking capacitors should be used to avoid damage to the integrated transformer when DC voltage is present at the RF inputs. The RF inputs are impedance matched when the input is driven with a ± source between 1.GHz and.ghz and the channels are enabled. For more information CTA, CTB (Pins, ): RF Transformer Secondary Center- Tap on Channels A and B. These pins may require bypass capacitors to ground to optimize performance. Each pin has an internally generated bias voltage of 1.V and must be DC-isolated from ground and V CC. (Pins,,,, 1,, Exposed Pad Pin ): Ground. These pins must be soldered to the RF ground plane on the circuit board. The exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. fa

10 Pin Functions IFB, IFA (Pins, ): DC Ground Returns for the IF Amplifiers. These pins must be connected to ground to complete the DC current paths for the IF amplifiers. Chip inductors may be used to tune -IF and RF-IF leakage. Typical DC current is 1mA for each pin. IFB +, IFB, IFA, IFA + (Pins,,, ): Open-Collector Differential Outputs for the IF Amplifiers of Channels B and A. These pins must be connected to a DC supply through impedance matching inductors, or transformer center-taps. Typical DC current consumption is.ma into each pin. IFBB, IFBA (Pins, ): Bias Adjust Pins for the IF Amplifiers. These pins allow independent adjustment of the internal IF buffer currents for channels B and A, respectively. The typical DC voltage on these pins is.v. If not used, these pins must be DC isolated from ground and V CC. V CCB and V CCA (Pins, 1): Power Supply Pins for the Buffers and Bias Circuits. These pins must be connected to a regulated.v supply with bypass capacitors located close to the pins. Typical current consumption is.ma per pin. ENB, ENA (Pins, 1): Enable Pins. These pins allow Channels B and A, respectively, to be independently enabled. An applied voltage of greater than.v activates the associated channel while a voltage of less than.v disables the channel. Typical input current is less than μa. These pins must not be allowed to float. (Pin 1): Single-Ended Local Oscillator Input. This pin is internally connected to the primary side of the input transformer and has a low DC resistance to ground. Series DC-blocking capacitors should be used to avoid damage to the integrated transformer when DC voltage present at input. The input is internally matched to Ω for all states of ENA and ENB. I SEL (Pin ): Low Power Select Pin. When this pin is pulled low (<.V), both mixer channels are biased at the normal current level for best RF performance. When greater than.v is applied, both channels operate at reduced current, which provides reasonable performance at lower power consumption. This pin must not be allowed to float. Block Diagram 1 RFA CTA 1 IFA IFA + IFA IFBA V CCA IF BIAS I SEL ENA 1 1 CTB RFB IFB IF BIAS IFB + IFB IFBB V CCB 1 ENB BD For more information fa

11 Test Circuit T1A :1 IFA Ω V CCIF.V TO V C L1A CA LA CA V CC.V..1.1 RF BIAS DC1A EVALUATION BOARD STACK-UP (NELCO N-) RFA Ω C1A CA 1 IFA IFA + IFA IFBA RFA CTA 1 V CCA I SEL ENA 1 CA ISEL (V/.V) ENA (V/.V) C 1 1 C Ω RFB Ω CB C1B CTB IFB IFB + IFB IFBB V CCB ENB RFB ENB (V/.V) CB CB TC1 LB L1B CB L1, L vs IF FREQUENCIES IF (MHz) L1, L (nh) 1 1 :1 T1B IFB Ω REF DES VALUE SIZE VENDOR C1A, C1B pf AVX C.pF AVX CA, CB CA, CB pf AVX C, C 1µF AVX CA, CB pf AVX CA, CB.pF AVX L1A, L1B 1nH Coilcraft LA, LB T1A, T1B TC-1W-ALN+ Mini-Circuits Figure 1. Standard Downmixer Test Circuit Schematic (1MHz IF) For more information fa

12 Applications Information Introduction The consists of two identical mixer channels driven by a common input signal. Each high linearity mixer consists of a passive double-balanced mixer core, IF buffer amplifier, buffer amplifier and bias/enable circuits. See the Pin Functions and Block Diagram sections for a description of each pin. Each of the mixers can be shutdown independently to reduce power consumption and low current mode can be selected that allows a trade-off between performance and power consumption. The RF and inputs are single-ended and are internally matched to Ω. Low side or high side injection can be used. The IF outputs are differential. The evaluation circuit, shown in Figure 1, utilizes bandpass IF output matching and an IF transformer to realize a Ω single-ended IF output. The evaluation board layout is shown in Figure. The secondary winding of the RF transformer is internally connected to the channel A passive mixer core. The center-tap of the transformer secondary is connected to Pin (CTA) to allow the connection of bypass capacitor, CA. The value of CA can be adjusted to improve channel isolation at specific RF frequencies with minor impact to conversion gain, linearity and noise performance. When used, it should be located within mm of Pin for proper high frequency decoupling. The nominal DC voltage on the CTA pin is 1.V. For the RF inputs to be properly matched, the appropriate signal must be applied to the input. A broadband input match is realized with C1A = pf. The measured input return loss is shown in Figure for frequencies of 1.GHz,.1GHz and.ghz. As shown in Figure, the RF input impedance is dependent on frequency, although a single value of C1A is adequate to cover the 1.GHz to.ghz RF band. RFA C1A 1 RFA TO CHANNEL A MIXER CTA CA F F Figure. Channel A RF Input Schematic Figure. Evaluation Board Layout (DC1A) RF Inputs The RF inputs of channels A and B are identical. The RF input of channel A, shown in Figure, is connected to the primary winding of an integrated transformer. A Ω match is realized when a series external capacitor, C1A, is connected to the RF input. C1A is also needed for DC blocking if the source has DC voltage present, since the primary side of the RF transformer is internally DC-grounded. The DC resistance of the primary is approximately.ω. RETURN SS () For more information = 1MHz = MHz = MHz 1 FREQUENCY (MHz) Figure. RF Port Return Loss F fa

13 Applications Information The RF input impedance and input reflection coefficient, versus RF frequency, are listed in Table 1. The reference plane for this data is Pin 1 of the IC, with no external matching, and the is driven at.1ghz. Table 1. RF Input Impedance and S (at Pin 1, No External Matching, f =.1GHz) FREQUENCY RF INPUT S (GHz) IMPEDANCE MAG ANGLE j j j j.1... j...1. j.... j j j j j j.. The secondary of the transformer drives a pair of high speed limiting differential amplifiers for channels A and B. The s amplifiers are optimized for the 1.GHz to.ghz frequency range; however, frequencies outside this frequency range may be used with degraded performance. The port is always Ω matched when V CC is applied, even when one or both of the channels is disabled. This helps to reduce frequency pulling of the source when the mixer is switched between different operating states. Figure illustrates the port return loss for the different operating modes. RETURN SS () 1 BOTH CHANNELS ON ONE CHANNEL ON BOTH CHANNELS OFF TO MIXER A TO MIXER B BIAS BIAS Figure. Input Schematic I SEL ENA 1 1 ENB F Input The input, shown in Figure, is connected to the primary winding of an integrated transformer. A Ω impedance match is realized at the port by adding an external series capacitor, C. This capacitor is also needed for DC blocking if the source has DC voltage present, since the primary side of the transformer is DC-grounded internally. The DC resistance of the primary is approximately 1.Ω. C For more information FREQUENCY (MHz) Figure. Input Return Loss F The nominal input level is, though the limiting amplifiers will deliver excellent performance over a ± input power range. Table lists the input impedance and input reflection coefficient versus frequency. Table. Input Impedance vs Frequency (at Pin 1, No External Matching, ENA = ENB = High) FREQUENCY INPUT S (GHz) IMPEDANCE MAG ANGLE j j J J j j j j j.. fa

14 Applications Information IF Outputs The IF amplifiers in channels A and B are identical. The IF amplifier for channel A, shown in Figure, has differential open collector outputs (IFA + and IFA ), a DC ground return pin (IFA), and a pin for adjusting the internal bias (IFBA). The IF outputs must be biased at the supply voltage (V CCIFA ), which is applied through matching inductors L1A and LA. Alternatively, the IF outputs can be biased through the center tap of a transformer (T1A). The common node of L1A and LA can be connected to the center tap of the transformer. Each IF output pin draws approximately.ma of DC supply current (1mA total). An external load resistor, RA, can be used to improve impedance matching if desired. IFA (Pin ) must be grounded or the amplifier will not draw DC current. Inductor LA may improve -IF and RF-IF leakage performance in some applications, but is otherwise not necessary. Inductors should have small resistance for DC. High DC resistance in LA will reduce the IF amplifier supply current, which will degrade RF performance. For optimum single-ended performance, the differential IF output must be combined through an external IF transformer or a discrete IF balun circuit. The evaluation board (see Figures 1 and ) uses a :1 IF transformer for impedance transformation and differential to single-ended conversion. It is also possible to eliminate the IF transformer and drive differential filters or amplifiers directly. The IF output impedance can be modeled as Ω in parallel with.pf. The equivalent small-signal model, including bondwire inductance, is shown in Figure. Frequency-dependent differential IF output impedance is listed in Table. This data is referenced to the package pins (with no external components) and includes the effects of IC and package parasitics. IFA + IFA.nH RIF CIF.nH LA (OR SHORT) 1mA IA L1A V CCIFA IFA + T1A RA IF CA :1 LA CA IFA IFBA IFA ma R1A (OPTION TO REDUCE DC POWER) BIAS V CCA F Figure. IF Output Small-Signal Model Bandpass IF Matching The bandpass IF matching configuration, shown in Figures 1 and, is best suited for IF frequencies in the MHz to MHz range. Resistor RA may be used to reduce the IF output resistance for greater bandwidth and inductors L1A and LA resonate with the internal IF output capacitance at the desired IF frequency. The value of L1A, LA can be estimated as follows: L1A = LA = πf IF 1 ( ) C IF F Figure. IF Amplifier Schematic with Bandpass Match where C IF is the internal IF capacitance (listed in Table ). For more information fa

15 Applications Information Values of L1A and LA are tabulated in Figure 1 for various IF frequencies. The measured IF output return loss for bandpass IF matching is plotted in Figure. Table. IF Output Impedance vs Frequency DIFFERENTIAL OUTPUT FREQUENCY (MHz) IMPEDANCE (R IF X IF (C IF )) j (.pf) j (.pf) 1 j1 (.pf) j1 (.1pF) j (.1pF) j (.pf) j1 (.pf) V CCIFA.1 TO.V T1A :1 Figure. IF Output with Lowpass Matching C L1A IFA + RA CA CA LA IFA IFA Ω F RETURN SS () 1 nh 1nH nh nh nh nh 1 FREQUENCY (MHz) F Figure. IF Output Return Loss with Bandpass Matching Lowpass IF Matching For IF frequencies below MHz, the inductance values become unreasonably high and the lowpass topology shown in Figure is preferred. This topology also can provide improved RF to IF and to IF isolation. V CCIFA is supplied through the center tap of the :1 transformer. A lowpass impedance transformation is realized by shunt elements RA and CA (in parallel with the internal RIF and CIF), and series inductors L1A and LA. Resistor RA is used to reduce the IF output resistance for greater bandwidth, or it can be omitted for the highest conversion gain. The final impedance transformation to Ω is realized by transformer T1A. The measured return loss is shown in Figure for different values of inductance (CA = open). The case with nh inductors and a 1k load resistor (RA) is also shown. The demo RETURN SS () For more information 1 nh nh nh 1 FREQUENCY (MHz) nh + 1k F Figure. IF Output Return Loss with Lowpass Matching board (see Figure ) has been laid out to accommodate this matching topology with only minor modifications. IF Amplifier Bias The IF amplifier delivers excellent performance with V CCIF =.V, which allows a single supply to be used for V CC and V CCIF. At V CCIF =.V, the RF input P1 of the mixer is limited by the output voltage swing. For higher P1, in this case, resistor RA (Figure ) can be used to reduce the output impedance and thus the voltage swing, thus improving P1. The trade-off for improved P1 will be lower conversion gain. With V CCIF increased to V the P1 increases by over, at the expense of higher power consumption. Mixer P1 performance at 1MHz and MHz is tabulated in Table for V CCIF values of.v and V. For the highest conversion gain, high-q wire-wound chip inductors are recommended for L1A and LA. Low cost multilayer chip inductors may be substituted, with a slight reduction in conversion gain. fa 1

16 Applications Information Table. Performance Comparison with V CCIF =.V and V (RF = 1MHz, High Side, IF = 1MHz) V CCIF (V) RA (Ω) I CCIF (ma) () P1 () () (). Open.... 1k.... Open.... (RF = MHz, Low Side, IF = 1MHz) V CCIF (V) RA (Ω) I CCIF (ma) () P1 () () (). Open.... 1k.1... Open.1... The IFBA pin (Pin ) is available for reducing the DC current consumption of the IF amplifier, at the expense of. The nominal DC voltage at Pin is.1v, and this pin should be left open-circuited for optimum performance. The internal bias circuit produces a ma reference for the IF amplifier, which causes the amplifier to draw approximately 1mA. If resistor R1A is connected to Pin as shown in Figure, a portion of the reference current can be shunted to ground, resulting in reduced IF amplifier current. For example, R1A = 1k will shunt away 1.mA from Pin and the IF amplifier current will be reduced by % to approximately.ma. Table summarizes RF performance versus IF amplifier current. Table. Mixer Performance with Reduced IF Amplifier Current RF = 1MHz, High Side, IF = 1MHz, V CC = V CCIF =.V R1 I CCIF (ma) () () P1 () () Open.....kΩ.....kΩ kΩ RF = MHz, Low Side, IF = 1MHz, V CC = V CCIF =.V R1 I CCIF (ma) () () P1 () () Open.....kΩ.1....kΩ kΩ Low Power Mode Both mixer channels can be set to low power mode using the I SEL pin. This allows flexibility to select a reduced current mode of operation when lower RF performance is acceptable, reducing power consumption by %. Figure shows a simplified schematic of the I SEL pin interface. When I SEL is set low (<.V), both channels operate at nominal DC current. When I SEL is set high (>.V), the DC current in both channels is reduced, thus reducing power consumption. The performance in low power mode and normal power mode are compared in Table. V CCA 1 I SEL Ω BIAS A V CCB BIAS B F Figure. I SEL Interface Schematic Table. Performance Comparison Between Different Power Modes RF = 1MHz, High Side, IF = 1MHz, V CC = V CCIF =.V I SEL I TOTAL (ma) () () P1 () () Low High.... RF = MHz, Low Side, IF = 1MHz, V CC = V CCIF =.V I SEL I TOTAL (ma) () () P1 () () Low High For more information fa

17 Applications Information Enable Interface Figure shows a simplified schematic of the ENA pin interface (ENB is identical). To enable channel A, the ENA voltage must be greater than.v. If the enable function is not required, the enable pin can be connected directly to V CC. The voltage at the enable pin should never exceed the power supply voltage (V CC ) by more than.v. If this should occur, the supply current could be sourced through the ESD diode, potentially damaging the IC. V CCA 1 ENA 1 Ω ESD CL Figure. ENA Interface Schematic F The Enable pins must be pulled high or low. If left floating, the on/off state of the IC will be indeterminate. If a three-state condition can exist at the enable pins, then a pull-up or pull-down resistor must be used. Supply Voltage Ramping Fast ramping of the supply voltage can cause a current glitch in the internal ESD protection circuits. Depending on the supply inductance, this could result in a supply voltage transient that exceeds the maximum rating. A supply voltage ramp time of greater than 1ms is recommended. Table. IF Output Spur Levels (c), High Side (RF = 1MHz, P RF =, P =, V CC = V CCIF =.V, T C = C) N * 1. * * * * *. *. * * * * * * M * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *Less than c Table. IF Output Spur Levels (c), Low Side (RF = MHz, P RF =, P =, V CC = V CCIF =.V, T C = C) N *... *.1 * * * * * * * *.1 * * * * * * M * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *Less than c Spurious Output Levels Mixer spurious output levels versus harmonics of the RF and are tabulated in Tables and for frequencies up to GHz. The spur levels were measured on a standard evalution board using the test circuit shown in Figure 1. The spur frequencies can be calculated using the following equation: f SPUR = (M f RF ) (N f ) For more information fa 1

18 Package Description Please refer to for the most recent package drawings. UH Package -Lead Plastic QFN (mm mm) (Reference LTC DWG # --1 Rev A). ±.. ±.. ±.. REF. ±.. ±. PACKAGE OUTLINE. ±.. BSC RECOMMENDED SOLDER PAD LAYOUT APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 TOP MARK (NOTE ). ±. R =. BOTTOM VIEW EXPOSED PAD TYP. ±. R =.1 TYP.. PIN 1 NOTCH R =. TYP OR. CHAMFER. ±. 1. ±.. REF. ±.. ±.. REF NOTE: 1. DRAWING IS NOT A JEDEC PACKAGE OUTLINE. DRAWING NOT TO SCALE. ALL DIMENSIONS ARE IN MILLIMETERS. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED.mm ON ANY SIDE. EXPOSED PAD SHALL BE SOLDER PLATED. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 CATION ON THE TOP AND BOTTOM OF PACKAGE. ±.. BSC (UH) QFN REV A For more information fa

19 Revision History REV DATE DESCRIPTION PAGE NUMBER A / Changed lower frequency range from 1.GHz to 1.GHz. Input Frequency Range: changed lower frequency from 1MHz to 1MHz. RF Input Frequency Range, Low Side : changed lower frequency from 1MHz to 1MHz. Updated Conversion Gain and vs RF Frequency and SSB vs RF Frequency plots to include 1MHz frequency characteristics. Updated Leakage vs Frequency plot to include 1MHz frequency characteristics. Updated Conversion Gain and vs RF Frequency and SSB vs RF Frequency plots to include 1MHz frequency characteristics. Pin Functions section RFA, RFB (Pins 1, ): Changed input source lower frequency from 1.GHz to 1.GHz. Right column, last paragraph. Deleted sentence: These frequencies correspond to lower, middle and upper values in the range. Figure, updated the Input Return Loss plot to include MHz frequency characteristics. 1 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection For more of its circuits information as described herein will not infringe on existing patent rights. fa 1

20 Typical Application V CCIF.V RFA Ω TO CHANNEL B pf 1 1µF Downconverting Mixer with MHz IF TC-1W-1LN+ :1 nh 1nF nh pf IFA IFA + IFA IFBA RFA IFA Ω 1 V CCA I SEL pf 1µF I SEL V CC.V TO CHANNEL B (), SSB () Conversion Gain, and vs RF Frequency T A = C IF = MHz W SIDE RF FREQUENCY (MHz) ().pf CTA CHANNEL A ENA 1 1.pF ENA Ω TAb 1 CHANNEL B NOT SHOWN TA Related Parts PART NUMBER DESCRIPTION COMMENTS Infrastructure LTC MHz to GHz,.V Dual Active Gain,. and. at 1MHz,.V/mA Supply Downconverting Mixer LT MHz to.ghz,.v Downconverting Mixer. Gain,. and. at 1MHz,.V/mA Supply LTC1 GHz 1-Bit ADC Buffer. OIP to MHz, Programmable Fast Recovery Output Clamping LTC 1 Linear Analog VGA OIP at MHz, Continuous Gain Range to 1 LTCx MHz to GHz Downconverting Mixer Family Gain, >,,.V/mA Supply LT Ultralow Distort IF Digital VGA OIP at MHz, to Gain Range,. Gain Steps LT MHz to.ghz Upconverting Mixer OIP at MHz,. at 1.GHz, Integrated RF Transformer LT 1.GHz to.ghz Upconverting Mixer. OIP at.ghz, =.,.V Supply, Single-Ended and RF Ports RF Power Detectors LT1 GHz Low Power RMS Detector Dynamic Range, ±1 Accuracy Over Temperature, 1.mA Supply Current LTC GHz RMS Power Detector MHz to GHz, Up to Dynamic Range, ±. Accuracy Over Temperature LTC Dual GHz RMS Power Detector MHz to GHz, Up to Dynamic Range, > Channel-to-Channel Isolation ADCs LTC -Bit, Msps Dual ADC. SNR, > SFDR, mw Power Consumption LTC 1-Bit, Msps Dual ADC Ultralow Power. SNR, mw/channel Power Consumption LTC- -Bit, Msps ADC. SNR, SFDR, mw Power Consumption Linear Technology Corporation 1 McCarthy Blvd., Milpitas, CA -1 For more information () -1 FAX: () - fa LT REV A PRINTED IN USA LINEAR TECHNOGY CORPORATION